1 /* 2 * adv7180.c Analog Devices ADV7180 video decoder driver 3 * Copyright (c) 2009 Intel Corporation 4 * Copyright (C) 2013 Cogent Embedded, Inc. 5 * Copyright (C) 2013 Renesas Solutions Corp. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/errno.h> 20 #include <linux/kernel.h> 21 #include <linux/interrupt.h> 22 #include <linux/i2c.h> 23 #include <linux/slab.h> 24 #include <linux/of.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/videodev2.h> 27 #include <media/v4l2-ioctl.h> 28 #include <media/v4l2-event.h> 29 #include <media/v4l2-device.h> 30 #include <media/v4l2-ctrls.h> 31 #include <linux/mutex.h> 32 #include <linux/delay.h> 33 34 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM 0x0 35 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1 36 #define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM 0x2 37 #define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM 0x3 38 #define ADV7180_STD_NTSC_J 0x4 39 #define ADV7180_STD_NTSC_M 0x5 40 #define ADV7180_STD_PAL60 0x6 41 #define ADV7180_STD_NTSC_443 0x7 42 #define ADV7180_STD_PAL_BG 0x8 43 #define ADV7180_STD_PAL_N 0x9 44 #define ADV7180_STD_PAL_M 0xa 45 #define ADV7180_STD_PAL_M_PED 0xb 46 #define ADV7180_STD_PAL_COMB_N 0xc 47 #define ADV7180_STD_PAL_COMB_N_PED 0xd 48 #define ADV7180_STD_PAL_SECAM 0xe 49 #define ADV7180_STD_PAL_SECAM_PED 0xf 50 51 #define ADV7180_REG_INPUT_CONTROL 0x0000 52 #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f 53 54 #define ADV7182_REG_INPUT_VIDSEL 0x0002 55 56 #define ADV7180_REG_OUTPUT_CONTROL 0x0003 57 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004 58 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5 59 60 #define ADV7180_REG_AUTODETECT_ENABLE 0x0007 61 #define ADV7180_AUTODETECT_DEFAULT 0x7f 62 /* Contrast */ 63 #define ADV7180_REG_CON 0x0008 /*Unsigned */ 64 #define ADV7180_CON_MIN 0 65 #define ADV7180_CON_DEF 128 66 #define ADV7180_CON_MAX 255 67 /* Brightness*/ 68 #define ADV7180_REG_BRI 0x000a /*Signed */ 69 #define ADV7180_BRI_MIN -128 70 #define ADV7180_BRI_DEF 0 71 #define ADV7180_BRI_MAX 127 72 /* Hue */ 73 #define ADV7180_REG_HUE 0x000b /*Signed, inverted */ 74 #define ADV7180_HUE_MIN -127 75 #define ADV7180_HUE_DEF 0 76 #define ADV7180_HUE_MAX 128 77 78 #define ADV7180_REG_CTRL 0x000e 79 #define ADV7180_CTRL_IRQ_SPACE 0x20 80 81 #define ADV7180_REG_PWR_MAN 0x0f 82 #define ADV7180_PWR_MAN_ON 0x04 83 #define ADV7180_PWR_MAN_OFF 0x24 84 #define ADV7180_PWR_MAN_RES 0x80 85 86 #define ADV7180_REG_STATUS1 0x0010 87 #define ADV7180_STATUS1_IN_LOCK 0x01 88 #define ADV7180_STATUS1_AUTOD_MASK 0x70 89 #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00 90 #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10 91 #define ADV7180_STATUS1_AUTOD_PAL_M 0x20 92 #define ADV7180_STATUS1_AUTOD_PAL_60 0x30 93 #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40 94 #define ADV7180_STATUS1_AUTOD_SECAM 0x50 95 #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60 96 #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70 97 98 #define ADV7180_REG_IDENT 0x0011 99 #define ADV7180_ID_7180 0x18 100 101 #define ADV7180_REG_STATUS3 0x0013 102 #define ADV7180_REG_ANALOG_CLAMP_CTL 0x0014 103 #define ADV7180_REG_SHAP_FILTER_CTL_1 0x0017 104 #define ADV7180_REG_CTRL_2 0x001d 105 #define ADV7180_REG_VSYNC_FIELD_CTL_1 0x0031 106 #define ADV7180_REG_MANUAL_WIN_CTL_1 0x003d 107 #define ADV7180_REG_MANUAL_WIN_CTL_2 0x003e 108 #define ADV7180_REG_MANUAL_WIN_CTL_3 0x003f 109 #define ADV7180_REG_LOCK_CNT 0x0051 110 #define ADV7180_REG_CVBS_TRIM 0x0052 111 #define ADV7180_REG_CLAMP_ADJ 0x005a 112 #define ADV7180_REG_RES_CIR 0x005f 113 #define ADV7180_REG_DIFF_MODE 0x0060 114 115 #define ADV7180_REG_ICONF1 0x2040 116 #define ADV7180_ICONF1_ACTIVE_LOW 0x01 117 #define ADV7180_ICONF1_PSYNC_ONLY 0x10 118 #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0 119 /* Saturation */ 120 #define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */ 121 #define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */ 122 #define ADV7180_SAT_MIN 0 123 #define ADV7180_SAT_DEF 128 124 #define ADV7180_SAT_MAX 255 125 126 #define ADV7180_IRQ1_LOCK 0x01 127 #define ADV7180_IRQ1_UNLOCK 0x02 128 #define ADV7180_REG_ISR1 0x2042 129 #define ADV7180_REG_ICR1 0x2043 130 #define ADV7180_REG_IMR1 0x2044 131 #define ADV7180_REG_IMR2 0x2048 132 #define ADV7180_IRQ3_AD_CHANGE 0x08 133 #define ADV7180_REG_ISR3 0x204A 134 #define ADV7180_REG_ICR3 0x204B 135 #define ADV7180_REG_IMR3 0x204C 136 #define ADV7180_REG_IMR4 0x2050 137 138 #define ADV7180_REG_NTSC_V_BIT_END 0x00E6 139 #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F 140 141 #define ADV7180_REG_VPP_SLAVE_ADDR 0xFD 142 #define ADV7180_REG_CSI_SLAVE_ADDR 0xFE 143 144 #define ADV7180_REG_ACE_CTRL1 0x4080 145 #define ADV7180_REG_ACE_CTRL5 0x4084 146 #define ADV7180_REG_FLCONTROL 0x40e0 147 #define ADV7180_FLCONTROL_FL_ENABLE 0x1 148 149 #define ADV7180_REG_RST_CLAMP 0x809c 150 #define ADV7180_REG_AGC_ADJ1 0x80b6 151 #define ADV7180_REG_AGC_ADJ2 0x80c0 152 153 #define ADV7180_CSI_REG_PWRDN 0x00 154 #define ADV7180_CSI_PWRDN 0x80 155 156 #define ADV7180_INPUT_CVBS_AIN1 0x00 157 #define ADV7180_INPUT_CVBS_AIN2 0x01 158 #define ADV7180_INPUT_CVBS_AIN3 0x02 159 #define ADV7180_INPUT_CVBS_AIN4 0x03 160 #define ADV7180_INPUT_CVBS_AIN5 0x04 161 #define ADV7180_INPUT_CVBS_AIN6 0x05 162 #define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06 163 #define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07 164 #define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08 165 #define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09 166 #define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a 167 168 #define ADV7182_INPUT_CVBS_AIN1 0x00 169 #define ADV7182_INPUT_CVBS_AIN2 0x01 170 #define ADV7182_INPUT_CVBS_AIN3 0x02 171 #define ADV7182_INPUT_CVBS_AIN4 0x03 172 #define ADV7182_INPUT_CVBS_AIN5 0x04 173 #define ADV7182_INPUT_CVBS_AIN6 0x05 174 #define ADV7182_INPUT_CVBS_AIN7 0x06 175 #define ADV7182_INPUT_CVBS_AIN8 0x07 176 #define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08 177 #define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09 178 #define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a 179 #define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b 180 #define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c 181 #define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d 182 #define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e 183 #define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f 184 #define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10 185 #define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11 186 187 #define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44 188 #define ADV7180_DEFAULT_VPP_I2C_ADDR 0x42 189 190 #define V4L2_CID_ADV_FAST_SWITCH (V4L2_CID_USER_ADV7180_BASE + 0x00) 191 192 struct adv7180_state; 193 194 #define ADV7180_FLAG_RESET_POWERED BIT(0) 195 #define ADV7180_FLAG_V2 BIT(1) 196 #define ADV7180_FLAG_MIPI_CSI2 BIT(2) 197 #define ADV7180_FLAG_I2P BIT(3) 198 199 struct adv7180_chip_info { 200 unsigned int flags; 201 unsigned int valid_input_mask; 202 int (*set_std)(struct adv7180_state *st, unsigned int std); 203 int (*select_input)(struct adv7180_state *st, unsigned int input); 204 int (*init)(struct adv7180_state *state); 205 }; 206 207 struct adv7180_state { 208 struct v4l2_ctrl_handler ctrl_hdl; 209 struct v4l2_subdev sd; 210 struct media_pad pad; 211 struct mutex mutex; /* mutual excl. when accessing chip */ 212 int irq; 213 struct gpio_desc *pwdn_gpio; 214 v4l2_std_id curr_norm; 215 bool powered; 216 bool streaming; 217 u8 input; 218 219 struct i2c_client *client; 220 unsigned int register_page; 221 struct i2c_client *csi_client; 222 struct i2c_client *vpp_client; 223 const struct adv7180_chip_info *chip_info; 224 enum v4l2_field field; 225 }; 226 #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \ 227 struct adv7180_state, \ 228 ctrl_hdl)->sd) 229 230 static int adv7180_select_page(struct adv7180_state *state, unsigned int page) 231 { 232 if (state->register_page != page) { 233 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL, 234 page); 235 state->register_page = page; 236 } 237 238 return 0; 239 } 240 241 static int adv7180_write(struct adv7180_state *state, unsigned int reg, 242 unsigned int value) 243 { 244 lockdep_assert_held(&state->mutex); 245 adv7180_select_page(state, reg >> 8); 246 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value); 247 } 248 249 static int adv7180_read(struct adv7180_state *state, unsigned int reg) 250 { 251 lockdep_assert_held(&state->mutex); 252 adv7180_select_page(state, reg >> 8); 253 return i2c_smbus_read_byte_data(state->client, reg & 0xff); 254 } 255 256 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg, 257 unsigned int value) 258 { 259 return i2c_smbus_write_byte_data(state->csi_client, reg, value); 260 } 261 262 static int adv7180_set_video_standard(struct adv7180_state *state, 263 unsigned int std) 264 { 265 return state->chip_info->set_std(state, std); 266 } 267 268 static int adv7180_vpp_write(struct adv7180_state *state, unsigned int reg, 269 unsigned int value) 270 { 271 return i2c_smbus_write_byte_data(state->vpp_client, reg, value); 272 } 273 274 static v4l2_std_id adv7180_std_to_v4l2(u8 status1) 275 { 276 /* in case V4L2_IN_ST_NO_SIGNAL */ 277 if (!(status1 & ADV7180_STATUS1_IN_LOCK)) 278 return V4L2_STD_UNKNOWN; 279 280 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) { 281 case ADV7180_STATUS1_AUTOD_NTSM_M_J: 282 return V4L2_STD_NTSC; 283 case ADV7180_STATUS1_AUTOD_NTSC_4_43: 284 return V4L2_STD_NTSC_443; 285 case ADV7180_STATUS1_AUTOD_PAL_M: 286 return V4L2_STD_PAL_M; 287 case ADV7180_STATUS1_AUTOD_PAL_60: 288 return V4L2_STD_PAL_60; 289 case ADV7180_STATUS1_AUTOD_PAL_B_G: 290 return V4L2_STD_PAL; 291 case ADV7180_STATUS1_AUTOD_SECAM: 292 return V4L2_STD_SECAM; 293 case ADV7180_STATUS1_AUTOD_PAL_COMB: 294 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N; 295 case ADV7180_STATUS1_AUTOD_SECAM_525: 296 return V4L2_STD_SECAM; 297 default: 298 return V4L2_STD_UNKNOWN; 299 } 300 } 301 302 static int v4l2_std_to_adv7180(v4l2_std_id std) 303 { 304 if (std == V4L2_STD_PAL_60) 305 return ADV7180_STD_PAL60; 306 if (std == V4L2_STD_NTSC_443) 307 return ADV7180_STD_NTSC_443; 308 if (std == V4L2_STD_PAL_N) 309 return ADV7180_STD_PAL_N; 310 if (std == V4L2_STD_PAL_M) 311 return ADV7180_STD_PAL_M; 312 if (std == V4L2_STD_PAL_Nc) 313 return ADV7180_STD_PAL_COMB_N; 314 315 if (std & V4L2_STD_PAL) 316 return ADV7180_STD_PAL_BG; 317 if (std & V4L2_STD_NTSC) 318 return ADV7180_STD_NTSC_M; 319 if (std & V4L2_STD_SECAM) 320 return ADV7180_STD_PAL_SECAM; 321 322 return -EINVAL; 323 } 324 325 static u32 adv7180_status_to_v4l2(u8 status1) 326 { 327 if (!(status1 & ADV7180_STATUS1_IN_LOCK)) 328 return V4L2_IN_ST_NO_SIGNAL; 329 330 return 0; 331 } 332 333 static int __adv7180_status(struct adv7180_state *state, u32 *status, 334 v4l2_std_id *std) 335 { 336 int status1 = adv7180_read(state, ADV7180_REG_STATUS1); 337 338 if (status1 < 0) 339 return status1; 340 341 if (status) 342 *status = adv7180_status_to_v4l2(status1); 343 if (std) 344 *std = adv7180_std_to_v4l2(status1); 345 346 return 0; 347 } 348 349 static inline struct adv7180_state *to_state(struct v4l2_subdev *sd) 350 { 351 return container_of(sd, struct adv7180_state, sd); 352 } 353 354 static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) 355 { 356 struct adv7180_state *state = to_state(sd); 357 int err = mutex_lock_interruptible(&state->mutex); 358 if (err) 359 return err; 360 361 if (state->streaming) { 362 err = -EBUSY; 363 goto unlock; 364 } 365 366 err = adv7180_set_video_standard(state, 367 ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM); 368 if (err) 369 goto unlock; 370 371 msleep(100); 372 __adv7180_status(state, NULL, std); 373 374 err = v4l2_std_to_adv7180(state->curr_norm); 375 if (err < 0) 376 goto unlock; 377 378 err = adv7180_set_video_standard(state, err); 379 380 unlock: 381 mutex_unlock(&state->mutex); 382 return err; 383 } 384 385 static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input, 386 u32 output, u32 config) 387 { 388 struct adv7180_state *state = to_state(sd); 389 int ret = mutex_lock_interruptible(&state->mutex); 390 391 if (ret) 392 return ret; 393 394 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) { 395 ret = -EINVAL; 396 goto out; 397 } 398 399 ret = state->chip_info->select_input(state, input); 400 401 if (ret == 0) 402 state->input = input; 403 out: 404 mutex_unlock(&state->mutex); 405 return ret; 406 } 407 408 static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status) 409 { 410 struct adv7180_state *state = to_state(sd); 411 int ret = mutex_lock_interruptible(&state->mutex); 412 if (ret) 413 return ret; 414 415 ret = __adv7180_status(state, status, NULL); 416 mutex_unlock(&state->mutex); 417 return ret; 418 } 419 420 static int adv7180_program_std(struct adv7180_state *state) 421 { 422 int ret; 423 424 ret = v4l2_std_to_adv7180(state->curr_norm); 425 if (ret < 0) 426 return ret; 427 428 ret = adv7180_set_video_standard(state, ret); 429 if (ret < 0) 430 return ret; 431 return 0; 432 } 433 434 static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 435 { 436 struct adv7180_state *state = to_state(sd); 437 int ret = mutex_lock_interruptible(&state->mutex); 438 439 if (ret) 440 return ret; 441 442 /* Make sure we can support this std */ 443 ret = v4l2_std_to_adv7180(std); 444 if (ret < 0) 445 goto out; 446 447 state->curr_norm = std; 448 449 ret = adv7180_program_std(state); 450 out: 451 mutex_unlock(&state->mutex); 452 return ret; 453 } 454 455 static int adv7180_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm) 456 { 457 struct adv7180_state *state = to_state(sd); 458 459 *norm = state->curr_norm; 460 461 return 0; 462 } 463 464 static void adv7180_set_power_pin(struct adv7180_state *state, bool on) 465 { 466 if (!state->pwdn_gpio) 467 return; 468 469 if (on) { 470 gpiod_set_value_cansleep(state->pwdn_gpio, 0); 471 usleep_range(5000, 10000); 472 } else { 473 gpiod_set_value_cansleep(state->pwdn_gpio, 1); 474 } 475 } 476 477 static int adv7180_set_power(struct adv7180_state *state, bool on) 478 { 479 u8 val; 480 int ret; 481 482 if (on) 483 val = ADV7180_PWR_MAN_ON; 484 else 485 val = ADV7180_PWR_MAN_OFF; 486 487 ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val); 488 if (ret) 489 return ret; 490 491 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 492 if (on) { 493 adv7180_csi_write(state, 0xDE, 0x02); 494 adv7180_csi_write(state, 0xD2, 0xF7); 495 adv7180_csi_write(state, 0xD8, 0x65); 496 adv7180_csi_write(state, 0xE0, 0x09); 497 adv7180_csi_write(state, 0x2C, 0x00); 498 if (state->field == V4L2_FIELD_NONE) 499 adv7180_csi_write(state, 0x1D, 0x80); 500 adv7180_csi_write(state, 0x00, 0x00); 501 } else { 502 adv7180_csi_write(state, 0x00, 0x80); 503 } 504 } 505 506 return 0; 507 } 508 509 static int adv7180_s_power(struct v4l2_subdev *sd, int on) 510 { 511 struct adv7180_state *state = to_state(sd); 512 int ret; 513 514 ret = mutex_lock_interruptible(&state->mutex); 515 if (ret) 516 return ret; 517 518 ret = adv7180_set_power(state, on); 519 if (ret == 0) 520 state->powered = on; 521 522 mutex_unlock(&state->mutex); 523 return ret; 524 } 525 526 static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl) 527 { 528 struct v4l2_subdev *sd = to_adv7180_sd(ctrl); 529 struct adv7180_state *state = to_state(sd); 530 int ret = mutex_lock_interruptible(&state->mutex); 531 int val; 532 533 if (ret) 534 return ret; 535 val = ctrl->val; 536 switch (ctrl->id) { 537 case V4L2_CID_BRIGHTNESS: 538 ret = adv7180_write(state, ADV7180_REG_BRI, val); 539 break; 540 case V4L2_CID_HUE: 541 /*Hue is inverted according to HSL chart */ 542 ret = adv7180_write(state, ADV7180_REG_HUE, -val); 543 break; 544 case V4L2_CID_CONTRAST: 545 ret = adv7180_write(state, ADV7180_REG_CON, val); 546 break; 547 case V4L2_CID_SATURATION: 548 /* 549 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE 550 *Let's not confuse the user, everybody understands saturation 551 */ 552 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val); 553 if (ret < 0) 554 break; 555 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val); 556 break; 557 case V4L2_CID_ADV_FAST_SWITCH: 558 if (ctrl->val) { 559 /* ADI required write */ 560 adv7180_write(state, 0x80d9, 0x44); 561 adv7180_write(state, ADV7180_REG_FLCONTROL, 562 ADV7180_FLCONTROL_FL_ENABLE); 563 } else { 564 /* ADI required write */ 565 adv7180_write(state, 0x80d9, 0xc4); 566 adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00); 567 } 568 break; 569 default: 570 ret = -EINVAL; 571 } 572 573 mutex_unlock(&state->mutex); 574 return ret; 575 } 576 577 static const struct v4l2_ctrl_ops adv7180_ctrl_ops = { 578 .s_ctrl = adv7180_s_ctrl, 579 }; 580 581 static const struct v4l2_ctrl_config adv7180_ctrl_fast_switch = { 582 .ops = &adv7180_ctrl_ops, 583 .id = V4L2_CID_ADV_FAST_SWITCH, 584 .name = "Fast Switching", 585 .type = V4L2_CTRL_TYPE_BOOLEAN, 586 .min = 0, 587 .max = 1, 588 .step = 1, 589 }; 590 591 static int adv7180_init_controls(struct adv7180_state *state) 592 { 593 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4); 594 595 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, 596 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN, 597 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF); 598 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, 599 V4L2_CID_CONTRAST, ADV7180_CON_MIN, 600 ADV7180_CON_MAX, 1, ADV7180_CON_DEF); 601 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, 602 V4L2_CID_SATURATION, ADV7180_SAT_MIN, 603 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF); 604 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, 605 V4L2_CID_HUE, ADV7180_HUE_MIN, 606 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF); 607 v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL); 608 609 state->sd.ctrl_handler = &state->ctrl_hdl; 610 if (state->ctrl_hdl.error) { 611 int err = state->ctrl_hdl.error; 612 613 v4l2_ctrl_handler_free(&state->ctrl_hdl); 614 return err; 615 } 616 v4l2_ctrl_handler_setup(&state->ctrl_hdl); 617 618 return 0; 619 } 620 static void adv7180_exit_controls(struct adv7180_state *state) 621 { 622 v4l2_ctrl_handler_free(&state->ctrl_hdl); 623 } 624 625 static int adv7180_enum_mbus_code(struct v4l2_subdev *sd, 626 struct v4l2_subdev_pad_config *cfg, 627 struct v4l2_subdev_mbus_code_enum *code) 628 { 629 if (code->index != 0) 630 return -EINVAL; 631 632 code->code = MEDIA_BUS_FMT_UYVY8_2X8; 633 634 return 0; 635 } 636 637 static int adv7180_mbus_fmt(struct v4l2_subdev *sd, 638 struct v4l2_mbus_framefmt *fmt) 639 { 640 struct adv7180_state *state = to_state(sd); 641 642 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; 643 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M; 644 fmt->width = 720; 645 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576; 646 647 return 0; 648 } 649 650 static int adv7180_set_field_mode(struct adv7180_state *state) 651 { 652 if (!(state->chip_info->flags & ADV7180_FLAG_I2P)) 653 return 0; 654 655 if (state->field == V4L2_FIELD_NONE) { 656 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 657 adv7180_csi_write(state, 0x01, 0x20); 658 adv7180_csi_write(state, 0x02, 0x28); 659 adv7180_csi_write(state, 0x03, 0x38); 660 adv7180_csi_write(state, 0x04, 0x30); 661 adv7180_csi_write(state, 0x05, 0x30); 662 adv7180_csi_write(state, 0x06, 0x80); 663 adv7180_csi_write(state, 0x07, 0x70); 664 adv7180_csi_write(state, 0x08, 0x50); 665 } 666 adv7180_vpp_write(state, 0xa3, 0x00); 667 adv7180_vpp_write(state, 0x5b, 0x00); 668 adv7180_vpp_write(state, 0x55, 0x80); 669 } else { 670 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 671 adv7180_csi_write(state, 0x01, 0x18); 672 adv7180_csi_write(state, 0x02, 0x18); 673 adv7180_csi_write(state, 0x03, 0x30); 674 adv7180_csi_write(state, 0x04, 0x20); 675 adv7180_csi_write(state, 0x05, 0x28); 676 adv7180_csi_write(state, 0x06, 0x40); 677 adv7180_csi_write(state, 0x07, 0x58); 678 adv7180_csi_write(state, 0x08, 0x30); 679 } 680 adv7180_vpp_write(state, 0xa3, 0x70); 681 adv7180_vpp_write(state, 0x5b, 0x80); 682 adv7180_vpp_write(state, 0x55, 0x00); 683 } 684 685 return 0; 686 } 687 688 static int adv7180_get_pad_format(struct v4l2_subdev *sd, 689 struct v4l2_subdev_pad_config *cfg, 690 struct v4l2_subdev_format *format) 691 { 692 struct adv7180_state *state = to_state(sd); 693 694 if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 695 format->format = *v4l2_subdev_get_try_format(sd, cfg, 0); 696 } else { 697 adv7180_mbus_fmt(sd, &format->format); 698 format->format.field = state->field; 699 } 700 701 return 0; 702 } 703 704 static int adv7180_set_pad_format(struct v4l2_subdev *sd, 705 struct v4l2_subdev_pad_config *cfg, 706 struct v4l2_subdev_format *format) 707 { 708 struct adv7180_state *state = to_state(sd); 709 struct v4l2_mbus_framefmt *framefmt; 710 int ret; 711 712 switch (format->format.field) { 713 case V4L2_FIELD_NONE: 714 if (!(state->chip_info->flags & ADV7180_FLAG_I2P)) 715 format->format.field = V4L2_FIELD_INTERLACED; 716 break; 717 default: 718 format->format.field = V4L2_FIELD_INTERLACED; 719 break; 720 } 721 722 ret = adv7180_mbus_fmt(sd, &format->format); 723 724 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 725 if (state->field != format->format.field) { 726 state->field = format->format.field; 727 adv7180_set_power(state, false); 728 adv7180_set_field_mode(state); 729 adv7180_set_power(state, true); 730 } 731 } else { 732 framefmt = v4l2_subdev_get_try_format(sd, cfg, 0); 733 *framefmt = format->format; 734 } 735 736 return ret; 737 } 738 739 static int adv7180_g_mbus_config(struct v4l2_subdev *sd, 740 struct v4l2_mbus_config *cfg) 741 { 742 struct adv7180_state *state = to_state(sd); 743 744 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 745 cfg->type = V4L2_MBUS_CSI2; 746 cfg->flags = V4L2_MBUS_CSI2_1_LANE | 747 V4L2_MBUS_CSI2_CHANNEL_0 | 748 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; 749 } else { 750 /* 751 * The ADV7180 sensor supports BT.601/656 output modes. 752 * The BT.656 is default and not yet configurable by s/w. 753 */ 754 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | 755 V4L2_MBUS_DATA_ACTIVE_HIGH; 756 cfg->type = V4L2_MBUS_BT656; 757 } 758 759 return 0; 760 } 761 762 static int adv7180_g_pixelaspect(struct v4l2_subdev *sd, struct v4l2_fract *aspect) 763 { 764 struct adv7180_state *state = to_state(sd); 765 766 if (state->curr_norm & V4L2_STD_525_60) { 767 aspect->numerator = 11; 768 aspect->denominator = 10; 769 } else { 770 aspect->numerator = 54; 771 aspect->denominator = 59; 772 } 773 774 return 0; 775 } 776 777 static int adv7180_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm) 778 { 779 *norm = V4L2_STD_ALL; 780 return 0; 781 } 782 783 static int adv7180_s_stream(struct v4l2_subdev *sd, int enable) 784 { 785 struct adv7180_state *state = to_state(sd); 786 int ret; 787 788 /* It's always safe to stop streaming, no need to take the lock */ 789 if (!enable) { 790 state->streaming = enable; 791 return 0; 792 } 793 794 /* Must wait until querystd released the lock */ 795 ret = mutex_lock_interruptible(&state->mutex); 796 if (ret) 797 return ret; 798 state->streaming = enable; 799 mutex_unlock(&state->mutex); 800 return 0; 801 } 802 803 static int adv7180_subscribe_event(struct v4l2_subdev *sd, 804 struct v4l2_fh *fh, 805 struct v4l2_event_subscription *sub) 806 { 807 switch (sub->type) { 808 case V4L2_EVENT_SOURCE_CHANGE: 809 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub); 810 case V4L2_EVENT_CTRL: 811 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub); 812 default: 813 return -EINVAL; 814 } 815 } 816 817 static const struct v4l2_subdev_video_ops adv7180_video_ops = { 818 .s_std = adv7180_s_std, 819 .g_std = adv7180_g_std, 820 .querystd = adv7180_querystd, 821 .g_input_status = adv7180_g_input_status, 822 .s_routing = adv7180_s_routing, 823 .g_mbus_config = adv7180_g_mbus_config, 824 .g_pixelaspect = adv7180_g_pixelaspect, 825 .g_tvnorms = adv7180_g_tvnorms, 826 .s_stream = adv7180_s_stream, 827 }; 828 829 static const struct v4l2_subdev_core_ops adv7180_core_ops = { 830 .s_power = adv7180_s_power, 831 .subscribe_event = adv7180_subscribe_event, 832 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 833 }; 834 835 static const struct v4l2_subdev_pad_ops adv7180_pad_ops = { 836 .enum_mbus_code = adv7180_enum_mbus_code, 837 .set_fmt = adv7180_set_pad_format, 838 .get_fmt = adv7180_get_pad_format, 839 }; 840 841 static const struct v4l2_subdev_ops adv7180_ops = { 842 .core = &adv7180_core_ops, 843 .video = &adv7180_video_ops, 844 .pad = &adv7180_pad_ops, 845 }; 846 847 static irqreturn_t adv7180_irq(int irq, void *devid) 848 { 849 struct adv7180_state *state = devid; 850 u8 isr3; 851 852 mutex_lock(&state->mutex); 853 isr3 = adv7180_read(state, ADV7180_REG_ISR3); 854 /* clear */ 855 adv7180_write(state, ADV7180_REG_ICR3, isr3); 856 857 if (isr3 & ADV7180_IRQ3_AD_CHANGE) { 858 static const struct v4l2_event src_ch = { 859 .type = V4L2_EVENT_SOURCE_CHANGE, 860 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, 861 }; 862 863 v4l2_subdev_notify_event(&state->sd, &src_ch); 864 } 865 mutex_unlock(&state->mutex); 866 867 return IRQ_HANDLED; 868 } 869 870 static int adv7180_init(struct adv7180_state *state) 871 { 872 int ret; 873 874 /* ITU-R BT.656-4 compatible */ 875 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 876 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS); 877 if (ret < 0) 878 return ret; 879 880 /* Manually set V bit end position in NTSC mode */ 881 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END, 882 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND); 883 } 884 885 static int adv7180_set_std(struct adv7180_state *state, unsigned int std) 886 { 887 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, 888 (std << 4) | state->input); 889 } 890 891 static int adv7180_select_input(struct adv7180_state *state, unsigned int input) 892 { 893 int ret; 894 895 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL); 896 if (ret < 0) 897 return ret; 898 899 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK; 900 ret |= input; 901 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret); 902 } 903 904 static int adv7182_init(struct adv7180_state *state) 905 { 906 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) 907 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR, 908 ADV7180_DEFAULT_CSI_I2C_ADDR << 1); 909 910 if (state->chip_info->flags & ADV7180_FLAG_I2P) 911 adv7180_write(state, ADV7180_REG_VPP_SLAVE_ADDR, 912 ADV7180_DEFAULT_VPP_I2C_ADDR << 1); 913 914 if (state->chip_info->flags & ADV7180_FLAG_V2) { 915 /* ADI recommended writes for improved video quality */ 916 adv7180_write(state, 0x0080, 0x51); 917 adv7180_write(state, 0x0081, 0x51); 918 adv7180_write(state, 0x0082, 0x68); 919 } 920 921 /* ADI required writes */ 922 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 923 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x4e); 924 adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 0x57); 925 adv7180_write(state, ADV7180_REG_CTRL_2, 0xc0); 926 } else { 927 if (state->chip_info->flags & ADV7180_FLAG_V2) 928 adv7180_write(state, 929 ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 930 0x17); 931 else 932 adv7180_write(state, 933 ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 934 0x07); 935 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x0c); 936 adv7180_write(state, ADV7180_REG_CTRL_2, 0x40); 937 } 938 939 adv7180_write(state, 0x0013, 0x00); 940 941 return 0; 942 } 943 944 static int adv7182_set_std(struct adv7180_state *state, unsigned int std) 945 { 946 return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4); 947 } 948 949 enum adv7182_input_type { 950 ADV7182_INPUT_TYPE_CVBS, 951 ADV7182_INPUT_TYPE_DIFF_CVBS, 952 ADV7182_INPUT_TYPE_SVIDEO, 953 ADV7182_INPUT_TYPE_YPBPR, 954 }; 955 956 static enum adv7182_input_type adv7182_get_input_type(unsigned int input) 957 { 958 switch (input) { 959 case ADV7182_INPUT_CVBS_AIN1: 960 case ADV7182_INPUT_CVBS_AIN2: 961 case ADV7182_INPUT_CVBS_AIN3: 962 case ADV7182_INPUT_CVBS_AIN4: 963 case ADV7182_INPUT_CVBS_AIN5: 964 case ADV7182_INPUT_CVBS_AIN6: 965 case ADV7182_INPUT_CVBS_AIN7: 966 case ADV7182_INPUT_CVBS_AIN8: 967 return ADV7182_INPUT_TYPE_CVBS; 968 case ADV7182_INPUT_SVIDEO_AIN1_AIN2: 969 case ADV7182_INPUT_SVIDEO_AIN3_AIN4: 970 case ADV7182_INPUT_SVIDEO_AIN5_AIN6: 971 case ADV7182_INPUT_SVIDEO_AIN7_AIN8: 972 return ADV7182_INPUT_TYPE_SVIDEO; 973 case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3: 974 case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6: 975 return ADV7182_INPUT_TYPE_YPBPR; 976 case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2: 977 case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4: 978 case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6: 979 case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8: 980 return ADV7182_INPUT_TYPE_DIFF_CVBS; 981 default: /* Will never happen */ 982 return 0; 983 } 984 } 985 986 /* ADI recommended writes to registers 0x52, 0x53, 0x54 */ 987 static unsigned int adv7182_lbias_settings[][3] = { 988 [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 }, 989 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 }, 990 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 }, 991 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 }, 992 }; 993 994 static unsigned int adv7280_lbias_settings[][3] = { 995 [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 }, 996 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 }, 997 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 }, 998 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 }, 999 }; 1000 1001 static int adv7182_select_input(struct adv7180_state *state, unsigned int input) 1002 { 1003 enum adv7182_input_type input_type; 1004 unsigned int *lbias; 1005 unsigned int i; 1006 int ret; 1007 1008 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input); 1009 if (ret) 1010 return ret; 1011 1012 /* Reset clamp circuitry - ADI recommended writes */ 1013 adv7180_write(state, ADV7180_REG_RST_CLAMP, 0x00); 1014 adv7180_write(state, ADV7180_REG_RST_CLAMP, 0xff); 1015 1016 input_type = adv7182_get_input_type(input); 1017 1018 switch (input_type) { 1019 case ADV7182_INPUT_TYPE_CVBS: 1020 case ADV7182_INPUT_TYPE_DIFF_CVBS: 1021 /* ADI recommends to use the SH1 filter */ 1022 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x41); 1023 break; 1024 default: 1025 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x01); 1026 break; 1027 } 1028 1029 if (state->chip_info->flags & ADV7180_FLAG_V2) 1030 lbias = adv7280_lbias_settings[input_type]; 1031 else 1032 lbias = adv7182_lbias_settings[input_type]; 1033 1034 for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++) 1035 adv7180_write(state, ADV7180_REG_CVBS_TRIM + i, lbias[i]); 1036 1037 if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) { 1038 /* ADI required writes to make differential CVBS work */ 1039 adv7180_write(state, ADV7180_REG_RES_CIR, 0xa8); 1040 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0x90); 1041 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0xb0); 1042 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x08); 1043 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0xa0); 1044 } else { 1045 adv7180_write(state, ADV7180_REG_RES_CIR, 0xf0); 1046 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0xd0); 1047 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0x10); 1048 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x9c); 1049 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0x00); 1050 } 1051 1052 return 0; 1053 } 1054 1055 static const struct adv7180_chip_info adv7180_info = { 1056 .flags = ADV7180_FLAG_RESET_POWERED, 1057 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept 1058 * all inputs and let the card driver take care of validation 1059 */ 1060 .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) | 1061 BIT(ADV7180_INPUT_CVBS_AIN2) | 1062 BIT(ADV7180_INPUT_CVBS_AIN3) | 1063 BIT(ADV7180_INPUT_CVBS_AIN4) | 1064 BIT(ADV7180_INPUT_CVBS_AIN5) | 1065 BIT(ADV7180_INPUT_CVBS_AIN6) | 1066 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) | 1067 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) | 1068 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) | 1069 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) | 1070 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6), 1071 .init = adv7180_init, 1072 .set_std = adv7180_set_std, 1073 .select_input = adv7180_select_input, 1074 }; 1075 1076 static const struct adv7180_chip_info adv7182_info = { 1077 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1078 BIT(ADV7182_INPUT_CVBS_AIN2) | 1079 BIT(ADV7182_INPUT_CVBS_AIN3) | 1080 BIT(ADV7182_INPUT_CVBS_AIN4) | 1081 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1082 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1083 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) | 1084 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1085 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4), 1086 .init = adv7182_init, 1087 .set_std = adv7182_set_std, 1088 .select_input = adv7182_select_input, 1089 }; 1090 1091 static const struct adv7180_chip_info adv7280_info = { 1092 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P, 1093 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1094 BIT(ADV7182_INPUT_CVBS_AIN2) | 1095 BIT(ADV7182_INPUT_CVBS_AIN3) | 1096 BIT(ADV7182_INPUT_CVBS_AIN4) | 1097 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1098 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1099 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3), 1100 .init = adv7182_init, 1101 .set_std = adv7182_set_std, 1102 .select_input = adv7182_select_input, 1103 }; 1104 1105 static const struct adv7180_chip_info adv7280_m_info = { 1106 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P, 1107 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1108 BIT(ADV7182_INPUT_CVBS_AIN2) | 1109 BIT(ADV7182_INPUT_CVBS_AIN3) | 1110 BIT(ADV7182_INPUT_CVBS_AIN4) | 1111 BIT(ADV7182_INPUT_CVBS_AIN5) | 1112 BIT(ADV7182_INPUT_CVBS_AIN6) | 1113 BIT(ADV7182_INPUT_CVBS_AIN7) | 1114 BIT(ADV7182_INPUT_CVBS_AIN8) | 1115 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1116 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1117 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) | 1118 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1119 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) | 1120 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6), 1121 .init = adv7182_init, 1122 .set_std = adv7182_set_std, 1123 .select_input = adv7182_select_input, 1124 }; 1125 1126 static const struct adv7180_chip_info adv7281_info = { 1127 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2, 1128 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1129 BIT(ADV7182_INPUT_CVBS_AIN2) | 1130 BIT(ADV7182_INPUT_CVBS_AIN7) | 1131 BIT(ADV7182_INPUT_CVBS_AIN8) | 1132 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1133 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1134 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1135 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), 1136 .init = adv7182_init, 1137 .set_std = adv7182_set_std, 1138 .select_input = adv7182_select_input, 1139 }; 1140 1141 static const struct adv7180_chip_info adv7281_m_info = { 1142 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2, 1143 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1144 BIT(ADV7182_INPUT_CVBS_AIN2) | 1145 BIT(ADV7182_INPUT_CVBS_AIN3) | 1146 BIT(ADV7182_INPUT_CVBS_AIN4) | 1147 BIT(ADV7182_INPUT_CVBS_AIN7) | 1148 BIT(ADV7182_INPUT_CVBS_AIN8) | 1149 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1150 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1151 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1152 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) | 1153 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1154 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) | 1155 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), 1156 .init = adv7182_init, 1157 .set_std = adv7182_set_std, 1158 .select_input = adv7182_select_input, 1159 }; 1160 1161 static const struct adv7180_chip_info adv7281_ma_info = { 1162 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2, 1163 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1164 BIT(ADV7182_INPUT_CVBS_AIN2) | 1165 BIT(ADV7182_INPUT_CVBS_AIN3) | 1166 BIT(ADV7182_INPUT_CVBS_AIN4) | 1167 BIT(ADV7182_INPUT_CVBS_AIN5) | 1168 BIT(ADV7182_INPUT_CVBS_AIN6) | 1169 BIT(ADV7182_INPUT_CVBS_AIN7) | 1170 BIT(ADV7182_INPUT_CVBS_AIN8) | 1171 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1172 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1173 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) | 1174 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1175 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) | 1176 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) | 1177 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1178 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) | 1179 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) | 1180 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), 1181 .init = adv7182_init, 1182 .set_std = adv7182_set_std, 1183 .select_input = adv7182_select_input, 1184 }; 1185 1186 static const struct adv7180_chip_info adv7282_info = { 1187 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P, 1188 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1189 BIT(ADV7182_INPUT_CVBS_AIN2) | 1190 BIT(ADV7182_INPUT_CVBS_AIN7) | 1191 BIT(ADV7182_INPUT_CVBS_AIN8) | 1192 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1193 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1194 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1195 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), 1196 .init = adv7182_init, 1197 .set_std = adv7182_set_std, 1198 .select_input = adv7182_select_input, 1199 }; 1200 1201 static const struct adv7180_chip_info adv7282_m_info = { 1202 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P, 1203 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) | 1204 BIT(ADV7182_INPUT_CVBS_AIN2) | 1205 BIT(ADV7182_INPUT_CVBS_AIN3) | 1206 BIT(ADV7182_INPUT_CVBS_AIN4) | 1207 BIT(ADV7182_INPUT_CVBS_AIN7) | 1208 BIT(ADV7182_INPUT_CVBS_AIN8) | 1209 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | 1210 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | 1211 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | 1212 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | 1213 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) | 1214 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), 1215 .init = adv7182_init, 1216 .set_std = adv7182_set_std, 1217 .select_input = adv7182_select_input, 1218 }; 1219 1220 static int init_device(struct adv7180_state *state) 1221 { 1222 int ret; 1223 1224 mutex_lock(&state->mutex); 1225 1226 adv7180_set_power_pin(state, true); 1227 1228 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES); 1229 usleep_range(5000, 10000); 1230 1231 ret = state->chip_info->init(state); 1232 if (ret) 1233 goto out_unlock; 1234 1235 ret = adv7180_program_std(state); 1236 if (ret) 1237 goto out_unlock; 1238 1239 adv7180_set_field_mode(state); 1240 1241 /* register for interrupts */ 1242 if (state->irq > 0) { 1243 /* config the Interrupt pin to be active low */ 1244 ret = adv7180_write(state, ADV7180_REG_ICONF1, 1245 ADV7180_ICONF1_ACTIVE_LOW | 1246 ADV7180_ICONF1_PSYNC_ONLY); 1247 if (ret < 0) 1248 goto out_unlock; 1249 1250 ret = adv7180_write(state, ADV7180_REG_IMR1, 0); 1251 if (ret < 0) 1252 goto out_unlock; 1253 1254 ret = adv7180_write(state, ADV7180_REG_IMR2, 0); 1255 if (ret < 0) 1256 goto out_unlock; 1257 1258 /* enable AD change interrupts interrupts */ 1259 ret = adv7180_write(state, ADV7180_REG_IMR3, 1260 ADV7180_IRQ3_AD_CHANGE); 1261 if (ret < 0) 1262 goto out_unlock; 1263 1264 ret = adv7180_write(state, ADV7180_REG_IMR4, 0); 1265 if (ret < 0) 1266 goto out_unlock; 1267 } 1268 1269 out_unlock: 1270 mutex_unlock(&state->mutex); 1271 1272 return ret; 1273 } 1274 1275 static int adv7180_probe(struct i2c_client *client, 1276 const struct i2c_device_id *id) 1277 { 1278 struct adv7180_state *state; 1279 struct v4l2_subdev *sd; 1280 int ret; 1281 1282 /* Check if the adapter supports the needed features */ 1283 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1284 return -EIO; 1285 1286 v4l_info(client, "chip found @ 0x%02x (%s)\n", 1287 client->addr, client->adapter->name); 1288 1289 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL); 1290 if (state == NULL) 1291 return -ENOMEM; 1292 1293 state->client = client; 1294 state->field = V4L2_FIELD_INTERLACED; 1295 state->chip_info = (struct adv7180_chip_info *)id->driver_data; 1296 1297 state->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown", 1298 GPIOD_OUT_HIGH); 1299 if (IS_ERR(state->pwdn_gpio)) { 1300 ret = PTR_ERR(state->pwdn_gpio); 1301 v4l_err(client, "request for power pin failed: %d\n", ret); 1302 return ret; 1303 } 1304 1305 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 1306 state->csi_client = i2c_new_dummy(client->adapter, 1307 ADV7180_DEFAULT_CSI_I2C_ADDR); 1308 if (!state->csi_client) 1309 return -ENOMEM; 1310 } 1311 1312 if (state->chip_info->flags & ADV7180_FLAG_I2P) { 1313 state->vpp_client = i2c_new_dummy(client->adapter, 1314 ADV7180_DEFAULT_VPP_I2C_ADDR); 1315 if (!state->vpp_client) { 1316 ret = -ENOMEM; 1317 goto err_unregister_csi_client; 1318 } 1319 } 1320 1321 state->irq = client->irq; 1322 mutex_init(&state->mutex); 1323 state->curr_norm = V4L2_STD_NTSC; 1324 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED) 1325 state->powered = true; 1326 else 1327 state->powered = false; 1328 state->input = 0; 1329 sd = &state->sd; 1330 v4l2_i2c_subdev_init(sd, client, &adv7180_ops); 1331 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; 1332 1333 ret = adv7180_init_controls(state); 1334 if (ret) 1335 goto err_unregister_vpp_client; 1336 1337 state->pad.flags = MEDIA_PAD_FL_SOURCE; 1338 sd->entity.flags |= MEDIA_ENT_F_ATV_DECODER; 1339 ret = media_entity_pads_init(&sd->entity, 1, &state->pad); 1340 if (ret) 1341 goto err_free_ctrl; 1342 1343 ret = init_device(state); 1344 if (ret) 1345 goto err_media_entity_cleanup; 1346 1347 if (state->irq) { 1348 ret = request_threaded_irq(client->irq, NULL, adv7180_irq, 1349 IRQF_ONESHOT | IRQF_TRIGGER_FALLING, 1350 KBUILD_MODNAME, state); 1351 if (ret) 1352 goto err_media_entity_cleanup; 1353 } 1354 1355 ret = v4l2_async_register_subdev(sd); 1356 if (ret) 1357 goto err_free_irq; 1358 1359 return 0; 1360 1361 err_free_irq: 1362 if (state->irq > 0) 1363 free_irq(client->irq, state); 1364 err_media_entity_cleanup: 1365 media_entity_cleanup(&sd->entity); 1366 err_free_ctrl: 1367 adv7180_exit_controls(state); 1368 err_unregister_vpp_client: 1369 if (state->chip_info->flags & ADV7180_FLAG_I2P) 1370 i2c_unregister_device(state->vpp_client); 1371 err_unregister_csi_client: 1372 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) 1373 i2c_unregister_device(state->csi_client); 1374 mutex_destroy(&state->mutex); 1375 return ret; 1376 } 1377 1378 static int adv7180_remove(struct i2c_client *client) 1379 { 1380 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1381 struct adv7180_state *state = to_state(sd); 1382 1383 v4l2_async_unregister_subdev(sd); 1384 1385 if (state->irq > 0) 1386 free_irq(client->irq, state); 1387 1388 media_entity_cleanup(&sd->entity); 1389 adv7180_exit_controls(state); 1390 1391 if (state->chip_info->flags & ADV7180_FLAG_I2P) 1392 i2c_unregister_device(state->vpp_client); 1393 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) 1394 i2c_unregister_device(state->csi_client); 1395 1396 adv7180_set_power_pin(state, false); 1397 1398 mutex_destroy(&state->mutex); 1399 1400 return 0; 1401 } 1402 1403 static const struct i2c_device_id adv7180_id[] = { 1404 { "adv7180", (kernel_ulong_t)&adv7180_info }, 1405 { "adv7182", (kernel_ulong_t)&adv7182_info }, 1406 { "adv7280", (kernel_ulong_t)&adv7280_info }, 1407 { "adv7280-m", (kernel_ulong_t)&adv7280_m_info }, 1408 { "adv7281", (kernel_ulong_t)&adv7281_info }, 1409 { "adv7281-m", (kernel_ulong_t)&adv7281_m_info }, 1410 { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info }, 1411 { "adv7282", (kernel_ulong_t)&adv7282_info }, 1412 { "adv7282-m", (kernel_ulong_t)&adv7282_m_info }, 1413 {}, 1414 }; 1415 MODULE_DEVICE_TABLE(i2c, adv7180_id); 1416 1417 #ifdef CONFIG_PM_SLEEP 1418 static int adv7180_suspend(struct device *dev) 1419 { 1420 struct i2c_client *client = to_i2c_client(dev); 1421 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1422 struct adv7180_state *state = to_state(sd); 1423 1424 return adv7180_set_power(state, false); 1425 } 1426 1427 static int adv7180_resume(struct device *dev) 1428 { 1429 struct i2c_client *client = to_i2c_client(dev); 1430 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1431 struct adv7180_state *state = to_state(sd); 1432 int ret; 1433 1434 ret = init_device(state); 1435 if (ret < 0) 1436 return ret; 1437 1438 ret = adv7180_set_power(state, state->powered); 1439 if (ret) 1440 return ret; 1441 1442 return 0; 1443 } 1444 1445 static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume); 1446 #define ADV7180_PM_OPS (&adv7180_pm_ops) 1447 1448 #else 1449 #define ADV7180_PM_OPS NULL 1450 #endif 1451 1452 #ifdef CONFIG_OF 1453 static const struct of_device_id adv7180_of_id[] = { 1454 { .compatible = "adi,adv7180", }, 1455 { .compatible = "adi,adv7182", }, 1456 { .compatible = "adi,adv7280", }, 1457 { .compatible = "adi,adv7280-m", }, 1458 { .compatible = "adi,adv7281", }, 1459 { .compatible = "adi,adv7281-m", }, 1460 { .compatible = "adi,adv7281-ma", }, 1461 { .compatible = "adi,adv7282", }, 1462 { .compatible = "adi,adv7282-m", }, 1463 { }, 1464 }; 1465 1466 MODULE_DEVICE_TABLE(of, adv7180_of_id); 1467 #endif 1468 1469 static struct i2c_driver adv7180_driver = { 1470 .driver = { 1471 .name = KBUILD_MODNAME, 1472 .pm = ADV7180_PM_OPS, 1473 .of_match_table = of_match_ptr(adv7180_of_id), 1474 }, 1475 .probe = adv7180_probe, 1476 .remove = adv7180_remove, 1477 .id_table = adv7180_id, 1478 }; 1479 1480 module_i2c_driver(adv7180_driver); 1481 1482 MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver"); 1483 MODULE_AUTHOR("Mocean Laboratories"); 1484 MODULE_LICENSE("GPL v2"); 1485