1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * w6692.c mISDN driver for Winbond w6692 based cards 4 * 5 * Author Karsten Keil <kkeil@suse.de> 6 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 7 * 8 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 9 */ 10 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/pci.h> 14 #include <linux/delay.h> 15 #include <linux/mISDNhw.h> 16 #include <linux/slab.h> 17 #include "w6692.h" 18 19 #define W6692_REV "2.0" 20 21 #define DBUSY_TIMER_VALUE 80 22 23 enum { 24 W6692_ASUS, 25 W6692_WINBOND, 26 W6692_USR 27 }; 28 29 /* private data in the PCI devices list */ 30 struct w6692map { 31 u_int subtype; 32 char *name; 33 }; 34 35 static const struct w6692map w6692_map[] = 36 { 37 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 38 {W6692_WINBOND, "Winbond W6692"}, 39 {W6692_USR, "USR W6692"} 40 }; 41 42 #define PCI_DEVICE_ID_USR_6692 0x3409 43 44 struct w6692_ch { 45 struct bchannel bch; 46 u32 addr; 47 struct timer_list timer; 48 u8 b_mode; 49 }; 50 51 struct w6692_hw { 52 struct list_head list; 53 struct pci_dev *pdev; 54 char name[MISDN_MAX_IDLEN]; 55 u32 irq; 56 u32 irqcnt; 57 u32 addr; 58 u32 fmask; /* feature mask - bit set per card nr */ 59 int subtype; 60 spinlock_t lock; /* hw lock */ 61 u8 imask; 62 u8 pctl; 63 u8 xaddr; 64 u8 xdata; 65 u8 state; 66 struct w6692_ch bc[2]; 67 struct dchannel dch; 68 char log[64]; 69 }; 70 71 static LIST_HEAD(Cards); 72 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 73 74 static int w6692_cnt; 75 static int debug; 76 static u32 led; 77 static u32 pots; 78 79 static void 80 _set_debug(struct w6692_hw *card) 81 { 82 card->dch.debug = debug; 83 card->bc[0].bch.debug = debug; 84 card->bc[1].bch.debug = debug; 85 } 86 87 static int 88 set_debug(const char *val, const struct kernel_param *kp) 89 { 90 int ret; 91 struct w6692_hw *card; 92 93 ret = param_set_uint(val, kp); 94 if (!ret) { 95 read_lock(&card_lock); 96 list_for_each_entry(card, &Cards, list) 97 _set_debug(card); 98 read_unlock(&card_lock); 99 } 100 return ret; 101 } 102 103 MODULE_AUTHOR("Karsten Keil"); 104 MODULE_LICENSE("GPL v2"); 105 MODULE_VERSION(W6692_REV); 106 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(debug, "W6692 debug mask"); 108 module_param(led, uint, S_IRUGO | S_IWUSR); 109 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 110 module_param(pots, uint, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 112 113 static inline u8 114 ReadW6692(struct w6692_hw *card, u8 offset) 115 { 116 return inb(card->addr + offset); 117 } 118 119 static inline void 120 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 121 { 122 outb(value, card->addr + offset); 123 } 124 125 static inline u8 126 ReadW6692B(struct w6692_ch *bc, u8 offset) 127 { 128 return inb(bc->addr + offset); 129 } 130 131 static inline void 132 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 133 { 134 outb(value, bc->addr + offset); 135 } 136 137 static void 138 enable_hwirq(struct w6692_hw *card) 139 { 140 WriteW6692(card, W_IMASK, card->imask); 141 } 142 143 static void 144 disable_hwirq(struct w6692_hw *card) 145 { 146 WriteW6692(card, W_IMASK, 0xff); 147 } 148 149 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 150 151 static void 152 W6692Version(struct w6692_hw *card) 153 { 154 int val; 155 156 val = ReadW6692(card, W_D_RBCH); 157 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 158 W6692Ver[(val >> 6) & 3]); 159 } 160 161 static void 162 w6692_led_handler(struct w6692_hw *card, int on) 163 { 164 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 165 return; 166 if (on) { 167 card->xdata &= 0xfb; /* LED ON */ 168 WriteW6692(card, W_XDATA, card->xdata); 169 } else { 170 card->xdata |= 0x04; /* LED OFF */ 171 WriteW6692(card, W_XDATA, card->xdata); 172 } 173 } 174 175 static void 176 ph_command(struct w6692_hw *card, u8 cmd) 177 { 178 pr_debug("%s: ph_command %x\n", card->name, cmd); 179 WriteW6692(card, W_CIX, cmd); 180 } 181 182 static void 183 W6692_new_ph(struct w6692_hw *card) 184 { 185 if (card->state == W_L1CMD_RST) 186 ph_command(card, W_L1CMD_DRC); 187 schedule_event(&card->dch, FLG_PHCHANGE); 188 } 189 190 static void 191 W6692_ph_bh(struct dchannel *dch) 192 { 193 struct w6692_hw *card = dch->hw; 194 195 switch (card->state) { 196 case W_L1CMD_RST: 197 dch->state = 0; 198 l1_event(dch->l1, HW_RESET_IND); 199 break; 200 case W_L1IND_CD: 201 dch->state = 3; 202 l1_event(dch->l1, HW_DEACT_CNF); 203 break; 204 case W_L1IND_DRD: 205 dch->state = 3; 206 l1_event(dch->l1, HW_DEACT_IND); 207 break; 208 case W_L1IND_CE: 209 dch->state = 4; 210 l1_event(dch->l1, HW_POWERUP_IND); 211 break; 212 case W_L1IND_LD: 213 if (dch->state <= 5) { 214 dch->state = 5; 215 l1_event(dch->l1, ANYSIGNAL); 216 } else { 217 dch->state = 8; 218 l1_event(dch->l1, LOSTFRAMING); 219 } 220 break; 221 case W_L1IND_ARD: 222 dch->state = 6; 223 l1_event(dch->l1, INFO2); 224 break; 225 case W_L1IND_AI8: 226 dch->state = 7; 227 l1_event(dch->l1, INFO4_P8); 228 break; 229 case W_L1IND_AI10: 230 dch->state = 7; 231 l1_event(dch->l1, INFO4_P10); 232 break; 233 default: 234 pr_debug("%s: TE unknown state %02x dch state %02x\n", 235 card->name, card->state, dch->state); 236 break; 237 } 238 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 239 } 240 241 static void 242 W6692_empty_Dfifo(struct w6692_hw *card, int count) 243 { 244 struct dchannel *dch = &card->dch; 245 u8 *ptr; 246 247 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 248 if (!dch->rx_skb) { 249 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 250 if (!dch->rx_skb) { 251 pr_info("%s: D receive out of memory\n", card->name); 252 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 253 return; 254 } 255 } 256 if ((dch->rx_skb->len + count) >= dch->maxlen) { 257 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 258 dch->rx_skb->len + count); 259 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 260 return; 261 } 262 ptr = skb_put(dch->rx_skb, count); 263 insb(card->addr + W_D_RFIFO, ptr, count); 264 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 265 if (debug & DEBUG_HW_DFIFO) { 266 snprintf(card->log, 63, "D-recv %s %d ", 267 card->name, count); 268 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 269 } 270 } 271 272 static void 273 W6692_fill_Dfifo(struct w6692_hw *card) 274 { 275 struct dchannel *dch = &card->dch; 276 int count; 277 u8 *ptr; 278 u8 cmd = W_D_CMDR_XMS; 279 280 pr_debug("%s: fill_Dfifo\n", card->name); 281 if (!dch->tx_skb) 282 return; 283 count = dch->tx_skb->len - dch->tx_idx; 284 if (count <= 0) 285 return; 286 if (count > W_D_FIFO_THRESH) 287 count = W_D_FIFO_THRESH; 288 else 289 cmd |= W_D_CMDR_XME; 290 ptr = dch->tx_skb->data + dch->tx_idx; 291 dch->tx_idx += count; 292 outsb(card->addr + W_D_XFIFO, ptr, count); 293 WriteW6692(card, W_D_CMDR, cmd); 294 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 295 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 296 del_timer(&dch->timer); 297 } 298 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 299 add_timer(&dch->timer); 300 if (debug & DEBUG_HW_DFIFO) { 301 snprintf(card->log, 63, "D-send %s %d ", 302 card->name, count); 303 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 304 } 305 } 306 307 static void 308 d_retransmit(struct w6692_hw *card) 309 { 310 struct dchannel *dch = &card->dch; 311 312 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 313 del_timer(&dch->timer); 314 #ifdef FIXME 315 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 316 dchannel_sched_event(dch, D_CLEARBUSY); 317 #endif 318 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 319 /* Restart frame */ 320 dch->tx_idx = 0; 321 W6692_fill_Dfifo(card); 322 } else if (dch->tx_skb) { /* should not happen */ 323 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 324 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 325 dch->tx_idx = 0; 326 W6692_fill_Dfifo(card); 327 } else { 328 pr_info("%s: XDU no TX_BUSY\n", card->name); 329 if (get_next_dframe(dch)) 330 W6692_fill_Dfifo(card); 331 } 332 } 333 334 static void 335 handle_rxD(struct w6692_hw *card) { 336 u8 stat; 337 int count; 338 339 stat = ReadW6692(card, W_D_RSTA); 340 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 341 if (stat & W_D_RSTA_RDOV) { 342 pr_debug("%s: D-channel RDOV\n", card->name); 343 #ifdef ERROR_STATISTIC 344 card->dch.err_rx++; 345 #endif 346 } 347 if (stat & W_D_RSTA_CRCE) { 348 pr_debug("%s: D-channel CRC error\n", card->name); 349 #ifdef ERROR_STATISTIC 350 card->dch.err_crc++; 351 #endif 352 } 353 if (stat & W_D_RSTA_RMB) { 354 pr_debug("%s: D-channel ABORT\n", card->name); 355 #ifdef ERROR_STATISTIC 356 card->dch.err_rx++; 357 #endif 358 } 359 if (card->dch.rx_skb) 360 dev_kfree_skb(card->dch.rx_skb); 361 card->dch.rx_skb = NULL; 362 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 363 } else { 364 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 365 if (count == 0) 366 count = W_D_FIFO_THRESH; 367 W6692_empty_Dfifo(card, count); 368 recv_Dchannel(&card->dch); 369 } 370 } 371 372 static void 373 handle_txD(struct w6692_hw *card) { 374 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 375 del_timer(&card->dch.timer); 376 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 377 W6692_fill_Dfifo(card); 378 } else { 379 if (card->dch.tx_skb) 380 dev_kfree_skb(card->dch.tx_skb); 381 if (get_next_dframe(&card->dch)) 382 W6692_fill_Dfifo(card); 383 } 384 } 385 386 static void 387 handle_statusD(struct w6692_hw *card) 388 { 389 struct dchannel *dch = &card->dch; 390 u8 exval, v1, cir; 391 392 exval = ReadW6692(card, W_D_EXIR); 393 394 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 395 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 396 /* Transmit underrun/collision */ 397 pr_debug("%s: D-channel underrun/collision\n", card->name); 398 #ifdef ERROR_STATISTIC 399 dch->err_tx++; 400 #endif 401 d_retransmit(card); 402 } 403 if (exval & W_D_EXI_RDOV) { /* RDOV */ 404 pr_debug("%s: D-channel RDOV\n", card->name); 405 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 406 } 407 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 408 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 409 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 410 v1 = ReadW6692(card, W_MOSR); 411 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 412 card->name, v1); 413 } 414 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 415 cir = ReadW6692(card, W_CIR); 416 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 417 if (cir & W_CIR_ICC) { 418 v1 = cir & W_CIR_COD_MASK; 419 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 420 dch->state, v1); 421 card->state = v1; 422 if (card->fmask & led) { 423 switch (v1) { 424 case W_L1IND_AI8: 425 case W_L1IND_AI10: 426 w6692_led_handler(card, 1); 427 break; 428 default: 429 w6692_led_handler(card, 0); 430 break; 431 } 432 } 433 W6692_new_ph(card); 434 } 435 if (cir & W_CIR_SCC) { 436 v1 = ReadW6692(card, W_SQR); 437 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 438 } 439 } 440 if (exval & W_D_EXI_WEXP) 441 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 442 if (exval & W_D_EXI_TEXP) 443 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 444 } 445 446 static void 447 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 448 { 449 struct w6692_hw *card = wch->bch.hw; 450 u8 *ptr; 451 int maxlen; 452 453 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 454 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 455 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 456 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 457 if (wch->bch.rx_skb) 458 skb_trim(wch->bch.rx_skb, 0); 459 return; 460 } 461 if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) { 462 wch->bch.dropcnt += count; 463 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 464 return; 465 } 466 maxlen = bchannel_get_rxbuf(&wch->bch, count); 467 if (maxlen < 0) { 468 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 469 if (wch->bch.rx_skb) 470 skb_trim(wch->bch.rx_skb, 0); 471 pr_warning("%s.B%d: No bufferspace for %d bytes\n", 472 card->name, wch->bch.nr, count); 473 return; 474 } 475 ptr = skb_put(wch->bch.rx_skb, count); 476 insb(wch->addr + W_B_RFIFO, ptr, count); 477 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 478 if (debug & DEBUG_HW_DFIFO) { 479 snprintf(card->log, 63, "B%1d-recv %s %d ", 480 wch->bch.nr, card->name, count); 481 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 482 } 483 } 484 485 static void 486 W6692_fill_Bfifo(struct w6692_ch *wch) 487 { 488 struct w6692_hw *card = wch->bch.hw; 489 int count, fillempty = 0; 490 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 491 492 pr_debug("%s: fill Bfifo\n", card->name); 493 if (!wch->bch.tx_skb) { 494 if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) 495 return; 496 ptr = wch->bch.fill; 497 count = W_B_FIFO_THRESH; 498 fillempty = 1; 499 } else { 500 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 501 if (count <= 0) 502 return; 503 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 504 } 505 if (count > W_B_FIFO_THRESH) 506 count = W_B_FIFO_THRESH; 507 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 508 cmd |= W_B_CMDR_XME; 509 510 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 511 count, wch->bch.tx_idx); 512 wch->bch.tx_idx += count; 513 if (fillempty) { 514 while (count > 0) { 515 outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE); 516 count -= MISDN_BCH_FILL_SIZE; 517 } 518 } else { 519 outsb(wch->addr + W_B_XFIFO, ptr, count); 520 } 521 WriteW6692B(wch, W_B_CMDR, cmd); 522 if ((debug & DEBUG_HW_BFIFO) && !fillempty) { 523 snprintf(card->log, 63, "B%1d-send %s %d ", 524 wch->bch.nr, card->name, count); 525 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 526 } 527 } 528 529 #if 0 530 static int 531 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 532 { 533 struct w6692_hw *card = wch->bch.hw; 534 u16 *vol = (u16 *)skb->data; 535 u8 val; 536 537 if ((!(card->fmask & pots)) || 538 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 539 return -ENODEV; 540 if (skb->len < 2) 541 return -EINVAL; 542 if (*vol > 7) 543 return -EINVAL; 544 val = *vol & 7; 545 val = 7 - val; 546 if (mic) { 547 val <<= 3; 548 card->xaddr &= 0xc7; 549 } else { 550 card->xaddr &= 0xf8; 551 } 552 card->xaddr |= val; 553 WriteW6692(card, W_XADDR, card->xaddr); 554 return 0; 555 } 556 557 static int 558 enable_pots(struct w6692_ch *wch) 559 { 560 struct w6692_hw *card = wch->bch.hw; 561 562 if ((!(card->fmask & pots)) || 563 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 564 return -ENODEV; 565 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 566 WriteW6692B(wch, W_B_MODE, wch->b_mode); 567 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 568 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 569 WriteW6692(card, W_PCTL, card->pctl); 570 return 0; 571 } 572 #endif 573 574 static int 575 disable_pots(struct w6692_ch *wch) 576 { 577 struct w6692_hw *card = wch->bch.hw; 578 579 if (!(card->fmask & pots)) 580 return -ENODEV; 581 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 582 WriteW6692B(wch, W_B_MODE, wch->b_mode); 583 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 584 W_B_CMDR_XRST); 585 return 0; 586 } 587 588 static int 589 w6692_mode(struct w6692_ch *wch, u32 pr) 590 { 591 struct w6692_hw *card; 592 593 card = wch->bch.hw; 594 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 595 wch->bch.nr, wch->bch.state, pr); 596 switch (pr) { 597 case ISDN_P_NONE: 598 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 599 disable_pots(wch); 600 wch->b_mode = 0; 601 mISDN_clear_bchannel(&wch->bch); 602 WriteW6692B(wch, W_B_MODE, wch->b_mode); 603 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 604 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 605 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 606 break; 607 case ISDN_P_B_RAW: 608 wch->b_mode = W_B_MODE_MMS; 609 WriteW6692B(wch, W_B_MODE, wch->b_mode); 610 WriteW6692B(wch, W_B_EXIM, 0); 611 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 612 W_B_CMDR_XRST); 613 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 614 break; 615 case ISDN_P_B_HDLC: 616 wch->b_mode = W_B_MODE_ITF; 617 WriteW6692B(wch, W_B_MODE, wch->b_mode); 618 WriteW6692B(wch, W_B_ADM1, 0xff); 619 WriteW6692B(wch, W_B_ADM2, 0xff); 620 WriteW6692B(wch, W_B_EXIM, 0); 621 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 622 W_B_CMDR_XRST); 623 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 624 break; 625 default: 626 pr_info("%s: protocol %x not known\n", card->name, pr); 627 return -ENOPROTOOPT; 628 } 629 wch->bch.state = pr; 630 return 0; 631 } 632 633 static void 634 send_next(struct w6692_ch *wch) 635 { 636 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) { 637 W6692_fill_Bfifo(wch); 638 } else { 639 if (wch->bch.tx_skb) 640 dev_kfree_skb(wch->bch.tx_skb); 641 if (get_next_bframe(&wch->bch)) { 642 W6692_fill_Bfifo(wch); 643 test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags); 644 } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) { 645 W6692_fill_Bfifo(wch); 646 } 647 } 648 } 649 650 static void 651 W6692B_interrupt(struct w6692_hw *card, int ch) 652 { 653 struct w6692_ch *wch = &card->bc[ch]; 654 int count; 655 u8 stat, star = 0; 656 657 stat = ReadW6692B(wch, W_B_EXIR); 658 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 659 if (stat & W_B_EXI_RME) { 660 star = ReadW6692B(wch, W_B_STAR); 661 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 662 if ((star & W_B_STAR_RDOV) && 663 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 664 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 665 wch->bch.nr, wch->bch.state); 666 #ifdef ERROR_STATISTIC 667 wch->bch.err_rdo++; 668 #endif 669 } 670 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 671 if (star & W_B_STAR_CRCE) { 672 pr_debug("%s: B%d CRC error\n", 673 card->name, wch->bch.nr); 674 #ifdef ERROR_STATISTIC 675 wch->bch.err_crc++; 676 #endif 677 } 678 if (star & W_B_STAR_RMB) { 679 pr_debug("%s: B%d message abort\n", 680 card->name, wch->bch.nr); 681 #ifdef ERROR_STATISTIC 682 wch->bch.err_inv++; 683 #endif 684 } 685 } 686 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 687 W_B_CMDR_RRST | W_B_CMDR_RACT); 688 if (wch->bch.rx_skb) 689 skb_trim(wch->bch.rx_skb, 0); 690 } else { 691 count = ReadW6692B(wch, W_B_RBCL) & 692 (W_B_FIFO_THRESH - 1); 693 if (count == 0) 694 count = W_B_FIFO_THRESH; 695 W6692_empty_Bfifo(wch, count); 696 recv_Bchannel(&wch->bch, 0, false); 697 } 698 } 699 if (stat & W_B_EXI_RMR) { 700 if (!(stat & W_B_EXI_RME)) 701 star = ReadW6692B(wch, W_B_STAR); 702 if (star & W_B_STAR_RDOV) { 703 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 704 wch->bch.nr, wch->bch.state); 705 #ifdef ERROR_STATISTIC 706 wch->bch.err_rdo++; 707 #endif 708 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 709 W_B_CMDR_RRST | W_B_CMDR_RACT); 710 } else { 711 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 712 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 713 recv_Bchannel(&wch->bch, 0, false); 714 } 715 } 716 if (stat & W_B_EXI_RDOV) { 717 /* only if it is not handled yet */ 718 if (!(star & W_B_STAR_RDOV)) { 719 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 720 wch->bch.nr, wch->bch.state); 721 #ifdef ERROR_STATISTIC 722 wch->bch.err_rdo++; 723 #endif 724 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 725 W_B_CMDR_RRST | W_B_CMDR_RACT); 726 } 727 } 728 if (stat & W_B_EXI_XFR) { 729 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 730 star = ReadW6692B(wch, W_B_STAR); 731 pr_debug("%s: B%d star %02x\n", card->name, 732 wch->bch.nr, star); 733 } 734 if (star & W_B_STAR_XDOW) { 735 pr_warning("%s: B%d XDOW proto=%x\n", card->name, 736 wch->bch.nr, wch->bch.state); 737 #ifdef ERROR_STATISTIC 738 wch->bch.err_xdu++; 739 #endif 740 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 741 W_B_CMDR_RACT); 742 /* resend */ 743 if (wch->bch.tx_skb) { 744 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 745 wch->bch.tx_idx = 0; 746 } 747 } 748 send_next(wch); 749 if (star & W_B_STAR_XDOW) 750 return; /* handle XDOW only once */ 751 } 752 if (stat & W_B_EXI_XDUN) { 753 pr_warning("%s: B%d XDUN proto=%x\n", card->name, 754 wch->bch.nr, wch->bch.state); 755 #ifdef ERROR_STATISTIC 756 wch->bch.err_xdu++; 757 #endif 758 /* resend - no XRST needed */ 759 if (wch->bch.tx_skb) { 760 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 761 wch->bch.tx_idx = 0; 762 } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) { 763 test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags); 764 } 765 send_next(wch); 766 } 767 } 768 769 static irqreturn_t 770 w6692_irq(int intno, void *dev_id) 771 { 772 struct w6692_hw *card = dev_id; 773 u8 ista; 774 775 spin_lock(&card->lock); 776 ista = ReadW6692(card, W_ISTA); 777 if ((ista | card->imask) == card->imask) { 778 /* possible a shared IRQ reqest */ 779 spin_unlock(&card->lock); 780 return IRQ_NONE; 781 } 782 card->irqcnt++; 783 pr_debug("%s: ista %02x\n", card->name, ista); 784 ista &= ~card->imask; 785 if (ista & W_INT_B1_EXI) 786 W6692B_interrupt(card, 0); 787 if (ista & W_INT_B2_EXI) 788 W6692B_interrupt(card, 1); 789 if (ista & W_INT_D_RME) 790 handle_rxD(card); 791 if (ista & W_INT_D_RMR) 792 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 793 if (ista & W_INT_D_XFR) 794 handle_txD(card); 795 if (ista & W_INT_D_EXI) 796 handle_statusD(card); 797 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 798 pr_debug("%s: W6692 spurious XINT!\n", card->name); 799 /* End IRQ Handler */ 800 spin_unlock(&card->lock); 801 return IRQ_HANDLED; 802 } 803 804 static void 805 dbusy_timer_handler(struct timer_list *t) 806 { 807 struct dchannel *dch = from_timer(dch, t, timer); 808 struct w6692_hw *card = dch->hw; 809 int rbch, star; 810 u_long flags; 811 812 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 813 spin_lock_irqsave(&card->lock, flags); 814 rbch = ReadW6692(card, W_D_RBCH); 815 star = ReadW6692(card, W_D_STAR); 816 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 817 card->name, rbch, star); 818 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 819 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 820 else { 821 /* discard frame; reset transceiver */ 822 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 823 if (dch->tx_idx) 824 dch->tx_idx = 0; 825 else 826 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 827 card->name); 828 /* Transmitter reset */ 829 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 830 } 831 spin_unlock_irqrestore(&card->lock, flags); 832 } 833 } 834 835 static void initW6692(struct w6692_hw *card) 836 { 837 u8 val; 838 839 timer_setup(&card->dch.timer, dbusy_timer_handler, 0); 840 w6692_mode(&card->bc[0], ISDN_P_NONE); 841 w6692_mode(&card->bc[1], ISDN_P_NONE); 842 WriteW6692(card, W_D_CTL, 0x00); 843 disable_hwirq(card); 844 WriteW6692(card, W_D_SAM, 0xff); 845 WriteW6692(card, W_D_TAM, 0xff); 846 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 847 card->state = W_L1CMD_RST; 848 ph_command(card, W_L1CMD_RST); 849 ph_command(card, W_L1CMD_ECK); 850 /* enable all IRQ but extern */ 851 card->imask = 0x18; 852 WriteW6692(card, W_D_EXIM, 0x00); 853 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 854 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 855 /* Reset D-chan receiver and transmitter */ 856 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 857 /* Reset B-chan receiver and transmitter */ 858 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 859 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 860 /* enable peripheral */ 861 if (card->subtype == W6692_USR) { 862 /* seems that USR implemented some power control features 863 * Pin 79 is connected to the oscilator circuit so we 864 * have to handle it here 865 */ 866 card->pctl = 0x80; 867 card->xdata = 0; 868 WriteW6692(card, W_PCTL, card->pctl); 869 WriteW6692(card, W_XDATA, card->xdata); 870 } else { 871 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 872 W_PCTL_OE1 | W_PCTL_OE0; 873 card->xaddr = 0x00;/* all sw off */ 874 if (card->fmask & pots) 875 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 876 if (card->fmask & led) 877 card->xdata |= 0x04; /* LED OFF */ 878 if ((card->fmask & pots) || (card->fmask & led)) { 879 WriteW6692(card, W_PCTL, card->pctl); 880 WriteW6692(card, W_XADDR, card->xaddr); 881 WriteW6692(card, W_XDATA, card->xdata); 882 val = ReadW6692(card, W_XADDR); 883 if (debug & DEBUG_HW) 884 pr_notice("%s: W_XADDR=%02x\n", 885 card->name, val); 886 } 887 } 888 } 889 890 static void 891 reset_w6692(struct w6692_hw *card) 892 { 893 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 894 mdelay(10); 895 WriteW6692(card, W_D_CTL, 0); 896 } 897 898 static int 899 init_card(struct w6692_hw *card) 900 { 901 int cnt = 3; 902 u_long flags; 903 904 spin_lock_irqsave(&card->lock, flags); 905 disable_hwirq(card); 906 spin_unlock_irqrestore(&card->lock, flags); 907 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 908 pr_info("%s: couldn't get interrupt %d\n", card->name, 909 card->irq); 910 return -EIO; 911 } 912 while (cnt--) { 913 spin_lock_irqsave(&card->lock, flags); 914 initW6692(card); 915 enable_hwirq(card); 916 spin_unlock_irqrestore(&card->lock, flags); 917 /* Timeout 10ms */ 918 msleep_interruptible(10); 919 if (debug & DEBUG_HW) 920 pr_notice("%s: IRQ %d count %d\n", card->name, 921 card->irq, card->irqcnt); 922 if (!card->irqcnt) { 923 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 924 card->name, card->irq, 3 - cnt); 925 reset_w6692(card); 926 } else 927 return 0; 928 } 929 free_irq(card->irq, card); 930 return -EIO; 931 } 932 933 static int 934 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 935 { 936 struct bchannel *bch = container_of(ch, struct bchannel, ch); 937 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 938 struct w6692_hw *card = bch->hw; 939 int ret = -EINVAL; 940 struct mISDNhead *hh = mISDN_HEAD_P(skb); 941 unsigned long flags; 942 943 switch (hh->prim) { 944 case PH_DATA_REQ: 945 spin_lock_irqsave(&card->lock, flags); 946 ret = bchannel_senddata(bch, skb); 947 if (ret > 0) { /* direct TX */ 948 ret = 0; 949 W6692_fill_Bfifo(bc); 950 } 951 spin_unlock_irqrestore(&card->lock, flags); 952 return ret; 953 case PH_ACTIVATE_REQ: 954 spin_lock_irqsave(&card->lock, flags); 955 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 956 ret = w6692_mode(bc, ch->protocol); 957 else 958 ret = 0; 959 spin_unlock_irqrestore(&card->lock, flags); 960 if (!ret) 961 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 962 NULL, GFP_KERNEL); 963 break; 964 case PH_DEACTIVATE_REQ: 965 spin_lock_irqsave(&card->lock, flags); 966 mISDN_clear_bchannel(bch); 967 w6692_mode(bc, ISDN_P_NONE); 968 spin_unlock_irqrestore(&card->lock, flags); 969 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 970 NULL, GFP_KERNEL); 971 ret = 0; 972 break; 973 default: 974 pr_info("%s: %s unknown prim(%x,%x)\n", 975 card->name, __func__, hh->prim, hh->id); 976 ret = -EINVAL; 977 } 978 if (!ret) 979 dev_kfree_skb(skb); 980 return ret; 981 } 982 983 static int 984 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 985 { 986 return mISDN_ctrl_bchannel(bch, cq); 987 } 988 989 static int 990 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 991 { 992 struct bchannel *bch; 993 994 if (rq->adr.channel == 0 || rq->adr.channel > 2) 995 return -EINVAL; 996 if (rq->protocol == ISDN_P_NONE) 997 return -EINVAL; 998 bch = &card->bc[rq->adr.channel - 1].bch; 999 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1000 return -EBUSY; /* b-channel can be only open once */ 1001 bch->ch.protocol = rq->protocol; 1002 rq->ch = &bch->ch; 1003 return 0; 1004 } 1005 1006 static int 1007 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1008 { 1009 int ret = 0; 1010 1011 switch (cq->op) { 1012 case MISDN_CTRL_GETOP: 1013 cq->op = MISDN_CTRL_L1_TIMER3; 1014 break; 1015 case MISDN_CTRL_L1_TIMER3: 1016 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1017 break; 1018 default: 1019 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1020 ret = -EINVAL; 1021 break; 1022 } 1023 return ret; 1024 } 1025 1026 static int 1027 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1028 { 1029 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1030 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1031 struct w6692_hw *card = bch->hw; 1032 int ret = -EINVAL; 1033 u_long flags; 1034 1035 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1036 switch (cmd) { 1037 case CLOSE_CHANNEL: 1038 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1039 cancel_work_sync(&bch->workq); 1040 spin_lock_irqsave(&card->lock, flags); 1041 mISDN_clear_bchannel(bch); 1042 w6692_mode(bc, ISDN_P_NONE); 1043 spin_unlock_irqrestore(&card->lock, flags); 1044 ch->protocol = ISDN_P_NONE; 1045 ch->peer = NULL; 1046 module_put(THIS_MODULE); 1047 ret = 0; 1048 break; 1049 case CONTROL_CHANNEL: 1050 ret = channel_bctrl(bch, arg); 1051 break; 1052 default: 1053 pr_info("%s: %s unknown prim(%x)\n", 1054 card->name, __func__, cmd); 1055 } 1056 return ret; 1057 } 1058 1059 static int 1060 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1061 { 1062 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1063 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1064 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1065 int ret = -EINVAL; 1066 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1067 u32 id; 1068 u_long flags; 1069 1070 switch (hh->prim) { 1071 case PH_DATA_REQ: 1072 spin_lock_irqsave(&card->lock, flags); 1073 ret = dchannel_senddata(dch, skb); 1074 if (ret > 0) { /* direct TX */ 1075 id = hh->id; /* skb can be freed */ 1076 W6692_fill_Dfifo(card); 1077 ret = 0; 1078 spin_unlock_irqrestore(&card->lock, flags); 1079 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1080 } else 1081 spin_unlock_irqrestore(&card->lock, flags); 1082 return ret; 1083 case PH_ACTIVATE_REQ: 1084 ret = l1_event(dch->l1, hh->prim); 1085 break; 1086 case PH_DEACTIVATE_REQ: 1087 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1088 ret = l1_event(dch->l1, hh->prim); 1089 break; 1090 } 1091 1092 if (!ret) 1093 dev_kfree_skb(skb); 1094 return ret; 1095 } 1096 1097 static int 1098 w6692_l1callback(struct dchannel *dch, u32 cmd) 1099 { 1100 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1101 u_long flags; 1102 1103 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1104 switch (cmd) { 1105 case INFO3_P8: 1106 spin_lock_irqsave(&card->lock, flags); 1107 ph_command(card, W_L1CMD_AR8); 1108 spin_unlock_irqrestore(&card->lock, flags); 1109 break; 1110 case INFO3_P10: 1111 spin_lock_irqsave(&card->lock, flags); 1112 ph_command(card, W_L1CMD_AR10); 1113 spin_unlock_irqrestore(&card->lock, flags); 1114 break; 1115 case HW_RESET_REQ: 1116 spin_lock_irqsave(&card->lock, flags); 1117 if (card->state != W_L1IND_DRD) 1118 ph_command(card, W_L1CMD_RST); 1119 ph_command(card, W_L1CMD_ECK); 1120 spin_unlock_irqrestore(&card->lock, flags); 1121 break; 1122 case HW_DEACT_REQ: 1123 skb_queue_purge(&dch->squeue); 1124 if (dch->tx_skb) { 1125 dev_kfree_skb(dch->tx_skb); 1126 dch->tx_skb = NULL; 1127 } 1128 dch->tx_idx = 0; 1129 if (dch->rx_skb) { 1130 dev_kfree_skb(dch->rx_skb); 1131 dch->rx_skb = NULL; 1132 } 1133 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1134 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1135 del_timer(&dch->timer); 1136 break; 1137 case HW_POWERUP_REQ: 1138 spin_lock_irqsave(&card->lock, flags); 1139 ph_command(card, W_L1CMD_ECK); 1140 spin_unlock_irqrestore(&card->lock, flags); 1141 break; 1142 case PH_ACTIVATE_IND: 1143 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1144 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1145 GFP_ATOMIC); 1146 break; 1147 case PH_DEACTIVATE_IND: 1148 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1149 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1150 GFP_ATOMIC); 1151 break; 1152 default: 1153 pr_debug("%s: %s unknown command %x\n", card->name, 1154 __func__, cmd); 1155 return -1; 1156 } 1157 return 0; 1158 } 1159 1160 static int 1161 open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller) 1162 { 1163 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1164 card->dch.dev.id, caller); 1165 if (rq->protocol != ISDN_P_TE_S0) 1166 return -EINVAL; 1167 if (rq->adr.channel == 1) 1168 /* E-Channel not supported */ 1169 return -EINVAL; 1170 rq->ch = &card->dch.dev.D; 1171 rq->ch->protocol = rq->protocol; 1172 if (card->dch.state == 7) 1173 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1174 0, NULL, GFP_KERNEL); 1175 return 0; 1176 } 1177 1178 static int 1179 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1180 { 1181 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1182 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1183 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1184 struct channel_req *rq; 1185 int err = 0; 1186 1187 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1188 switch (cmd) { 1189 case OPEN_CHANNEL: 1190 rq = arg; 1191 if (rq->protocol == ISDN_P_TE_S0) 1192 err = open_dchannel(card, rq, __builtin_return_address(0)); 1193 else 1194 err = open_bchannel(card, rq); 1195 if (err) 1196 break; 1197 if (!try_module_get(THIS_MODULE)) 1198 pr_info("%s: cannot get module\n", card->name); 1199 break; 1200 case CLOSE_CHANNEL: 1201 pr_debug("%s: dev(%d) close from %p\n", card->name, 1202 dch->dev.id, __builtin_return_address(0)); 1203 module_put(THIS_MODULE); 1204 break; 1205 case CONTROL_CHANNEL: 1206 err = channel_ctrl(card, arg); 1207 break; 1208 default: 1209 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1210 return -EINVAL; 1211 } 1212 return err; 1213 } 1214 1215 static int 1216 setup_w6692(struct w6692_hw *card) 1217 { 1218 u32 val; 1219 1220 if (!request_region(card->addr, 256, card->name)) { 1221 pr_info("%s: config port %x-%x already in use\n", card->name, 1222 card->addr, card->addr + 255); 1223 return -EIO; 1224 } 1225 W6692Version(card); 1226 card->bc[0].addr = card->addr; 1227 card->bc[1].addr = card->addr + 0x40; 1228 val = ReadW6692(card, W_ISTA); 1229 if (debug & DEBUG_HW) 1230 pr_notice("%s ISTA=%02x\n", card->name, val); 1231 val = ReadW6692(card, W_IMASK); 1232 if (debug & DEBUG_HW) 1233 pr_notice("%s IMASK=%02x\n", card->name, val); 1234 val = ReadW6692(card, W_D_EXIR); 1235 if (debug & DEBUG_HW) 1236 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1237 val = ReadW6692(card, W_D_EXIM); 1238 if (debug & DEBUG_HW) 1239 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1240 val = ReadW6692(card, W_D_RSTA); 1241 if (debug & DEBUG_HW) 1242 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1243 return 0; 1244 } 1245 1246 static void 1247 release_card(struct w6692_hw *card) 1248 { 1249 u_long flags; 1250 1251 spin_lock_irqsave(&card->lock, flags); 1252 disable_hwirq(card); 1253 w6692_mode(&card->bc[0], ISDN_P_NONE); 1254 w6692_mode(&card->bc[1], ISDN_P_NONE); 1255 if ((card->fmask & led) || card->subtype == W6692_USR) { 1256 card->xdata |= 0x04; /* LED OFF */ 1257 WriteW6692(card, W_XDATA, card->xdata); 1258 } 1259 spin_unlock_irqrestore(&card->lock, flags); 1260 free_irq(card->irq, card); 1261 l1_event(card->dch.l1, CLOSE_CHANNEL); 1262 mISDN_unregister_device(&card->dch.dev); 1263 release_region(card->addr, 256); 1264 mISDN_freebchannel(&card->bc[1].bch); 1265 mISDN_freebchannel(&card->bc[0].bch); 1266 mISDN_freedchannel(&card->dch); 1267 write_lock_irqsave(&card_lock, flags); 1268 list_del(&card->list); 1269 write_unlock_irqrestore(&card_lock, flags); 1270 pci_disable_device(card->pdev); 1271 pci_set_drvdata(card->pdev, NULL); 1272 kfree(card); 1273 } 1274 1275 static int 1276 setup_instance(struct w6692_hw *card) 1277 { 1278 int i, err; 1279 u_long flags; 1280 1281 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1282 write_lock_irqsave(&card_lock, flags); 1283 list_add_tail(&card->list, &Cards); 1284 write_unlock_irqrestore(&card_lock, flags); 1285 card->fmask = (1 << w6692_cnt); 1286 _set_debug(card); 1287 spin_lock_init(&card->lock); 1288 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1289 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1290 card->dch.dev.D.send = w6692_l2l1D; 1291 card->dch.dev.D.ctrl = w6692_dctrl; 1292 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1293 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1294 card->dch.hw = card; 1295 card->dch.dev.nrbchan = 2; 1296 for (i = 0; i < 2; i++) { 1297 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM, 1298 W_B_FIFO_THRESH); 1299 card->bc[i].bch.hw = card; 1300 card->bc[i].bch.nr = i + 1; 1301 card->bc[i].bch.ch.nr = i + 1; 1302 card->bc[i].bch.ch.send = w6692_l2l1B; 1303 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1304 set_channelmap(i + 1, card->dch.dev.channelmap); 1305 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1306 } 1307 err = setup_w6692(card); 1308 if (err) 1309 goto error_setup; 1310 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1311 card->name); 1312 if (err) 1313 goto error_reg; 1314 err = init_card(card); 1315 if (err) 1316 goto error_init; 1317 err = create_l1(&card->dch, w6692_l1callback); 1318 if (!err) { 1319 w6692_cnt++; 1320 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1321 return 0; 1322 } 1323 1324 free_irq(card->irq, card); 1325 error_init: 1326 mISDN_unregister_device(&card->dch.dev); 1327 error_reg: 1328 release_region(card->addr, 256); 1329 error_setup: 1330 mISDN_freebchannel(&card->bc[1].bch); 1331 mISDN_freebchannel(&card->bc[0].bch); 1332 mISDN_freedchannel(&card->dch); 1333 write_lock_irqsave(&card_lock, flags); 1334 list_del(&card->list); 1335 write_unlock_irqrestore(&card_lock, flags); 1336 kfree(card); 1337 return err; 1338 } 1339 1340 static int 1341 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1342 { 1343 int err = -ENOMEM; 1344 struct w6692_hw *card; 1345 struct w6692map *m = (struct w6692map *)ent->driver_data; 1346 1347 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1348 if (!card) { 1349 pr_info("No kmem for w6692 card\n"); 1350 return err; 1351 } 1352 card->pdev = pdev; 1353 card->subtype = m->subtype; 1354 err = pci_enable_device(pdev); 1355 if (err) { 1356 kfree(card); 1357 return err; 1358 } 1359 1360 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1361 m->name, pci_name(pdev)); 1362 1363 card->addr = pci_resource_start(pdev, 1); 1364 card->irq = pdev->irq; 1365 pci_set_drvdata(pdev, card); 1366 err = setup_instance(card); 1367 if (err) 1368 pci_set_drvdata(pdev, NULL); 1369 return err; 1370 } 1371 1372 static void 1373 w6692_remove_pci(struct pci_dev *pdev) 1374 { 1375 struct w6692_hw *card = pci_get_drvdata(pdev); 1376 1377 if (card) 1378 release_card(card); 1379 else 1380 if (debug) 1381 pr_notice("%s: drvdata already removed\n", __func__); 1382 } 1383 1384 static const struct pci_device_id w6692_ids[] = { 1385 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1386 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1387 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1388 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1389 (ulong)&w6692_map[2]}, 1390 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1391 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1392 { } 1393 }; 1394 MODULE_DEVICE_TABLE(pci, w6692_ids); 1395 1396 static struct pci_driver w6692_driver = { 1397 .name = "w6692", 1398 .probe = w6692_probe, 1399 .remove = w6692_remove_pci, 1400 .id_table = w6692_ids, 1401 }; 1402 1403 static int __init w6692_init(void) 1404 { 1405 int err; 1406 1407 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1408 1409 err = pci_register_driver(&w6692_driver); 1410 return err; 1411 } 1412 1413 static void __exit w6692_cleanup(void) 1414 { 1415 pci_unregister_driver(&w6692_driver); 1416 } 1417 1418 module_init(w6692_init); 1419 module_exit(w6692_cleanup); 1420