1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * w6692.c     mISDN driver for Winbond w6692 based cards
4  *
5  * Author      Karsten Keil <kkeil@suse.de>
6  *             based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
7  *
8  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
9  */
10 
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14 #include <linux/delay.h>
15 #include <linux/mISDNhw.h>
16 #include <linux/slab.h>
17 #include "w6692.h"
18 
19 #define W6692_REV	"2.0"
20 
21 #define DBUSY_TIMER_VALUE	80
22 
23 enum {
24 	W6692_ASUS,
25 	W6692_WINBOND,
26 	W6692_USR
27 };
28 
29 /* private data in the PCI devices list */
30 struct w6692map {
31 	u_int	subtype;
32 	char	*name;
33 };
34 
35 static const struct w6692map  w6692_map[] =
36 {
37 	{W6692_ASUS, "Dynalink/AsusCom IS64PH"},
38 	{W6692_WINBOND, "Winbond W6692"},
39 	{W6692_USR, "USR W6692"}
40 };
41 
42 #define PCI_DEVICE_ID_USR_6692	0x3409
43 
44 struct w6692_ch {
45 	struct bchannel		bch;
46 	u32			addr;
47 	struct timer_list	timer;
48 	u8			b_mode;
49 };
50 
51 struct w6692_hw {
52 	struct list_head	list;
53 	struct pci_dev		*pdev;
54 	char			name[MISDN_MAX_IDLEN];
55 	u32			irq;
56 	u32			irqcnt;
57 	u32			addr;
58 	u32			fmask;	/* feature mask - bit set per card nr */
59 	int			subtype;
60 	spinlock_t		lock;	/* hw lock */
61 	u8			imask;
62 	u8			pctl;
63 	u8			xaddr;
64 	u8			xdata;
65 	u8			state;
66 	struct w6692_ch		bc[2];
67 	struct dchannel		dch;
68 	char			log[64];
69 };
70 
71 static LIST_HEAD(Cards);
72 static DEFINE_RWLOCK(card_lock); /* protect Cards */
73 
74 static int w6692_cnt;
75 static int debug;
76 static u32 led;
77 static u32 pots;
78 
79 static void
_set_debug(struct w6692_hw * card)80 _set_debug(struct w6692_hw *card)
81 {
82 	card->dch.debug = debug;
83 	card->bc[0].bch.debug = debug;
84 	card->bc[1].bch.debug = debug;
85 }
86 
87 static int
set_debug(const char * val,const struct kernel_param * kp)88 set_debug(const char *val, const struct kernel_param *kp)
89 {
90 	int ret;
91 	struct w6692_hw *card;
92 
93 	ret = param_set_uint(val, kp);
94 	if (!ret) {
95 		read_lock(&card_lock);
96 		list_for_each_entry(card, &Cards, list)
97 			_set_debug(card);
98 		read_unlock(&card_lock);
99 	}
100 	return ret;
101 }
102 
103 MODULE_AUTHOR("Karsten Keil");
104 MODULE_LICENSE("GPL v2");
105 MODULE_VERSION(W6692_REV);
106 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
107 MODULE_PARM_DESC(debug, "W6692 debug mask");
108 module_param(led, uint, S_IRUGO | S_IWUSR);
109 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
110 module_param(pots, uint, S_IRUGO | S_IWUSR);
111 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
112 
113 static inline u8
ReadW6692(struct w6692_hw * card,u8 offset)114 ReadW6692(struct w6692_hw *card, u8 offset)
115 {
116 	return inb(card->addr + offset);
117 }
118 
119 static inline void
WriteW6692(struct w6692_hw * card,u8 offset,u8 value)120 WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
121 {
122 	outb(value, card->addr + offset);
123 }
124 
125 static inline u8
ReadW6692B(struct w6692_ch * bc,u8 offset)126 ReadW6692B(struct w6692_ch *bc, u8 offset)
127 {
128 	return inb(bc->addr + offset);
129 }
130 
131 static inline void
WriteW6692B(struct w6692_ch * bc,u8 offset,u8 value)132 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
133 {
134 	outb(value, bc->addr + offset);
135 }
136 
137 static void
enable_hwirq(struct w6692_hw * card)138 enable_hwirq(struct w6692_hw *card)
139 {
140 	WriteW6692(card, W_IMASK, card->imask);
141 }
142 
143 static void
disable_hwirq(struct w6692_hw * card)144 disable_hwirq(struct w6692_hw *card)
145 {
146 	WriteW6692(card, W_IMASK, 0xff);
147 }
148 
149 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
150 
151 static void
W6692Version(struct w6692_hw * card)152 W6692Version(struct w6692_hw *card)
153 {
154 	int val;
155 
156 	val = ReadW6692(card, W_D_RBCH);
157 	pr_notice("%s: Winbond W6692 version: %s\n", card->name,
158 		  W6692Ver[(val >> 6) & 3]);
159 }
160 
161 static void
w6692_led_handler(struct w6692_hw * card,int on)162 w6692_led_handler(struct w6692_hw *card, int on)
163 {
164 	if ((!(card->fmask & led)) || card->subtype == W6692_USR)
165 		return;
166 	if (on) {
167 		card->xdata &= 0xfb;	/*  LED ON */
168 		WriteW6692(card, W_XDATA, card->xdata);
169 	} else {
170 		card->xdata |= 0x04;	/*  LED OFF */
171 		WriteW6692(card, W_XDATA, card->xdata);
172 	}
173 }
174 
175 static void
ph_command(struct w6692_hw * card,u8 cmd)176 ph_command(struct w6692_hw *card, u8 cmd)
177 {
178 	pr_debug("%s: ph_command %x\n", card->name, cmd);
179 	WriteW6692(card, W_CIX, cmd);
180 }
181 
182 static void
W6692_new_ph(struct w6692_hw * card)183 W6692_new_ph(struct w6692_hw *card)
184 {
185 	if (card->state == W_L1CMD_RST)
186 		ph_command(card, W_L1CMD_DRC);
187 	schedule_event(&card->dch, FLG_PHCHANGE);
188 }
189 
190 static void
W6692_ph_bh(struct dchannel * dch)191 W6692_ph_bh(struct dchannel *dch)
192 {
193 	struct w6692_hw *card = dch->hw;
194 
195 	switch (card->state) {
196 	case W_L1CMD_RST:
197 		dch->state = 0;
198 		l1_event(dch->l1, HW_RESET_IND);
199 		break;
200 	case W_L1IND_CD:
201 		dch->state = 3;
202 		l1_event(dch->l1, HW_DEACT_CNF);
203 		break;
204 	case W_L1IND_DRD:
205 		dch->state = 3;
206 		l1_event(dch->l1, HW_DEACT_IND);
207 		break;
208 	case W_L1IND_CE:
209 		dch->state = 4;
210 		l1_event(dch->l1, HW_POWERUP_IND);
211 		break;
212 	case W_L1IND_LD:
213 		if (dch->state <= 5) {
214 			dch->state = 5;
215 			l1_event(dch->l1, ANYSIGNAL);
216 		} else {
217 			dch->state = 8;
218 			l1_event(dch->l1, LOSTFRAMING);
219 		}
220 		break;
221 	case W_L1IND_ARD:
222 		dch->state = 6;
223 		l1_event(dch->l1, INFO2);
224 		break;
225 	case W_L1IND_AI8:
226 		dch->state = 7;
227 		l1_event(dch->l1, INFO4_P8);
228 		break;
229 	case W_L1IND_AI10:
230 		dch->state = 7;
231 		l1_event(dch->l1, INFO4_P10);
232 		break;
233 	default:
234 		pr_debug("%s: TE unknown state %02x dch state %02x\n",
235 			 card->name, card->state, dch->state);
236 		break;
237 	}
238 	pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
239 }
240 
241 static void
W6692_empty_Dfifo(struct w6692_hw * card,int count)242 W6692_empty_Dfifo(struct w6692_hw *card, int count)
243 {
244 	struct dchannel *dch = &card->dch;
245 	u8 *ptr;
246 
247 	pr_debug("%s: empty_Dfifo %d\n", card->name, count);
248 	if (!dch->rx_skb) {
249 		dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
250 		if (!dch->rx_skb) {
251 			pr_info("%s: D receive out of memory\n", card->name);
252 			WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
253 			return;
254 		}
255 	}
256 	if ((dch->rx_skb->len + count) >= dch->maxlen) {
257 		pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
258 			 dch->rx_skb->len + count);
259 		WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
260 		return;
261 	}
262 	ptr = skb_put(dch->rx_skb, count);
263 	insb(card->addr + W_D_RFIFO, ptr, count);
264 	WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
265 	if (debug & DEBUG_HW_DFIFO) {
266 		snprintf(card->log, 63, "D-recv %s %d ",
267 			 card->name, count);
268 		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
269 	}
270 }
271 
272 static void
W6692_fill_Dfifo(struct w6692_hw * card)273 W6692_fill_Dfifo(struct w6692_hw *card)
274 {
275 	struct dchannel *dch = &card->dch;
276 	int count;
277 	u8 *ptr;
278 	u8 cmd = W_D_CMDR_XMS;
279 
280 	pr_debug("%s: fill_Dfifo\n", card->name);
281 	if (!dch->tx_skb)
282 		return;
283 	count = dch->tx_skb->len - dch->tx_idx;
284 	if (count <= 0)
285 		return;
286 	if (count > W_D_FIFO_THRESH)
287 		count = W_D_FIFO_THRESH;
288 	else
289 		cmd |= W_D_CMDR_XME;
290 	ptr = dch->tx_skb->data + dch->tx_idx;
291 	dch->tx_idx += count;
292 	outsb(card->addr + W_D_XFIFO, ptr, count);
293 	WriteW6692(card, W_D_CMDR, cmd);
294 	if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
295 		pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
296 		del_timer(&dch->timer);
297 	}
298 	dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
299 	add_timer(&dch->timer);
300 	if (debug & DEBUG_HW_DFIFO) {
301 		snprintf(card->log, 63, "D-send %s %d ",
302 			 card->name, count);
303 		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
304 	}
305 }
306 
307 static void
d_retransmit(struct w6692_hw * card)308 d_retransmit(struct w6692_hw *card)
309 {
310 	struct dchannel *dch = &card->dch;
311 
312 	if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
313 		del_timer(&dch->timer);
314 #ifdef FIXME
315 	if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
316 		dchannel_sched_event(dch, D_CLEARBUSY);
317 #endif
318 	if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
319 		/* Restart frame */
320 		dch->tx_idx = 0;
321 		W6692_fill_Dfifo(card);
322 	} else if (dch->tx_skb) { /* should not happen */
323 		pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
324 		test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
325 		dch->tx_idx = 0;
326 		W6692_fill_Dfifo(card);
327 	} else {
328 		pr_info("%s: XDU no TX_BUSY\n", card->name);
329 		if (get_next_dframe(dch))
330 			W6692_fill_Dfifo(card);
331 	}
332 }
333 
334 static void
handle_rxD(struct w6692_hw * card)335 handle_rxD(struct w6692_hw *card) {
336 	u8	stat;
337 	int	count;
338 
339 	stat = ReadW6692(card, W_D_RSTA);
340 	if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
341 		if (stat & W_D_RSTA_RDOV) {
342 			pr_debug("%s: D-channel RDOV\n", card->name);
343 #ifdef ERROR_STATISTIC
344 			card->dch.err_rx++;
345 #endif
346 		}
347 		if (stat & W_D_RSTA_CRCE) {
348 			pr_debug("%s: D-channel CRC error\n", card->name);
349 #ifdef ERROR_STATISTIC
350 			card->dch.err_crc++;
351 #endif
352 		}
353 		if (stat & W_D_RSTA_RMB) {
354 			pr_debug("%s: D-channel ABORT\n", card->name);
355 #ifdef ERROR_STATISTIC
356 			card->dch.err_rx++;
357 #endif
358 		}
359 		dev_kfree_skb(card->dch.rx_skb);
360 		card->dch.rx_skb = NULL;
361 		WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
362 	} else {
363 		count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
364 		if (count == 0)
365 			count = W_D_FIFO_THRESH;
366 		W6692_empty_Dfifo(card, count);
367 		recv_Dchannel(&card->dch);
368 	}
369 }
370 
371 static void
handle_txD(struct w6692_hw * card)372 handle_txD(struct w6692_hw *card) {
373 	if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
374 		del_timer(&card->dch.timer);
375 	if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
376 		W6692_fill_Dfifo(card);
377 	} else {
378 		dev_kfree_skb(card->dch.tx_skb);
379 		if (get_next_dframe(&card->dch))
380 			W6692_fill_Dfifo(card);
381 	}
382 }
383 
384 static void
handle_statusD(struct w6692_hw * card)385 handle_statusD(struct w6692_hw *card)
386 {
387 	struct dchannel *dch = &card->dch;
388 	u8 exval, v1, cir;
389 
390 	exval = ReadW6692(card, W_D_EXIR);
391 
392 	pr_debug("%s: D_EXIR %02x\n", card->name, exval);
393 	if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
394 		/* Transmit underrun/collision */
395 		pr_debug("%s: D-channel underrun/collision\n", card->name);
396 #ifdef ERROR_STATISTIC
397 		dch->err_tx++;
398 #endif
399 		d_retransmit(card);
400 	}
401 	if (exval & W_D_EXI_RDOV) {	/* RDOV */
402 		pr_debug("%s: D-channel RDOV\n", card->name);
403 		WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
404 	}
405 	if (exval & W_D_EXI_TIN2)	/* TIN2 - never */
406 		pr_debug("%s: spurious TIN2 interrupt\n", card->name);
407 	if (exval & W_D_EXI_MOC) {	/* MOC - not supported */
408 		v1 = ReadW6692(card, W_MOSR);
409 		pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
410 			 card->name, v1);
411 	}
412 	if (exval & W_D_EXI_ISC) {	/* ISC - Level1 change */
413 		cir = ReadW6692(card, W_CIR);
414 		pr_debug("%s: ISC CIR %02X\n", card->name, cir);
415 		if (cir & W_CIR_ICC) {
416 			v1 = cir & W_CIR_COD_MASK;
417 			pr_debug("%s: ph_state_change %x -> %x\n", card->name,
418 				 dch->state, v1);
419 			card->state = v1;
420 			if (card->fmask & led) {
421 				switch (v1) {
422 				case W_L1IND_AI8:
423 				case W_L1IND_AI10:
424 					w6692_led_handler(card, 1);
425 					break;
426 				default:
427 					w6692_led_handler(card, 0);
428 					break;
429 				}
430 			}
431 			W6692_new_ph(card);
432 		}
433 		if (cir & W_CIR_SCC) {
434 			v1 = ReadW6692(card, W_SQR);
435 			pr_debug("%s: SCC SQR %02X\n", card->name, v1);
436 		}
437 	}
438 	if (exval & W_D_EXI_WEXP)
439 		pr_debug("%s: spurious WEXP interrupt!\n", card->name);
440 	if (exval & W_D_EXI_TEXP)
441 		pr_debug("%s: spurious TEXP interrupt!\n", card->name);
442 }
443 
444 static void
W6692_empty_Bfifo(struct w6692_ch * wch,int count)445 W6692_empty_Bfifo(struct w6692_ch *wch, int count)
446 {
447 	struct w6692_hw *card = wch->bch.hw;
448 	u8 *ptr;
449 	int maxlen;
450 
451 	pr_debug("%s: empty_Bfifo %d\n", card->name, count);
452 	if (unlikely(wch->bch.state == ISDN_P_NONE)) {
453 		pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
454 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
455 		if (wch->bch.rx_skb)
456 			skb_trim(wch->bch.rx_skb, 0);
457 		return;
458 	}
459 	if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) {
460 		wch->bch.dropcnt += count;
461 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
462 		return;
463 	}
464 	maxlen = bchannel_get_rxbuf(&wch->bch, count);
465 	if (maxlen < 0) {
466 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
467 		if (wch->bch.rx_skb)
468 			skb_trim(wch->bch.rx_skb, 0);
469 		pr_warn("%s.B%d: No bufferspace for %d bytes\n",
470 			card->name, wch->bch.nr, count);
471 		return;
472 	}
473 	ptr = skb_put(wch->bch.rx_skb, count);
474 	insb(wch->addr + W_B_RFIFO, ptr, count);
475 	WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
476 	if (debug & DEBUG_HW_DFIFO) {
477 		snprintf(card->log, 63, "B%1d-recv %s %d ",
478 			 wch->bch.nr, card->name, count);
479 		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
480 	}
481 }
482 
483 static void
W6692_fill_Bfifo(struct w6692_ch * wch)484 W6692_fill_Bfifo(struct w6692_ch *wch)
485 {
486 	struct w6692_hw *card = wch->bch.hw;
487 	int count, fillempty = 0;
488 	u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
489 
490 	pr_debug("%s: fill Bfifo\n", card->name);
491 	if (!wch->bch.tx_skb) {
492 		if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags))
493 			return;
494 		ptr = wch->bch.fill;
495 		count = W_B_FIFO_THRESH;
496 		fillempty = 1;
497 	} else {
498 		count = wch->bch.tx_skb->len - wch->bch.tx_idx;
499 		if (count <= 0)
500 			return;
501 		ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
502 	}
503 	if (count > W_B_FIFO_THRESH)
504 		count = W_B_FIFO_THRESH;
505 	else if (test_bit(FLG_HDLC, &wch->bch.Flags))
506 		cmd |= W_B_CMDR_XME;
507 
508 	pr_debug("%s: fill Bfifo%d/%d\n", card->name,
509 		 count, wch->bch.tx_idx);
510 	wch->bch.tx_idx += count;
511 	if (fillempty) {
512 		while (count > 0) {
513 			outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE);
514 			count -= MISDN_BCH_FILL_SIZE;
515 		}
516 	} else {
517 		outsb(wch->addr + W_B_XFIFO, ptr, count);
518 	}
519 	WriteW6692B(wch, W_B_CMDR, cmd);
520 	if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
521 		snprintf(card->log, 63, "B%1d-send %s %d ",
522 			 wch->bch.nr, card->name, count);
523 		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
524 	}
525 }
526 
527 #if 0
528 static int
529 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
530 {
531 	struct w6692_hw *card = wch->bch.hw;
532 	u16 *vol = (u16 *)skb->data;
533 	u8 val;
534 
535 	if ((!(card->fmask & pots)) ||
536 	    !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
537 		return -ENODEV;
538 	if (skb->len < 2)
539 		return -EINVAL;
540 	if (*vol > 7)
541 		return -EINVAL;
542 	val = *vol & 7;
543 	val = 7 - val;
544 	if (mic) {
545 		val <<= 3;
546 		card->xaddr &= 0xc7;
547 	} else {
548 		card->xaddr &= 0xf8;
549 	}
550 	card->xaddr |= val;
551 	WriteW6692(card, W_XADDR, card->xaddr);
552 	return 0;
553 }
554 
555 static int
556 enable_pots(struct w6692_ch *wch)
557 {
558 	struct w6692_hw *card = wch->bch.hw;
559 
560 	if ((!(card->fmask & pots)) ||
561 	    !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
562 		return -ENODEV;
563 	wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
564 	WriteW6692B(wch, W_B_MODE, wch->b_mode);
565 	WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
566 	card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
567 	WriteW6692(card, W_PCTL, card->pctl);
568 	return 0;
569 }
570 #endif
571 
572 static int
disable_pots(struct w6692_ch * wch)573 disable_pots(struct w6692_ch *wch)
574 {
575 	struct w6692_hw *card = wch->bch.hw;
576 
577 	if (!(card->fmask & pots))
578 		return -ENODEV;
579 	wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
580 	WriteW6692B(wch, W_B_MODE, wch->b_mode);
581 	WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
582 		    W_B_CMDR_XRST);
583 	return 0;
584 }
585 
586 static int
w6692_mode(struct w6692_ch * wch,u32 pr)587 w6692_mode(struct w6692_ch *wch, u32 pr)
588 {
589 	struct w6692_hw	*card;
590 
591 	card = wch->bch.hw;
592 	pr_debug("%s: B%d protocol %x-->%x\n", card->name,
593 		 wch->bch.nr, wch->bch.state, pr);
594 	switch (pr) {
595 	case ISDN_P_NONE:
596 		if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
597 			disable_pots(wch);
598 		wch->b_mode = 0;
599 		mISDN_clear_bchannel(&wch->bch);
600 		WriteW6692B(wch, W_B_MODE, wch->b_mode);
601 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
602 		test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
603 		test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
604 		break;
605 	case ISDN_P_B_RAW:
606 		wch->b_mode = W_B_MODE_MMS;
607 		WriteW6692B(wch, W_B_MODE, wch->b_mode);
608 		WriteW6692B(wch, W_B_EXIM, 0);
609 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
610 			    W_B_CMDR_XRST);
611 		test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
612 		break;
613 	case ISDN_P_B_HDLC:
614 		wch->b_mode = W_B_MODE_ITF;
615 		WriteW6692B(wch, W_B_MODE, wch->b_mode);
616 		WriteW6692B(wch, W_B_ADM1, 0xff);
617 		WriteW6692B(wch, W_B_ADM2, 0xff);
618 		WriteW6692B(wch, W_B_EXIM, 0);
619 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
620 			    W_B_CMDR_XRST);
621 		test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
622 		break;
623 	default:
624 		pr_info("%s: protocol %x not known\n", card->name, pr);
625 		return -ENOPROTOOPT;
626 	}
627 	wch->bch.state = pr;
628 	return 0;
629 }
630 
631 static void
send_next(struct w6692_ch * wch)632 send_next(struct w6692_ch *wch)
633 {
634 	if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) {
635 		W6692_fill_Bfifo(wch);
636 	} else {
637 		dev_kfree_skb(wch->bch.tx_skb);
638 		if (get_next_bframe(&wch->bch)) {
639 			W6692_fill_Bfifo(wch);
640 			test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags);
641 		} else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) {
642 			W6692_fill_Bfifo(wch);
643 		}
644 	}
645 }
646 
647 static void
W6692B_interrupt(struct w6692_hw * card,int ch)648 W6692B_interrupt(struct w6692_hw *card, int ch)
649 {
650 	struct w6692_ch	*wch = &card->bc[ch];
651 	int		count;
652 	u8		stat, star = 0;
653 
654 	stat = ReadW6692B(wch, W_B_EXIR);
655 	pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
656 	if (stat & W_B_EXI_RME) {
657 		star = ReadW6692B(wch, W_B_STAR);
658 		if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
659 			if ((star & W_B_STAR_RDOV) &&
660 			    test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
661 				pr_debug("%s: B%d RDOV proto=%x\n", card->name,
662 					 wch->bch.nr, wch->bch.state);
663 #ifdef ERROR_STATISTIC
664 				wch->bch.err_rdo++;
665 #endif
666 			}
667 			if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
668 				if (star & W_B_STAR_CRCE) {
669 					pr_debug("%s: B%d CRC error\n",
670 						 card->name, wch->bch.nr);
671 #ifdef ERROR_STATISTIC
672 					wch->bch.err_crc++;
673 #endif
674 				}
675 				if (star & W_B_STAR_RMB) {
676 					pr_debug("%s: B%d message abort\n",
677 						 card->name, wch->bch.nr);
678 #ifdef ERROR_STATISTIC
679 					wch->bch.err_inv++;
680 #endif
681 				}
682 			}
683 			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
684 				    W_B_CMDR_RRST | W_B_CMDR_RACT);
685 			if (wch->bch.rx_skb)
686 				skb_trim(wch->bch.rx_skb, 0);
687 		} else {
688 			count = ReadW6692B(wch, W_B_RBCL) &
689 				(W_B_FIFO_THRESH - 1);
690 			if (count == 0)
691 				count = W_B_FIFO_THRESH;
692 			W6692_empty_Bfifo(wch, count);
693 			recv_Bchannel(&wch->bch, 0, false);
694 		}
695 	}
696 	if (stat & W_B_EXI_RMR) {
697 		if (!(stat & W_B_EXI_RME))
698 			star = ReadW6692B(wch, W_B_STAR);
699 		if (star & W_B_STAR_RDOV) {
700 			pr_debug("%s: B%d RDOV proto=%x\n", card->name,
701 				 wch->bch.nr, wch->bch.state);
702 #ifdef ERROR_STATISTIC
703 			wch->bch.err_rdo++;
704 #endif
705 			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
706 				    W_B_CMDR_RRST | W_B_CMDR_RACT);
707 		} else {
708 			W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
709 			if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
710 				recv_Bchannel(&wch->bch, 0, false);
711 		}
712 	}
713 	if (stat & W_B_EXI_RDOV) {
714 		/* only if it is not handled yet */
715 		if (!(star & W_B_STAR_RDOV)) {
716 			pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
717 				 wch->bch.nr, wch->bch.state);
718 #ifdef ERROR_STATISTIC
719 			wch->bch.err_rdo++;
720 #endif
721 			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
722 				    W_B_CMDR_RRST | W_B_CMDR_RACT);
723 		}
724 	}
725 	if (stat & W_B_EXI_XFR) {
726 		if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
727 			star = ReadW6692B(wch, W_B_STAR);
728 			pr_debug("%s: B%d star %02x\n", card->name,
729 				 wch->bch.nr, star);
730 		}
731 		if (star & W_B_STAR_XDOW) {
732 			pr_warn("%s: B%d XDOW proto=%x\n", card->name,
733 				wch->bch.nr, wch->bch.state);
734 #ifdef ERROR_STATISTIC
735 			wch->bch.err_xdu++;
736 #endif
737 			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
738 				    W_B_CMDR_RACT);
739 			/* resend */
740 			if (wch->bch.tx_skb) {
741 				if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
742 					wch->bch.tx_idx = 0;
743 			}
744 		}
745 		send_next(wch);
746 		if (star & W_B_STAR_XDOW)
747 			return; /* handle XDOW only once */
748 	}
749 	if (stat & W_B_EXI_XDUN) {
750 		pr_warn("%s: B%d XDUN proto=%x\n", card->name,
751 			wch->bch.nr, wch->bch.state);
752 #ifdef ERROR_STATISTIC
753 		wch->bch.err_xdu++;
754 #endif
755 		/* resend - no XRST needed */
756 		if (wch->bch.tx_skb) {
757 			if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
758 				wch->bch.tx_idx = 0;
759 		} else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) {
760 			test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags);
761 		}
762 		send_next(wch);
763 	}
764 }
765 
766 static irqreturn_t
w6692_irq(int intno,void * dev_id)767 w6692_irq(int intno, void *dev_id)
768 {
769 	struct w6692_hw	*card = dev_id;
770 	u8		ista;
771 
772 	spin_lock(&card->lock);
773 	ista = ReadW6692(card, W_ISTA);
774 	if ((ista | card->imask) == card->imask) {
775 		/* possible a shared  IRQ reqest */
776 		spin_unlock(&card->lock);
777 		return IRQ_NONE;
778 	}
779 	card->irqcnt++;
780 	pr_debug("%s: ista %02x\n", card->name, ista);
781 	ista &= ~card->imask;
782 	if (ista & W_INT_B1_EXI)
783 		W6692B_interrupt(card, 0);
784 	if (ista & W_INT_B2_EXI)
785 		W6692B_interrupt(card, 1);
786 	if (ista & W_INT_D_RME)
787 		handle_rxD(card);
788 	if (ista & W_INT_D_RMR)
789 		W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
790 	if (ista & W_INT_D_XFR)
791 		handle_txD(card);
792 	if (ista & W_INT_D_EXI)
793 		handle_statusD(card);
794 	if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
795 		pr_debug("%s: W6692 spurious XINT!\n", card->name);
796 /* End IRQ Handler */
797 	spin_unlock(&card->lock);
798 	return IRQ_HANDLED;
799 }
800 
801 static void
dbusy_timer_handler(struct timer_list * t)802 dbusy_timer_handler(struct timer_list *t)
803 {
804 	struct dchannel *dch = from_timer(dch, t, timer);
805 	struct w6692_hw	*card = dch->hw;
806 	int		rbch, star;
807 	u_long		flags;
808 
809 	if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
810 		spin_lock_irqsave(&card->lock, flags);
811 		rbch = ReadW6692(card, W_D_RBCH);
812 		star = ReadW6692(card, W_D_STAR);
813 		pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
814 			 card->name, rbch, star);
815 		if (star & W_D_STAR_XBZ)	/* D-Channel Busy */
816 			test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
817 		else {
818 			/* discard frame; reset transceiver */
819 			test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
820 			if (dch->tx_idx)
821 				dch->tx_idx = 0;
822 			else
823 				pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
824 					card->name);
825 			/* Transmitter reset */
826 			WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
827 		}
828 		spin_unlock_irqrestore(&card->lock, flags);
829 	}
830 }
831 
initW6692(struct w6692_hw * card)832 static void initW6692(struct w6692_hw *card)
833 {
834 	u8	val;
835 
836 	timer_setup(&card->dch.timer, dbusy_timer_handler, 0);
837 	w6692_mode(&card->bc[0], ISDN_P_NONE);
838 	w6692_mode(&card->bc[1], ISDN_P_NONE);
839 	WriteW6692(card, W_D_CTL, 0x00);
840 	disable_hwirq(card);
841 	WriteW6692(card, W_D_SAM, 0xff);
842 	WriteW6692(card, W_D_TAM, 0xff);
843 	WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
844 	card->state = W_L1CMD_RST;
845 	ph_command(card, W_L1CMD_RST);
846 	ph_command(card, W_L1CMD_ECK);
847 	/* enable all IRQ but extern */
848 	card->imask = 0x18;
849 	WriteW6692(card, W_D_EXIM, 0x00);
850 	WriteW6692B(&card->bc[0], W_B_EXIM, 0);
851 	WriteW6692B(&card->bc[1], W_B_EXIM, 0);
852 	/* Reset D-chan receiver and transmitter */
853 	WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
854 	/* Reset B-chan receiver and transmitter */
855 	WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
856 	WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
857 	/* enable peripheral */
858 	if (card->subtype == W6692_USR) {
859 		/* seems that USR implemented some power control features
860 		 * Pin 79 is connected to the oscilator circuit so we
861 		 * have to handle it here
862 		 */
863 		card->pctl = 0x80;
864 		card->xdata = 0;
865 		WriteW6692(card, W_PCTL, card->pctl);
866 		WriteW6692(card, W_XDATA, card->xdata);
867 	} else {
868 		card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
869 			W_PCTL_OE1 | W_PCTL_OE0;
870 		card->xaddr = 0x00;/* all sw off */
871 		if (card->fmask & pots)
872 			card->xdata |= 0x06;	/*  POWER UP/ LED OFF / ALAW */
873 		if (card->fmask & led)
874 			card->xdata |= 0x04;	/* LED OFF */
875 		if ((card->fmask & pots) || (card->fmask & led)) {
876 			WriteW6692(card, W_PCTL, card->pctl);
877 			WriteW6692(card, W_XADDR, card->xaddr);
878 			WriteW6692(card, W_XDATA, card->xdata);
879 			val = ReadW6692(card, W_XADDR);
880 			if (debug & DEBUG_HW)
881 				pr_notice("%s: W_XADDR=%02x\n",
882 					  card->name, val);
883 		}
884 	}
885 }
886 
887 static void
reset_w6692(struct w6692_hw * card)888 reset_w6692(struct w6692_hw *card)
889 {
890 	WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
891 	mdelay(10);
892 	WriteW6692(card, W_D_CTL, 0);
893 }
894 
895 static int
init_card(struct w6692_hw * card)896 init_card(struct w6692_hw *card)
897 {
898 	int	cnt = 3;
899 	u_long	flags;
900 
901 	spin_lock_irqsave(&card->lock, flags);
902 	disable_hwirq(card);
903 	spin_unlock_irqrestore(&card->lock, flags);
904 	if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
905 		pr_info("%s: couldn't get interrupt %d\n", card->name,
906 			card->irq);
907 		return -EIO;
908 	}
909 	while (cnt--) {
910 		spin_lock_irqsave(&card->lock, flags);
911 		initW6692(card);
912 		enable_hwirq(card);
913 		spin_unlock_irqrestore(&card->lock, flags);
914 		/* Timeout 10ms */
915 		msleep_interruptible(10);
916 		if (debug & DEBUG_HW)
917 			pr_notice("%s: IRQ %d count %d\n", card->name,
918 				  card->irq, card->irqcnt);
919 		if (!card->irqcnt) {
920 			pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
921 				card->name, card->irq, 3 - cnt);
922 			reset_w6692(card);
923 		} else
924 			return 0;
925 	}
926 	free_irq(card->irq, card);
927 	return -EIO;
928 }
929 
930 static int
w6692_l2l1B(struct mISDNchannel * ch,struct sk_buff * skb)931 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
932 {
933 	struct bchannel *bch = container_of(ch, struct bchannel, ch);
934 	struct w6692_ch	*bc = container_of(bch, struct w6692_ch, bch);
935 	struct w6692_hw *card = bch->hw;
936 	int ret = -EINVAL;
937 	struct mISDNhead *hh = mISDN_HEAD_P(skb);
938 	unsigned long flags;
939 
940 	switch (hh->prim) {
941 	case PH_DATA_REQ:
942 		spin_lock_irqsave(&card->lock, flags);
943 		ret = bchannel_senddata(bch, skb);
944 		if (ret > 0) { /* direct TX */
945 			ret = 0;
946 			W6692_fill_Bfifo(bc);
947 		}
948 		spin_unlock_irqrestore(&card->lock, flags);
949 		return ret;
950 	case PH_ACTIVATE_REQ:
951 		spin_lock_irqsave(&card->lock, flags);
952 		if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
953 			ret = w6692_mode(bc, ch->protocol);
954 		else
955 			ret = 0;
956 		spin_unlock_irqrestore(&card->lock, flags);
957 		if (!ret)
958 			_queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
959 				    NULL, GFP_KERNEL);
960 		break;
961 	case PH_DEACTIVATE_REQ:
962 		spin_lock_irqsave(&card->lock, flags);
963 		mISDN_clear_bchannel(bch);
964 		w6692_mode(bc, ISDN_P_NONE);
965 		spin_unlock_irqrestore(&card->lock, flags);
966 		_queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
967 			    NULL, GFP_KERNEL);
968 		ret = 0;
969 		break;
970 	default:
971 		pr_info("%s: %s unknown prim(%x,%x)\n",
972 			card->name, __func__, hh->prim, hh->id);
973 		ret = -EINVAL;
974 	}
975 	if (!ret)
976 		dev_kfree_skb(skb);
977 	return ret;
978 }
979 
980 static int
channel_bctrl(struct bchannel * bch,struct mISDN_ctrl_req * cq)981 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
982 {
983 	return mISDN_ctrl_bchannel(bch, cq);
984 }
985 
986 static int
open_bchannel(struct w6692_hw * card,struct channel_req * rq)987 open_bchannel(struct w6692_hw *card, struct channel_req *rq)
988 {
989 	struct bchannel *bch;
990 
991 	if (rq->adr.channel == 0 || rq->adr.channel > 2)
992 		return -EINVAL;
993 	if (rq->protocol == ISDN_P_NONE)
994 		return -EINVAL;
995 	bch = &card->bc[rq->adr.channel - 1].bch;
996 	if (test_and_set_bit(FLG_OPEN, &bch->Flags))
997 		return -EBUSY; /* b-channel can be only open once */
998 	bch->ch.protocol = rq->protocol;
999 	rq->ch = &bch->ch;
1000 	return 0;
1001 }
1002 
1003 static int
channel_ctrl(struct w6692_hw * card,struct mISDN_ctrl_req * cq)1004 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
1005 {
1006 	int	ret = 0;
1007 
1008 	switch (cq->op) {
1009 	case MISDN_CTRL_GETOP:
1010 		cq->op = MISDN_CTRL_L1_TIMER3;
1011 		break;
1012 	case MISDN_CTRL_L1_TIMER3:
1013 		ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
1014 		break;
1015 	default:
1016 		pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
1017 		ret = -EINVAL;
1018 		break;
1019 	}
1020 	return ret;
1021 }
1022 
1023 static int
w6692_bctrl(struct mISDNchannel * ch,u32 cmd,void * arg)1024 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1025 {
1026 	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1027 	struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
1028 	struct w6692_hw *card = bch->hw;
1029 	int ret = -EINVAL;
1030 	u_long flags;
1031 
1032 	pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
1033 	switch (cmd) {
1034 	case CLOSE_CHANNEL:
1035 		test_and_clear_bit(FLG_OPEN, &bch->Flags);
1036 		cancel_work_sync(&bch->workq);
1037 		spin_lock_irqsave(&card->lock, flags);
1038 		mISDN_clear_bchannel(bch);
1039 		w6692_mode(bc, ISDN_P_NONE);
1040 		spin_unlock_irqrestore(&card->lock, flags);
1041 		ch->protocol = ISDN_P_NONE;
1042 		ch->peer = NULL;
1043 		module_put(THIS_MODULE);
1044 		ret = 0;
1045 		break;
1046 	case CONTROL_CHANNEL:
1047 		ret = channel_bctrl(bch, arg);
1048 		break;
1049 	default:
1050 		pr_info("%s: %s unknown prim(%x)\n",
1051 			card->name, __func__, cmd);
1052 	}
1053 	return ret;
1054 }
1055 
1056 static int
w6692_l2l1D(struct mISDNchannel * ch,struct sk_buff * skb)1057 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
1058 {
1059 	struct mISDNdevice	*dev = container_of(ch, struct mISDNdevice, D);
1060 	struct dchannel		*dch = container_of(dev, struct dchannel, dev);
1061 	struct w6692_hw		*card = container_of(dch, struct w6692_hw, dch);
1062 	int			ret = -EINVAL;
1063 	struct mISDNhead	*hh = mISDN_HEAD_P(skb);
1064 	u32			id;
1065 	u_long			flags;
1066 
1067 	switch (hh->prim) {
1068 	case PH_DATA_REQ:
1069 		spin_lock_irqsave(&card->lock, flags);
1070 		ret = dchannel_senddata(dch, skb);
1071 		if (ret > 0) { /* direct TX */
1072 			id = hh->id; /* skb can be freed */
1073 			W6692_fill_Dfifo(card);
1074 			ret = 0;
1075 			spin_unlock_irqrestore(&card->lock, flags);
1076 			queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
1077 		} else
1078 			spin_unlock_irqrestore(&card->lock, flags);
1079 		return ret;
1080 	case PH_ACTIVATE_REQ:
1081 		ret = l1_event(dch->l1, hh->prim);
1082 		break;
1083 	case PH_DEACTIVATE_REQ:
1084 		test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
1085 		ret = l1_event(dch->l1, hh->prim);
1086 		break;
1087 	}
1088 
1089 	if (!ret)
1090 		dev_kfree_skb(skb);
1091 	return ret;
1092 }
1093 
1094 static int
w6692_l1callback(struct dchannel * dch,u32 cmd)1095 w6692_l1callback(struct dchannel *dch, u32 cmd)
1096 {
1097 	struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1098 	u_long flags;
1099 
1100 	pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
1101 	switch (cmd) {
1102 	case INFO3_P8:
1103 		spin_lock_irqsave(&card->lock, flags);
1104 		ph_command(card, W_L1CMD_AR8);
1105 		spin_unlock_irqrestore(&card->lock, flags);
1106 		break;
1107 	case INFO3_P10:
1108 		spin_lock_irqsave(&card->lock, flags);
1109 		ph_command(card, W_L1CMD_AR10);
1110 		spin_unlock_irqrestore(&card->lock, flags);
1111 		break;
1112 	case HW_RESET_REQ:
1113 		spin_lock_irqsave(&card->lock, flags);
1114 		if (card->state != W_L1IND_DRD)
1115 			ph_command(card, W_L1CMD_RST);
1116 		ph_command(card, W_L1CMD_ECK);
1117 		spin_unlock_irqrestore(&card->lock, flags);
1118 		break;
1119 	case HW_DEACT_REQ:
1120 		skb_queue_purge(&dch->squeue);
1121 		if (dch->tx_skb) {
1122 			dev_kfree_skb(dch->tx_skb);
1123 			dch->tx_skb = NULL;
1124 		}
1125 		dch->tx_idx = 0;
1126 		if (dch->rx_skb) {
1127 			dev_kfree_skb(dch->rx_skb);
1128 			dch->rx_skb = NULL;
1129 		}
1130 		test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
1131 		if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
1132 			del_timer(&dch->timer);
1133 		break;
1134 	case HW_POWERUP_REQ:
1135 		spin_lock_irqsave(&card->lock, flags);
1136 		ph_command(card, W_L1CMD_ECK);
1137 		spin_unlock_irqrestore(&card->lock, flags);
1138 		break;
1139 	case PH_ACTIVATE_IND:
1140 		test_and_set_bit(FLG_ACTIVE, &dch->Flags);
1141 		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1142 			    GFP_ATOMIC);
1143 		break;
1144 	case PH_DEACTIVATE_IND:
1145 		test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
1146 		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1147 			    GFP_ATOMIC);
1148 		break;
1149 	default:
1150 		pr_debug("%s: %s unknown command %x\n", card->name,
1151 			 __func__, cmd);
1152 		return -1;
1153 	}
1154 	return 0;
1155 }
1156 
1157 static int
open_dchannel(struct w6692_hw * card,struct channel_req * rq,void * caller)1158 open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller)
1159 {
1160 	pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
1161 		 card->dch.dev.id, caller);
1162 	if (rq->protocol != ISDN_P_TE_S0)
1163 		return -EINVAL;
1164 	if (rq->adr.channel == 1)
1165 		/* E-Channel not supported */
1166 		return -EINVAL;
1167 	rq->ch = &card->dch.dev.D;
1168 	rq->ch->protocol = rq->protocol;
1169 	if (card->dch.state == 7)
1170 		_queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
1171 			    0, NULL, GFP_KERNEL);
1172 	return 0;
1173 }
1174 
1175 static int
w6692_dctrl(struct mISDNchannel * ch,u32 cmd,void * arg)1176 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1177 {
1178 	struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
1179 	struct dchannel *dch = container_of(dev, struct dchannel, dev);
1180 	struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1181 	struct channel_req *rq;
1182 	int err = 0;
1183 
1184 	pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
1185 	switch (cmd) {
1186 	case OPEN_CHANNEL:
1187 		rq = arg;
1188 		if (rq->protocol == ISDN_P_TE_S0)
1189 			err = open_dchannel(card, rq, __builtin_return_address(0));
1190 		else
1191 			err = open_bchannel(card, rq);
1192 		if (err)
1193 			break;
1194 		if (!try_module_get(THIS_MODULE))
1195 			pr_info("%s: cannot get module\n", card->name);
1196 		break;
1197 	case CLOSE_CHANNEL:
1198 		pr_debug("%s: dev(%d) close from %p\n", card->name,
1199 			 dch->dev.id, __builtin_return_address(0));
1200 		module_put(THIS_MODULE);
1201 		break;
1202 	case CONTROL_CHANNEL:
1203 		err = channel_ctrl(card, arg);
1204 		break;
1205 	default:
1206 		pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
1207 		return -EINVAL;
1208 	}
1209 	return err;
1210 }
1211 
1212 static int
setup_w6692(struct w6692_hw * card)1213 setup_w6692(struct w6692_hw *card)
1214 {
1215 	u32	val;
1216 
1217 	if (!request_region(card->addr, 256, card->name)) {
1218 		pr_info("%s: config port %x-%x already in use\n", card->name,
1219 			card->addr, card->addr + 255);
1220 		return -EIO;
1221 	}
1222 	W6692Version(card);
1223 	card->bc[0].addr = card->addr;
1224 	card->bc[1].addr = card->addr + 0x40;
1225 	val = ReadW6692(card, W_ISTA);
1226 	if (debug & DEBUG_HW)
1227 		pr_notice("%s ISTA=%02x\n", card->name, val);
1228 	val = ReadW6692(card, W_IMASK);
1229 	if (debug & DEBUG_HW)
1230 		pr_notice("%s IMASK=%02x\n", card->name, val);
1231 	val = ReadW6692(card, W_D_EXIR);
1232 	if (debug & DEBUG_HW)
1233 		pr_notice("%s D_EXIR=%02x\n", card->name, val);
1234 	val = ReadW6692(card, W_D_EXIM);
1235 	if (debug & DEBUG_HW)
1236 		pr_notice("%s D_EXIM=%02x\n", card->name, val);
1237 	val = ReadW6692(card, W_D_RSTA);
1238 	if (debug & DEBUG_HW)
1239 		pr_notice("%s D_RSTA=%02x\n", card->name, val);
1240 	return 0;
1241 }
1242 
1243 static void
release_card(struct w6692_hw * card)1244 release_card(struct w6692_hw *card)
1245 {
1246 	u_long	flags;
1247 
1248 	spin_lock_irqsave(&card->lock, flags);
1249 	disable_hwirq(card);
1250 	w6692_mode(&card->bc[0], ISDN_P_NONE);
1251 	w6692_mode(&card->bc[1], ISDN_P_NONE);
1252 	if ((card->fmask & led) || card->subtype == W6692_USR) {
1253 		card->xdata |= 0x04;	/*  LED OFF */
1254 		WriteW6692(card, W_XDATA, card->xdata);
1255 	}
1256 	spin_unlock_irqrestore(&card->lock, flags);
1257 	free_irq(card->irq, card);
1258 	l1_event(card->dch.l1, CLOSE_CHANNEL);
1259 	mISDN_unregister_device(&card->dch.dev);
1260 	release_region(card->addr, 256);
1261 	mISDN_freebchannel(&card->bc[1].bch);
1262 	mISDN_freebchannel(&card->bc[0].bch);
1263 	mISDN_freedchannel(&card->dch);
1264 	write_lock_irqsave(&card_lock, flags);
1265 	list_del(&card->list);
1266 	write_unlock_irqrestore(&card_lock, flags);
1267 	pci_disable_device(card->pdev);
1268 	pci_set_drvdata(card->pdev, NULL);
1269 	kfree(card);
1270 }
1271 
1272 static int
setup_instance(struct w6692_hw * card)1273 setup_instance(struct w6692_hw *card)
1274 {
1275 	int		i, err;
1276 	u_long		flags;
1277 
1278 	snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
1279 	write_lock_irqsave(&card_lock, flags);
1280 	list_add_tail(&card->list, &Cards);
1281 	write_unlock_irqrestore(&card_lock, flags);
1282 	card->fmask = (1 << w6692_cnt);
1283 	_set_debug(card);
1284 	spin_lock_init(&card->lock);
1285 	mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
1286 	card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
1287 	card->dch.dev.D.send = w6692_l2l1D;
1288 	card->dch.dev.D.ctrl = w6692_dctrl;
1289 	card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1290 		(1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1291 	card->dch.hw = card;
1292 	card->dch.dev.nrbchan = 2;
1293 	for (i = 0; i < 2; i++) {
1294 		mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM,
1295 				   W_B_FIFO_THRESH);
1296 		card->bc[i].bch.hw = card;
1297 		card->bc[i].bch.nr = i + 1;
1298 		card->bc[i].bch.ch.nr = i + 1;
1299 		card->bc[i].bch.ch.send = w6692_l2l1B;
1300 		card->bc[i].bch.ch.ctrl = w6692_bctrl;
1301 		set_channelmap(i + 1, card->dch.dev.channelmap);
1302 		list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
1303 	}
1304 	err = setup_w6692(card);
1305 	if (err)
1306 		goto error_setup;
1307 	err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
1308 				    card->name);
1309 	if (err)
1310 		goto error_reg;
1311 	err = init_card(card);
1312 	if (err)
1313 		goto error_init;
1314 	err = create_l1(&card->dch, w6692_l1callback);
1315 	if (!err) {
1316 		w6692_cnt++;
1317 		pr_notice("W6692 %d cards installed\n", w6692_cnt);
1318 		return 0;
1319 	}
1320 
1321 	free_irq(card->irq, card);
1322 error_init:
1323 	mISDN_unregister_device(&card->dch.dev);
1324 error_reg:
1325 	release_region(card->addr, 256);
1326 error_setup:
1327 	mISDN_freebchannel(&card->bc[1].bch);
1328 	mISDN_freebchannel(&card->bc[0].bch);
1329 	mISDN_freedchannel(&card->dch);
1330 	write_lock_irqsave(&card_lock, flags);
1331 	list_del(&card->list);
1332 	write_unlock_irqrestore(&card_lock, flags);
1333 	kfree(card);
1334 	return err;
1335 }
1336 
1337 static int
w6692_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1338 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1339 {
1340 	int		err = -ENOMEM;
1341 	struct w6692_hw	*card;
1342 	struct w6692map	*m = (struct w6692map *)ent->driver_data;
1343 
1344 	card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
1345 	if (!card) {
1346 		pr_info("No kmem for w6692 card\n");
1347 		return err;
1348 	}
1349 	card->pdev = pdev;
1350 	card->subtype = m->subtype;
1351 	err = pci_enable_device(pdev);
1352 	if (err) {
1353 		kfree(card);
1354 		return err;
1355 	}
1356 
1357 	printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
1358 	       m->name, pci_name(pdev));
1359 
1360 	card->addr = pci_resource_start(pdev, 1);
1361 	card->irq = pdev->irq;
1362 	pci_set_drvdata(pdev, card);
1363 	err = setup_instance(card);
1364 	if (err)
1365 		pci_set_drvdata(pdev, NULL);
1366 	return err;
1367 }
1368 
1369 static void
w6692_remove_pci(struct pci_dev * pdev)1370 w6692_remove_pci(struct pci_dev *pdev)
1371 {
1372 	struct w6692_hw	*card = pci_get_drvdata(pdev);
1373 
1374 	if (card)
1375 		release_card(card);
1376 	else
1377 		if (debug)
1378 			pr_notice("%s: drvdata already removed\n", __func__);
1379 }
1380 
1381 static const struct pci_device_id w6692_ids[] = {
1382 	{ PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
1383 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
1384 	{ PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1385 	  PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
1386 	  (ulong)&w6692_map[2]},
1387 	{ PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1388 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
1389 	{ }
1390 };
1391 MODULE_DEVICE_TABLE(pci, w6692_ids);
1392 
1393 static struct pci_driver w6692_driver = {
1394 	.name =  "w6692",
1395 	.probe = w6692_probe,
1396 	.remove = w6692_remove_pci,
1397 	.id_table = w6692_ids,
1398 };
1399 
w6692_init(void)1400 static int __init w6692_init(void)
1401 {
1402 	int err;
1403 
1404 	pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
1405 
1406 	err = pci_register_driver(&w6692_driver);
1407 	return err;
1408 }
1409 
w6692_cleanup(void)1410 static void __exit w6692_cleanup(void)
1411 {
1412 	pci_unregister_driver(&w6692_driver);
1413 }
1414 
1415 module_init(w6692_init);
1416 module_exit(w6692_cleanup);
1417