1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/module.h> 25 #include <linux/pci.h> 26 #include <linux/delay.h> 27 #include <linux/mISDNhw.h> 28 #include <linux/slab.h> 29 #include "w6692.h" 30 31 #define W6692_REV "2.0" 32 33 #define DBUSY_TIMER_VALUE 80 34 35 enum { 36 W6692_ASUS, 37 W6692_WINBOND, 38 W6692_USR 39 }; 40 41 /* private data in the PCI devices list */ 42 struct w6692map { 43 u_int subtype; 44 char *name; 45 }; 46 47 static const struct w6692map w6692_map[] = 48 { 49 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 50 {W6692_WINBOND, "Winbond W6692"}, 51 {W6692_USR, "USR W6692"} 52 }; 53 54 #ifndef PCI_VENDOR_ID_USR 55 #define PCI_VENDOR_ID_USR 0x16ec 56 #define PCI_DEVICE_ID_USR_6692 0x3409 57 #endif 58 59 struct w6692_ch { 60 struct bchannel bch; 61 u32 addr; 62 struct timer_list timer; 63 u8 b_mode; 64 }; 65 66 struct w6692_hw { 67 struct list_head list; 68 struct pci_dev *pdev; 69 char name[MISDN_MAX_IDLEN]; 70 u32 irq; 71 u32 irqcnt; 72 u32 addr; 73 u32 fmask; /* feature mask - bit set per card nr */ 74 int subtype; 75 spinlock_t lock; /* hw lock */ 76 u8 imask; 77 u8 pctl; 78 u8 xaddr; 79 u8 xdata; 80 u8 state; 81 struct w6692_ch bc[2]; 82 struct dchannel dch; 83 char log[64]; 84 }; 85 86 static LIST_HEAD(Cards); 87 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 88 89 static int w6692_cnt; 90 static int debug; 91 static u32 led; 92 static u32 pots; 93 94 static void 95 _set_debug(struct w6692_hw *card) 96 { 97 card->dch.debug = debug; 98 card->bc[0].bch.debug = debug; 99 card->bc[1].bch.debug = debug; 100 } 101 102 static int 103 set_debug(const char *val, struct kernel_param *kp) 104 { 105 int ret; 106 struct w6692_hw *card; 107 108 ret = param_set_uint(val, kp); 109 if (!ret) { 110 read_lock(&card_lock); 111 list_for_each_entry(card, &Cards, list) 112 _set_debug(card); 113 read_unlock(&card_lock); 114 } 115 return ret; 116 } 117 118 MODULE_AUTHOR("Karsten Keil"); 119 MODULE_LICENSE("GPL v2"); 120 MODULE_VERSION(W6692_REV); 121 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 122 MODULE_PARM_DESC(debug, "W6692 debug mask"); 123 module_param(led, uint, S_IRUGO | S_IWUSR); 124 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 125 module_param(pots, uint, S_IRUGO | S_IWUSR); 126 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 127 128 static inline u8 129 ReadW6692(struct w6692_hw *card, u8 offset) 130 { 131 return inb(card->addr + offset); 132 } 133 134 static inline void 135 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 136 { 137 outb(value, card->addr + offset); 138 } 139 140 static inline u8 141 ReadW6692B(struct w6692_ch *bc, u8 offset) 142 { 143 return inb(bc->addr + offset); 144 } 145 146 static inline void 147 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 148 { 149 outb(value, bc->addr + offset); 150 } 151 152 static void 153 enable_hwirq(struct w6692_hw *card) 154 { 155 WriteW6692(card, W_IMASK, card->imask); 156 } 157 158 static void 159 disable_hwirq(struct w6692_hw *card) 160 { 161 WriteW6692(card, W_IMASK, 0xff); 162 } 163 164 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 165 166 static void 167 W6692Version(struct w6692_hw *card) 168 { 169 int val; 170 171 val = ReadW6692(card, W_D_RBCH); 172 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 173 W6692Ver[(val >> 6) & 3]); 174 } 175 176 static void 177 w6692_led_handler(struct w6692_hw *card, int on) 178 { 179 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 180 return; 181 if (on) { 182 card->xdata &= 0xfb; /* LED ON */ 183 WriteW6692(card, W_XDATA, card->xdata); 184 } else { 185 card->xdata |= 0x04; /* LED OFF */ 186 WriteW6692(card, W_XDATA, card->xdata); 187 } 188 } 189 190 static void 191 ph_command(struct w6692_hw *card, u8 cmd) 192 { 193 pr_debug("%s: ph_command %x\n", card->name, cmd); 194 WriteW6692(card, W_CIX, cmd); 195 } 196 197 static void 198 W6692_new_ph(struct w6692_hw *card) 199 { 200 if (card->state == W_L1CMD_RST) 201 ph_command(card, W_L1CMD_DRC); 202 schedule_event(&card->dch, FLG_PHCHANGE); 203 } 204 205 static void 206 W6692_ph_bh(struct dchannel *dch) 207 { 208 struct w6692_hw *card = dch->hw; 209 210 switch (card->state) { 211 case W_L1CMD_RST: 212 dch->state = 0; 213 l1_event(dch->l1, HW_RESET_IND); 214 break; 215 case W_L1IND_CD: 216 dch->state = 3; 217 l1_event(dch->l1, HW_DEACT_CNF); 218 break; 219 case W_L1IND_DRD: 220 dch->state = 3; 221 l1_event(dch->l1, HW_DEACT_IND); 222 break; 223 case W_L1IND_CE: 224 dch->state = 4; 225 l1_event(dch->l1, HW_POWERUP_IND); 226 break; 227 case W_L1IND_LD: 228 if (dch->state <= 5) { 229 dch->state = 5; 230 l1_event(dch->l1, ANYSIGNAL); 231 } else { 232 dch->state = 8; 233 l1_event(dch->l1, LOSTFRAMING); 234 } 235 break; 236 case W_L1IND_ARD: 237 dch->state = 6; 238 l1_event(dch->l1, INFO2); 239 break; 240 case W_L1IND_AI8: 241 dch->state = 7; 242 l1_event(dch->l1, INFO4_P8); 243 break; 244 case W_L1IND_AI10: 245 dch->state = 7; 246 l1_event(dch->l1, INFO4_P10); 247 break; 248 default: 249 pr_debug("%s: TE unknown state %02x dch state %02x\n", 250 card->name, card->state, dch->state); 251 break; 252 } 253 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 254 } 255 256 static void 257 W6692_empty_Dfifo(struct w6692_hw *card, int count) 258 { 259 struct dchannel *dch = &card->dch; 260 u8 *ptr; 261 262 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 263 if (!dch->rx_skb) { 264 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 265 if (!dch->rx_skb) { 266 pr_info("%s: D receive out of memory\n", card->name); 267 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 268 return; 269 } 270 } 271 if ((dch->rx_skb->len + count) >= dch->maxlen) { 272 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 273 dch->rx_skb->len + count); 274 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 275 return; 276 } 277 ptr = skb_put(dch->rx_skb, count); 278 insb(card->addr + W_D_RFIFO, ptr, count); 279 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 280 if (debug & DEBUG_HW_DFIFO) { 281 snprintf(card->log, 63, "D-recv %s %d ", 282 card->name, count); 283 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 284 } 285 } 286 287 static void 288 W6692_fill_Dfifo(struct w6692_hw *card) 289 { 290 struct dchannel *dch = &card->dch; 291 int count; 292 u8 *ptr; 293 u8 cmd = W_D_CMDR_XMS; 294 295 pr_debug("%s: fill_Dfifo\n", card->name); 296 if (!dch->tx_skb) 297 return; 298 count = dch->tx_skb->len - dch->tx_idx; 299 if (count <= 0) 300 return; 301 if (count > W_D_FIFO_THRESH) 302 count = W_D_FIFO_THRESH; 303 else 304 cmd |= W_D_CMDR_XME; 305 ptr = dch->tx_skb->data + dch->tx_idx; 306 dch->tx_idx += count; 307 outsb(card->addr + W_D_XFIFO, ptr, count); 308 WriteW6692(card, W_D_CMDR, cmd); 309 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 310 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 311 del_timer(&dch->timer); 312 } 313 init_timer(&dch->timer); 314 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000); 315 add_timer(&dch->timer); 316 if (debug & DEBUG_HW_DFIFO) { 317 snprintf(card->log, 63, "D-send %s %d ", 318 card->name, count); 319 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 320 } 321 } 322 323 static void 324 d_retransmit(struct w6692_hw *card) 325 { 326 struct dchannel *dch = &card->dch; 327 328 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 329 del_timer(&dch->timer); 330 #ifdef FIXME 331 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 332 dchannel_sched_event(dch, D_CLEARBUSY); 333 #endif 334 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 335 /* Restart frame */ 336 dch->tx_idx = 0; 337 W6692_fill_Dfifo(card); 338 } else if (dch->tx_skb) { /* should not happen */ 339 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 340 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 341 dch->tx_idx = 0; 342 W6692_fill_Dfifo(card); 343 } else { 344 pr_info("%s: XDU no TX_BUSY\n", card->name); 345 if (get_next_dframe(dch)) 346 W6692_fill_Dfifo(card); 347 } 348 } 349 350 static void 351 handle_rxD(struct w6692_hw *card) { 352 u8 stat; 353 int count; 354 355 stat = ReadW6692(card, W_D_RSTA); 356 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 357 if (stat & W_D_RSTA_RDOV) { 358 pr_debug("%s: D-channel RDOV\n", card->name); 359 #ifdef ERROR_STATISTIC 360 card->dch.err_rx++; 361 #endif 362 } 363 if (stat & W_D_RSTA_CRCE) { 364 pr_debug("%s: D-channel CRC error\n", card->name); 365 #ifdef ERROR_STATISTIC 366 card->dch.err_crc++; 367 #endif 368 } 369 if (stat & W_D_RSTA_RMB) { 370 pr_debug("%s: D-channel ABORT\n", card->name); 371 #ifdef ERROR_STATISTIC 372 card->dch.err_rx++; 373 #endif 374 } 375 if (card->dch.rx_skb) 376 dev_kfree_skb(card->dch.rx_skb); 377 card->dch.rx_skb = NULL; 378 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 379 } else { 380 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 381 if (count == 0) 382 count = W_D_FIFO_THRESH; 383 W6692_empty_Dfifo(card, count); 384 recv_Dchannel(&card->dch); 385 } 386 } 387 388 static void 389 handle_txD(struct w6692_hw *card) { 390 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 391 del_timer(&card->dch.timer); 392 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 393 W6692_fill_Dfifo(card); 394 } else { 395 if (card->dch.tx_skb) 396 dev_kfree_skb(card->dch.tx_skb); 397 if (get_next_dframe(&card->dch)) 398 W6692_fill_Dfifo(card); 399 } 400 } 401 402 static void 403 handle_statusD(struct w6692_hw *card) 404 { 405 struct dchannel *dch = &card->dch; 406 u8 exval, v1, cir; 407 408 exval = ReadW6692(card, W_D_EXIR); 409 410 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 411 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 412 /* Transmit underrun/collision */ 413 pr_debug("%s: D-channel underrun/collision\n", card->name); 414 #ifdef ERROR_STATISTIC 415 dch->err_tx++; 416 #endif 417 d_retransmit(card); 418 } 419 if (exval & W_D_EXI_RDOV) { /* RDOV */ 420 pr_debug("%s: D-channel RDOV\n", card->name); 421 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 422 } 423 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 424 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 425 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 426 v1 = ReadW6692(card, W_MOSR); 427 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 428 card->name, v1); 429 } 430 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 431 cir = ReadW6692(card, W_CIR); 432 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 433 if (cir & W_CIR_ICC) { 434 v1 = cir & W_CIR_COD_MASK; 435 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 436 dch->state, v1); 437 card->state = v1; 438 if (card->fmask & led) { 439 switch (v1) { 440 case W_L1IND_AI8: 441 case W_L1IND_AI10: 442 w6692_led_handler(card, 1); 443 break; 444 default: 445 w6692_led_handler(card, 0); 446 break; 447 } 448 } 449 W6692_new_ph(card); 450 } 451 if (cir & W_CIR_SCC) { 452 v1 = ReadW6692(card, W_SQR); 453 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 454 } 455 } 456 if (exval & W_D_EXI_WEXP) 457 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 458 if (exval & W_D_EXI_TEXP) 459 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 460 } 461 462 static void 463 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 464 { 465 struct w6692_hw *card = wch->bch.hw; 466 u8 *ptr; 467 468 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 469 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 470 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 471 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 472 if (wch->bch.rx_skb) 473 skb_trim(wch->bch.rx_skb, 0); 474 return; 475 } 476 if (!wch->bch.rx_skb) { 477 wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC); 478 if (unlikely(!wch->bch.rx_skb)) { 479 pr_info("%s: B receive out of memory\n", card->name); 480 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 481 W_B_CMDR_RACT); 482 return; 483 } 484 } 485 if (wch->bch.rx_skb->len + count > wch->bch.maxlen) { 486 pr_debug("%s: empty_Bfifo incoming packet too large\n", 487 card->name); 488 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 489 skb_trim(wch->bch.rx_skb, 0); 490 return; 491 } 492 ptr = skb_put(wch->bch.rx_skb, count); 493 insb(wch->addr + W_B_RFIFO, ptr, count); 494 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 495 if (debug & DEBUG_HW_DFIFO) { 496 snprintf(card->log, 63, "B%1d-recv %s %d ", 497 wch->bch.nr, card->name, count); 498 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 499 } 500 } 501 502 static void 503 W6692_fill_Bfifo(struct w6692_ch *wch) 504 { 505 struct w6692_hw *card = wch->bch.hw; 506 int count; 507 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 508 509 pr_debug("%s: fill Bfifo\n", card->name); 510 if (!wch->bch.tx_skb) 511 return; 512 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 513 if (count <= 0) 514 return; 515 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 516 if (count > W_B_FIFO_THRESH) 517 count = W_B_FIFO_THRESH; 518 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 519 cmd |= W_B_CMDR_XME; 520 521 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 522 count, wch->bch.tx_idx); 523 wch->bch.tx_idx += count; 524 outsb(wch->addr + W_B_XFIFO, ptr, count); 525 WriteW6692B(wch, W_B_CMDR, cmd); 526 if (debug & DEBUG_HW_DFIFO) { 527 snprintf(card->log, 63, "B%1d-send %s %d ", 528 wch->bch.nr, card->name, count); 529 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 530 } 531 } 532 533 #if 0 534 static int 535 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 536 { 537 struct w6692_hw *card = wch->bch.hw; 538 u16 *vol = (u16 *)skb->data; 539 u8 val; 540 541 if ((!(card->fmask & pots)) || 542 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 543 return -ENODEV; 544 if (skb->len < 2) 545 return -EINVAL; 546 if (*vol > 7) 547 return -EINVAL; 548 val = *vol & 7; 549 val = 7 - val; 550 if (mic) { 551 val <<= 3; 552 card->xaddr &= 0xc7; 553 } else { 554 card->xaddr &= 0xf8; 555 } 556 card->xaddr |= val; 557 WriteW6692(card, W_XADDR, card->xaddr); 558 return 0; 559 } 560 561 static int 562 enable_pots(struct w6692_ch *wch) 563 { 564 struct w6692_hw *card = wch->bch.hw; 565 566 if ((!(card->fmask & pots)) || 567 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 568 return -ENODEV; 569 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 570 WriteW6692B(wch, W_B_MODE, wch->b_mode); 571 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 572 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 573 WriteW6692(card, W_PCTL, card->pctl); 574 return 0; 575 } 576 #endif 577 578 static int 579 disable_pots(struct w6692_ch *wch) 580 { 581 struct w6692_hw *card = wch->bch.hw; 582 583 if (!(card->fmask & pots)) 584 return -ENODEV; 585 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 586 WriteW6692B(wch, W_B_MODE, wch->b_mode); 587 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 588 W_B_CMDR_XRST); 589 return 0; 590 } 591 592 static int 593 w6692_mode(struct w6692_ch *wch, u32 pr) 594 { 595 struct w6692_hw *card; 596 597 card = wch->bch.hw; 598 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 599 wch->bch.nr, wch->bch.state, pr); 600 switch (pr) { 601 case ISDN_P_NONE: 602 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 603 disable_pots(wch); 604 wch->b_mode = 0; 605 mISDN_clear_bchannel(&wch->bch); 606 WriteW6692B(wch, W_B_MODE, wch->b_mode); 607 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 608 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 609 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 610 break; 611 case ISDN_P_B_RAW: 612 wch->b_mode = W_B_MODE_MMS; 613 WriteW6692B(wch, W_B_MODE, wch->b_mode); 614 WriteW6692B(wch, W_B_EXIM, 0); 615 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 616 W_B_CMDR_XRST); 617 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 618 break; 619 case ISDN_P_B_HDLC: 620 wch->b_mode = W_B_MODE_ITF; 621 WriteW6692B(wch, W_B_MODE, wch->b_mode); 622 WriteW6692B(wch, W_B_ADM1, 0xff); 623 WriteW6692B(wch, W_B_ADM2, 0xff); 624 WriteW6692B(wch, W_B_EXIM, 0); 625 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 626 W_B_CMDR_XRST); 627 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 628 break; 629 default: 630 pr_info("%s: protocol %x not known\n", card->name, pr); 631 return -ENOPROTOOPT; 632 } 633 wch->bch.state = pr; 634 return 0; 635 } 636 637 static void 638 send_next(struct w6692_ch *wch) 639 { 640 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) 641 W6692_fill_Bfifo(wch); 642 else { 643 if (wch->bch.tx_skb) { 644 /* send confirm, on trans, free on hdlc. */ 645 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 646 confirm_Bsend(&wch->bch); 647 dev_kfree_skb(wch->bch.tx_skb); 648 } 649 if (get_next_bframe(&wch->bch)) 650 W6692_fill_Bfifo(wch); 651 } 652 } 653 654 static void 655 W6692B_interrupt(struct w6692_hw *card, int ch) 656 { 657 struct w6692_ch *wch = &card->bc[ch]; 658 int count; 659 u8 stat, star = 0; 660 661 stat = ReadW6692B(wch, W_B_EXIR); 662 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 663 if (stat & W_B_EXI_RME) { 664 star = ReadW6692B(wch, W_B_STAR); 665 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 666 if ((star & W_B_STAR_RDOV) && 667 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 668 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 669 wch->bch.nr, wch->bch.state); 670 #ifdef ERROR_STATISTIC 671 wch->bch.err_rdo++; 672 #endif 673 } 674 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 675 if (star & W_B_STAR_CRCE) { 676 pr_debug("%s: B%d CRC error\n", 677 card->name, wch->bch.nr); 678 #ifdef ERROR_STATISTIC 679 wch->bch.err_crc++; 680 #endif 681 } 682 if (star & W_B_STAR_RMB) { 683 pr_debug("%s: B%d message abort\n", 684 card->name, wch->bch.nr); 685 #ifdef ERROR_STATISTIC 686 wch->bch.err_inv++; 687 #endif 688 } 689 } 690 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 691 W_B_CMDR_RRST | W_B_CMDR_RACT); 692 if (wch->bch.rx_skb) 693 skb_trim(wch->bch.rx_skb, 0); 694 } else { 695 count = ReadW6692B(wch, W_B_RBCL) & 696 (W_B_FIFO_THRESH - 1); 697 if (count == 0) 698 count = W_B_FIFO_THRESH; 699 W6692_empty_Bfifo(wch, count); 700 recv_Bchannel(&wch->bch, 0); 701 } 702 } 703 if (stat & W_B_EXI_RMR) { 704 if (!(stat & W_B_EXI_RME)) 705 star = ReadW6692B(wch, W_B_STAR); 706 if (star & W_B_STAR_RDOV) { 707 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 708 wch->bch.nr, wch->bch.state); 709 #ifdef ERROR_STATISTIC 710 wch->bch.err_rdo++; 711 #endif 712 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 713 W_B_CMDR_RRST | W_B_CMDR_RACT); 714 } else { 715 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 716 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) && 717 wch->bch.rx_skb && (wch->bch.rx_skb->len > 0)) 718 recv_Bchannel(&wch->bch, 0); 719 } 720 } 721 if (stat & W_B_EXI_RDOV) { 722 /* only if it is not handled yet */ 723 if (!(star & W_B_STAR_RDOV)) { 724 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 725 wch->bch.nr, wch->bch.state); 726 #ifdef ERROR_STATISTIC 727 wch->bch.err_rdo++; 728 #endif 729 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 730 W_B_CMDR_RRST | W_B_CMDR_RACT); 731 } 732 } 733 if (stat & W_B_EXI_XFR) { 734 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 735 star = ReadW6692B(wch, W_B_STAR); 736 pr_debug("%s: B%d star %02x\n", card->name, 737 wch->bch.nr, star); 738 } 739 if (star & W_B_STAR_XDOW) { 740 pr_debug("%s: B%d XDOW proto=%x\n", card->name, 741 wch->bch.nr, wch->bch.state); 742 #ifdef ERROR_STATISTIC 743 wch->bch.err_xdu++; 744 #endif 745 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 746 W_B_CMDR_RACT); 747 /* resend */ 748 if (wch->bch.tx_skb) { 749 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 750 wch->bch.tx_idx = 0; 751 } 752 } 753 send_next(wch); 754 if (stat & W_B_EXI_XDUN) 755 return; /* handle XDOW only once */ 756 } 757 if (stat & W_B_EXI_XDUN) { 758 pr_debug("%s: B%d XDUN proto=%x\n", card->name, 759 wch->bch.nr, wch->bch.state); 760 #ifdef ERROR_STATISTIC 761 wch->bch.err_xdu++; 762 #endif 763 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT); 764 /* resend */ 765 if (wch->bch.tx_skb) { 766 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 767 wch->bch.tx_idx = 0; 768 } 769 send_next(wch); 770 } 771 } 772 773 static irqreturn_t 774 w6692_irq(int intno, void *dev_id) 775 { 776 struct w6692_hw *card = dev_id; 777 u8 ista; 778 779 spin_lock(&card->lock); 780 ista = ReadW6692(card, W_ISTA); 781 if ((ista | card->imask) == card->imask) { 782 /* possible a shared IRQ reqest */ 783 spin_unlock(&card->lock); 784 return IRQ_NONE; 785 } 786 card->irqcnt++; 787 pr_debug("%s: ista %02x\n", card->name, ista); 788 ista &= ~card->imask; 789 if (ista & W_INT_B1_EXI) 790 W6692B_interrupt(card, 0); 791 if (ista & W_INT_B2_EXI) 792 W6692B_interrupt(card, 1); 793 if (ista & W_INT_D_RME) 794 handle_rxD(card); 795 if (ista & W_INT_D_RMR) 796 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 797 if (ista & W_INT_D_XFR) 798 handle_txD(card); 799 if (ista & W_INT_D_EXI) 800 handle_statusD(card); 801 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 802 pr_debug("%s: W6692 spurious XINT!\n", card->name); 803 /* End IRQ Handler */ 804 spin_unlock(&card->lock); 805 return IRQ_HANDLED; 806 } 807 808 static void 809 dbusy_timer_handler(struct dchannel *dch) 810 { 811 struct w6692_hw *card = dch->hw; 812 int rbch, star; 813 u_long flags; 814 815 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 816 spin_lock_irqsave(&card->lock, flags); 817 rbch = ReadW6692(card, W_D_RBCH); 818 star = ReadW6692(card, W_D_STAR); 819 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 820 card->name, rbch, star); 821 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 822 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 823 else { 824 /* discard frame; reset transceiver */ 825 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 826 if (dch->tx_idx) 827 dch->tx_idx = 0; 828 else 829 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 830 card->name); 831 /* Transmitter reset */ 832 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 833 } 834 spin_unlock_irqrestore(&card->lock, flags); 835 } 836 } 837 838 void initW6692(struct w6692_hw *card) 839 { 840 u8 val; 841 842 card->dch.timer.function = (void *)dbusy_timer_handler; 843 card->dch.timer.data = (u_long)&card->dch; 844 init_timer(&card->dch.timer); 845 w6692_mode(&card->bc[0], ISDN_P_NONE); 846 w6692_mode(&card->bc[1], ISDN_P_NONE); 847 WriteW6692(card, W_D_CTL, 0x00); 848 disable_hwirq(card); 849 WriteW6692(card, W_D_SAM, 0xff); 850 WriteW6692(card, W_D_TAM, 0xff); 851 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 852 card->state = W_L1CMD_RST; 853 ph_command(card, W_L1CMD_RST); 854 ph_command(card, W_L1CMD_ECK); 855 /* enable all IRQ but extern */ 856 card->imask = 0x18; 857 WriteW6692(card, W_D_EXIM, 0x00); 858 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 859 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 860 /* Reset D-chan receiver and transmitter */ 861 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 862 /* Reset B-chan receiver and transmitter */ 863 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 864 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 865 /* enable peripheral */ 866 if (card->subtype == W6692_USR) { 867 /* seems that USR implemented some power control features 868 * Pin 79 is connected to the oscilator circuit so we 869 * have to handle it here 870 */ 871 card->pctl = 0x80; 872 card->xdata = 0; 873 WriteW6692(card, W_PCTL, card->pctl); 874 WriteW6692(card, W_XDATA, card->xdata); 875 } else { 876 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 877 W_PCTL_OE1 | W_PCTL_OE0; 878 card->xaddr = 0x00;/* all sw off */ 879 if (card->fmask & pots) 880 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 881 if (card->fmask & led) 882 card->xdata |= 0x04; /* LED OFF */ 883 if ((card->fmask & pots) || (card->fmask & led)) { 884 WriteW6692(card, W_PCTL, card->pctl); 885 WriteW6692(card, W_XADDR, card->xaddr); 886 WriteW6692(card, W_XDATA, card->xdata); 887 val = ReadW6692(card, W_XADDR); 888 if (debug & DEBUG_HW) 889 pr_notice("%s: W_XADDR=%02x\n", 890 card->name, val); 891 } 892 } 893 } 894 895 static void 896 reset_w6692(struct w6692_hw *card) 897 { 898 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 899 mdelay(10); 900 WriteW6692(card, W_D_CTL, 0); 901 } 902 903 static int 904 init_card(struct w6692_hw *card) 905 { 906 int cnt = 3; 907 u_long flags; 908 909 spin_lock_irqsave(&card->lock, flags); 910 disable_hwirq(card); 911 spin_unlock_irqrestore(&card->lock, flags); 912 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 913 pr_info("%s: couldn't get interrupt %d\n", card->name, 914 card->irq); 915 return -EIO; 916 } 917 while (cnt--) { 918 spin_lock_irqsave(&card->lock, flags); 919 initW6692(card); 920 enable_hwirq(card); 921 spin_unlock_irqrestore(&card->lock, flags); 922 /* Timeout 10ms */ 923 msleep_interruptible(10); 924 if (debug & DEBUG_HW) 925 pr_notice("%s: IRQ %d count %d\n", card->name, 926 card->irq, card->irqcnt); 927 if (!card->irqcnt) { 928 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 929 card->name, card->irq, 3 - cnt); 930 reset_w6692(card); 931 } else 932 return 0; 933 } 934 free_irq(card->irq, card); 935 return -EIO; 936 } 937 938 static int 939 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 940 { 941 struct bchannel *bch = container_of(ch, struct bchannel, ch); 942 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 943 struct w6692_hw *card = bch->hw; 944 int ret = -EINVAL; 945 struct mISDNhead *hh = mISDN_HEAD_P(skb); 946 u32 id; 947 u_long flags; 948 949 switch (hh->prim) { 950 case PH_DATA_REQ: 951 spin_lock_irqsave(&card->lock, flags); 952 ret = bchannel_senddata(bch, skb); 953 if (ret > 0) { /* direct TX */ 954 id = hh->id; /* skb can be freed */ 955 ret = 0; 956 W6692_fill_Bfifo(bc); 957 spin_unlock_irqrestore(&card->lock, flags); 958 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) 959 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 960 } else 961 spin_unlock_irqrestore(&card->lock, flags); 962 return ret; 963 case PH_ACTIVATE_REQ: 964 spin_lock_irqsave(&card->lock, flags); 965 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 966 ret = w6692_mode(bc, ch->protocol); 967 else 968 ret = 0; 969 spin_unlock_irqrestore(&card->lock, flags); 970 if (!ret) 971 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 972 NULL, GFP_KERNEL); 973 break; 974 case PH_DEACTIVATE_REQ: 975 spin_lock_irqsave(&card->lock, flags); 976 mISDN_clear_bchannel(bch); 977 w6692_mode(bc, ISDN_P_NONE); 978 spin_unlock_irqrestore(&card->lock, flags); 979 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 980 NULL, GFP_KERNEL); 981 ret = 0; 982 break; 983 default: 984 pr_info("%s: %s unknown prim(%x,%x)\n", 985 card->name, __func__, hh->prim, hh->id); 986 ret = -EINVAL; 987 } 988 if (!ret) 989 dev_kfree_skb(skb); 990 return ret; 991 } 992 993 static int 994 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 995 { 996 int ret = 0; 997 998 switch (cq->op) { 999 case MISDN_CTRL_GETOP: 1000 cq->op = 0; 1001 break; 1002 /* Nothing implemented yet */ 1003 case MISDN_CTRL_FILL_EMPTY: 1004 default: 1005 pr_info("%s: unknown Op %x\n", __func__, cq->op); 1006 ret = -EINVAL; 1007 break; 1008 } 1009 return ret; 1010 } 1011 1012 static int 1013 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1014 { 1015 struct bchannel *bch; 1016 1017 if (rq->adr.channel > 2) 1018 return -EINVAL; 1019 if (rq->protocol == ISDN_P_NONE) 1020 return -EINVAL; 1021 bch = &card->bc[rq->adr.channel - 1].bch; 1022 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1023 return -EBUSY; /* b-channel can be only open once */ 1024 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); 1025 bch->ch.protocol = rq->protocol; 1026 rq->ch = &bch->ch; 1027 return 0; 1028 } 1029 1030 static int 1031 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1032 { 1033 int ret = 0; 1034 1035 switch (cq->op) { 1036 case MISDN_CTRL_GETOP: 1037 cq->op = 0; 1038 break; 1039 default: 1040 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1041 ret = -EINVAL; 1042 break; 1043 } 1044 return ret; 1045 } 1046 1047 static int 1048 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1049 { 1050 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1051 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1052 struct w6692_hw *card = bch->hw; 1053 int ret = -EINVAL; 1054 u_long flags; 1055 1056 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1057 switch (cmd) { 1058 case CLOSE_CHANNEL: 1059 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1060 if (test_bit(FLG_ACTIVE, &bch->Flags)) { 1061 spin_lock_irqsave(&card->lock, flags); 1062 mISDN_freebchannel(bch); 1063 w6692_mode(bc, ISDN_P_NONE); 1064 spin_unlock_irqrestore(&card->lock, flags); 1065 } else { 1066 skb_queue_purge(&bch->rqueue); 1067 bch->rcount = 0; 1068 } 1069 ch->protocol = ISDN_P_NONE; 1070 ch->peer = NULL; 1071 module_put(THIS_MODULE); 1072 ret = 0; 1073 break; 1074 case CONTROL_CHANNEL: 1075 ret = channel_bctrl(bch, arg); 1076 break; 1077 default: 1078 pr_info("%s: %s unknown prim(%x)\n", 1079 card->name, __func__, cmd); 1080 } 1081 return ret; 1082 } 1083 1084 static int 1085 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1086 { 1087 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1088 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1089 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1090 int ret = -EINVAL; 1091 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1092 u32 id; 1093 u_long flags; 1094 1095 switch (hh->prim) { 1096 case PH_DATA_REQ: 1097 spin_lock_irqsave(&card->lock, flags); 1098 ret = dchannel_senddata(dch, skb); 1099 if (ret > 0) { /* direct TX */ 1100 id = hh->id; /* skb can be freed */ 1101 W6692_fill_Dfifo(card); 1102 ret = 0; 1103 spin_unlock_irqrestore(&card->lock, flags); 1104 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1105 } else 1106 spin_unlock_irqrestore(&card->lock, flags); 1107 return ret; 1108 case PH_ACTIVATE_REQ: 1109 ret = l1_event(dch->l1, hh->prim); 1110 break; 1111 case PH_DEACTIVATE_REQ: 1112 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1113 ret = l1_event(dch->l1, hh->prim); 1114 break; 1115 } 1116 1117 if (!ret) 1118 dev_kfree_skb(skb); 1119 return ret; 1120 } 1121 1122 static int 1123 w6692_l1callback(struct dchannel *dch, u32 cmd) 1124 { 1125 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1126 u_long flags; 1127 1128 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1129 switch (cmd) { 1130 case INFO3_P8: 1131 spin_lock_irqsave(&card->lock, flags); 1132 ph_command(card, W_L1CMD_AR8); 1133 spin_unlock_irqrestore(&card->lock, flags); 1134 break; 1135 case INFO3_P10: 1136 spin_lock_irqsave(&card->lock, flags); 1137 ph_command(card, W_L1CMD_AR10); 1138 spin_unlock_irqrestore(&card->lock, flags); 1139 break; 1140 case HW_RESET_REQ: 1141 spin_lock_irqsave(&card->lock, flags); 1142 if (card->state != W_L1IND_DRD) 1143 ph_command(card, W_L1CMD_RST); 1144 ph_command(card, W_L1CMD_ECK); 1145 spin_unlock_irqrestore(&card->lock, flags); 1146 break; 1147 case HW_DEACT_REQ: 1148 skb_queue_purge(&dch->squeue); 1149 if (dch->tx_skb) { 1150 dev_kfree_skb(dch->tx_skb); 1151 dch->tx_skb = NULL; 1152 } 1153 dch->tx_idx = 0; 1154 if (dch->rx_skb) { 1155 dev_kfree_skb(dch->rx_skb); 1156 dch->rx_skb = NULL; 1157 } 1158 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1159 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1160 del_timer(&dch->timer); 1161 break; 1162 case HW_POWERUP_REQ: 1163 spin_lock_irqsave(&card->lock, flags); 1164 ph_command(card, W_L1CMD_ECK); 1165 spin_unlock_irqrestore(&card->lock, flags); 1166 break; 1167 case PH_ACTIVATE_IND: 1168 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1169 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1170 GFP_ATOMIC); 1171 break; 1172 case PH_DEACTIVATE_IND: 1173 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1174 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1175 GFP_ATOMIC); 1176 break; 1177 default: 1178 pr_debug("%s: %s unknown command %x\n", card->name, 1179 __func__, cmd); 1180 return -1; 1181 } 1182 return 0; 1183 } 1184 1185 static int 1186 open_dchannel(struct w6692_hw *card, struct channel_req *rq) 1187 { 1188 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1189 card->dch.dev.id, __builtin_return_address(1)); 1190 if (rq->protocol != ISDN_P_TE_S0) 1191 return -EINVAL; 1192 if (rq->adr.channel == 1) 1193 /* E-Channel not supported */ 1194 return -EINVAL; 1195 rq->ch = &card->dch.dev.D; 1196 rq->ch->protocol = rq->protocol; 1197 if (card->dch.state == 7) 1198 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1199 0, NULL, GFP_KERNEL); 1200 return 0; 1201 } 1202 1203 static int 1204 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1205 { 1206 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1207 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1208 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1209 struct channel_req *rq; 1210 int err = 0; 1211 1212 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1213 switch (cmd) { 1214 case OPEN_CHANNEL: 1215 rq = arg; 1216 if (rq->protocol == ISDN_P_TE_S0) 1217 err = open_dchannel(card, rq); 1218 else 1219 err = open_bchannel(card, rq); 1220 if (err) 1221 break; 1222 if (!try_module_get(THIS_MODULE)) 1223 pr_info("%s: cannot get module\n", card->name); 1224 break; 1225 case CLOSE_CHANNEL: 1226 pr_debug("%s: dev(%d) close from %p\n", card->name, 1227 dch->dev.id, __builtin_return_address(0)); 1228 module_put(THIS_MODULE); 1229 break; 1230 case CONTROL_CHANNEL: 1231 err = channel_ctrl(card, arg); 1232 break; 1233 default: 1234 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1235 return -EINVAL; 1236 } 1237 return err; 1238 } 1239 1240 static int 1241 setup_w6692(struct w6692_hw *card) 1242 { 1243 u32 val; 1244 1245 if (!request_region(card->addr, 256, card->name)) { 1246 pr_info("%s: config port %x-%x already in use\n", card->name, 1247 card->addr, card->addr + 255); 1248 return -EIO; 1249 } 1250 W6692Version(card); 1251 card->bc[0].addr = card->addr; 1252 card->bc[1].addr = card->addr + 0x40; 1253 val = ReadW6692(card, W_ISTA); 1254 if (debug & DEBUG_HW) 1255 pr_notice("%s ISTA=%02x\n", card->name, val); 1256 val = ReadW6692(card, W_IMASK); 1257 if (debug & DEBUG_HW) 1258 pr_notice("%s IMASK=%02x\n", card->name, val); 1259 val = ReadW6692(card, W_D_EXIR); 1260 if (debug & DEBUG_HW) 1261 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1262 val = ReadW6692(card, W_D_EXIM); 1263 if (debug & DEBUG_HW) 1264 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1265 val = ReadW6692(card, W_D_RSTA); 1266 if (debug & DEBUG_HW) 1267 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1268 return 0; 1269 } 1270 1271 static void 1272 release_card(struct w6692_hw *card) 1273 { 1274 u_long flags; 1275 1276 spin_lock_irqsave(&card->lock, flags); 1277 disable_hwirq(card); 1278 w6692_mode(&card->bc[0], ISDN_P_NONE); 1279 w6692_mode(&card->bc[1], ISDN_P_NONE); 1280 if ((card->fmask & led) || card->subtype == W6692_USR) { 1281 card->xdata |= 0x04; /* LED OFF */ 1282 WriteW6692(card, W_XDATA, card->xdata); 1283 } 1284 spin_unlock_irqrestore(&card->lock, flags); 1285 free_irq(card->irq, card); 1286 l1_event(card->dch.l1, CLOSE_CHANNEL); 1287 mISDN_unregister_device(&card->dch.dev); 1288 release_region(card->addr, 256); 1289 mISDN_freebchannel(&card->bc[1].bch); 1290 mISDN_freebchannel(&card->bc[0].bch); 1291 mISDN_freedchannel(&card->dch); 1292 write_lock_irqsave(&card_lock, flags); 1293 list_del(&card->list); 1294 write_unlock_irqrestore(&card_lock, flags); 1295 pci_disable_device(card->pdev); 1296 pci_set_drvdata(card->pdev, NULL); 1297 kfree(card); 1298 } 1299 1300 static int 1301 setup_instance(struct w6692_hw *card) 1302 { 1303 int i, err; 1304 u_long flags; 1305 1306 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1307 write_lock_irqsave(&card_lock, flags); 1308 list_add_tail(&card->list, &Cards); 1309 write_unlock_irqrestore(&card_lock, flags); 1310 card->fmask = (1 << w6692_cnt); 1311 _set_debug(card); 1312 spin_lock_init(&card->lock); 1313 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1314 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1315 card->dch.dev.D.send = w6692_l2l1D; 1316 card->dch.dev.D.ctrl = w6692_dctrl; 1317 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1318 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1319 card->dch.hw = card; 1320 card->dch.dev.nrbchan = 2; 1321 for (i = 0; i < 2; i++) { 1322 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM); 1323 card->bc[i].bch.hw = card; 1324 card->bc[i].bch.nr = i + 1; 1325 card->bc[i].bch.ch.nr = i + 1; 1326 card->bc[i].bch.ch.send = w6692_l2l1B; 1327 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1328 set_channelmap(i + 1, card->dch.dev.channelmap); 1329 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1330 } 1331 err = setup_w6692(card); 1332 if (err) 1333 goto error_setup; 1334 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1335 card->name); 1336 if (err) 1337 goto error_reg; 1338 err = init_card(card); 1339 if (err) 1340 goto error_init; 1341 err = create_l1(&card->dch, w6692_l1callback); 1342 if (!err) { 1343 w6692_cnt++; 1344 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1345 return 0; 1346 } 1347 1348 free_irq(card->irq, card); 1349 error_init: 1350 mISDN_unregister_device(&card->dch.dev); 1351 error_reg: 1352 release_region(card->addr, 256); 1353 error_setup: 1354 mISDN_freebchannel(&card->bc[1].bch); 1355 mISDN_freebchannel(&card->bc[0].bch); 1356 mISDN_freedchannel(&card->dch); 1357 write_lock_irqsave(&card_lock, flags); 1358 list_del(&card->list); 1359 write_unlock_irqrestore(&card_lock, flags); 1360 kfree(card); 1361 return err; 1362 } 1363 1364 static int __devinit 1365 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1366 { 1367 int err = -ENOMEM; 1368 struct w6692_hw *card; 1369 struct w6692map *m = (struct w6692map *)ent->driver_data; 1370 1371 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1372 if (!card) { 1373 pr_info("No kmem for w6692 card\n"); 1374 return err; 1375 } 1376 card->pdev = pdev; 1377 card->subtype = m->subtype; 1378 err = pci_enable_device(pdev); 1379 if (err) { 1380 kfree(card); 1381 return err; 1382 } 1383 1384 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1385 m->name, pci_name(pdev)); 1386 1387 card->addr = pci_resource_start(pdev, 1); 1388 card->irq = pdev->irq; 1389 pci_set_drvdata(pdev, card); 1390 err = setup_instance(card); 1391 if (err) 1392 pci_set_drvdata(pdev, NULL); 1393 return err; 1394 } 1395 1396 static void __devexit 1397 w6692_remove_pci(struct pci_dev *pdev) 1398 { 1399 struct w6692_hw *card = pci_get_drvdata(pdev); 1400 1401 if (card) 1402 release_card(card); 1403 else 1404 if (debug) 1405 pr_notice("%s: drvdata already removed\n", __func__); 1406 } 1407 1408 static struct pci_device_id w6692_ids[] = { 1409 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1410 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1411 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1412 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1413 (ulong)&w6692_map[2]}, 1414 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1415 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1416 { } 1417 }; 1418 MODULE_DEVICE_TABLE(pci, w6692_ids); 1419 1420 static struct pci_driver w6692_driver = { 1421 .name = "w6692", 1422 .probe = w6692_probe, 1423 .remove = __devexit_p(w6692_remove_pci), 1424 .id_table = w6692_ids, 1425 }; 1426 1427 static int __init w6692_init(void) 1428 { 1429 int err; 1430 1431 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1432 1433 err = pci_register_driver(&w6692_driver); 1434 return err; 1435 } 1436 1437 static void __exit w6692_cleanup(void) 1438 { 1439 pci_unregister_driver(&w6692_driver); 1440 } 1441 1442 module_init(w6692_init); 1443 module_exit(w6692_cleanup); 1444