1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/delay.h> 28 #include <linux/mISDNhw.h> 29 #include <linux/slab.h> 30 #include "w6692.h" 31 32 #define W6692_REV "2.0" 33 34 #define DBUSY_TIMER_VALUE 80 35 36 enum { 37 W6692_ASUS, 38 W6692_WINBOND, 39 W6692_USR 40 }; 41 42 /* private data in the PCI devices list */ 43 struct w6692map { 44 u_int subtype; 45 char *name; 46 }; 47 48 static const struct w6692map w6692_map[] = 49 { 50 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 51 {W6692_WINBOND, "Winbond W6692"}, 52 {W6692_USR, "USR W6692"} 53 }; 54 55 #ifndef PCI_VENDOR_ID_USR 56 #define PCI_VENDOR_ID_USR 0x16ec 57 #define PCI_DEVICE_ID_USR_6692 0x3409 58 #endif 59 60 struct w6692_ch { 61 struct bchannel bch; 62 u32 addr; 63 struct timer_list timer; 64 u8 b_mode; 65 }; 66 67 struct w6692_hw { 68 struct list_head list; 69 struct pci_dev *pdev; 70 char name[MISDN_MAX_IDLEN]; 71 u32 irq; 72 u32 irqcnt; 73 u32 addr; 74 u32 fmask; /* feature mask - bit set per card nr */ 75 int subtype; 76 spinlock_t lock; /* hw lock */ 77 u8 imask; 78 u8 pctl; 79 u8 xaddr; 80 u8 xdata; 81 u8 state; 82 struct w6692_ch bc[2]; 83 struct dchannel dch; 84 char log[64]; 85 }; 86 87 static LIST_HEAD(Cards); 88 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 89 90 static int w6692_cnt; 91 static int debug; 92 static u32 led; 93 static u32 pots; 94 95 static void 96 _set_debug(struct w6692_hw *card) 97 { 98 card->dch.debug = debug; 99 card->bc[0].bch.debug = debug; 100 card->bc[1].bch.debug = debug; 101 } 102 103 static int 104 set_debug(const char *val, struct kernel_param *kp) 105 { 106 int ret; 107 struct w6692_hw *card; 108 109 ret = param_set_uint(val, kp); 110 if (!ret) { 111 read_lock(&card_lock); 112 list_for_each_entry(card, &Cards, list) 113 _set_debug(card); 114 read_unlock(&card_lock); 115 } 116 return ret; 117 } 118 119 MODULE_AUTHOR("Karsten Keil"); 120 MODULE_LICENSE("GPL v2"); 121 MODULE_VERSION(W6692_REV); 122 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 123 MODULE_PARM_DESC(debug, "W6692 debug mask"); 124 module_param(led, uint, S_IRUGO | S_IWUSR); 125 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 126 module_param(pots, uint, S_IRUGO | S_IWUSR); 127 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 128 129 static inline u8 130 ReadW6692(struct w6692_hw *card, u8 offset) 131 { 132 return inb(card->addr + offset); 133 } 134 135 static inline void 136 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 137 { 138 outb(value, card->addr + offset); 139 } 140 141 static inline u8 142 ReadW6692B(struct w6692_ch *bc, u8 offset) 143 { 144 return inb(bc->addr + offset); 145 } 146 147 static inline void 148 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 149 { 150 outb(value, bc->addr + offset); 151 } 152 153 static void 154 enable_hwirq(struct w6692_hw *card) 155 { 156 WriteW6692(card, W_IMASK, card->imask); 157 } 158 159 static void 160 disable_hwirq(struct w6692_hw *card) 161 { 162 WriteW6692(card, W_IMASK, 0xff); 163 } 164 165 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 166 167 static void 168 W6692Version(struct w6692_hw *card) 169 { 170 int val; 171 172 val = ReadW6692(card, W_D_RBCH); 173 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 174 W6692Ver[(val >> 6) & 3]); 175 } 176 177 static void 178 w6692_led_handler(struct w6692_hw *card, int on) 179 { 180 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 181 return; 182 if (on) { 183 card->xdata &= 0xfb; /* LED ON */ 184 WriteW6692(card, W_XDATA, card->xdata); 185 } else { 186 card->xdata |= 0x04; /* LED OFF */ 187 WriteW6692(card, W_XDATA, card->xdata); 188 } 189 } 190 191 static void 192 ph_command(struct w6692_hw *card, u8 cmd) 193 { 194 pr_debug("%s: ph_command %x\n", card->name, cmd); 195 WriteW6692(card, W_CIX, cmd); 196 } 197 198 static void 199 W6692_new_ph(struct w6692_hw *card) 200 { 201 if (card->state == W_L1CMD_RST) 202 ph_command(card, W_L1CMD_DRC); 203 schedule_event(&card->dch, FLG_PHCHANGE); 204 } 205 206 static void 207 W6692_ph_bh(struct dchannel *dch) 208 { 209 struct w6692_hw *card = dch->hw; 210 211 switch (card->state) { 212 case W_L1CMD_RST: 213 dch->state = 0; 214 l1_event(dch->l1, HW_RESET_IND); 215 break; 216 case W_L1IND_CD: 217 dch->state = 3; 218 l1_event(dch->l1, HW_DEACT_CNF); 219 break; 220 case W_L1IND_DRD: 221 dch->state = 3; 222 l1_event(dch->l1, HW_DEACT_IND); 223 break; 224 case W_L1IND_CE: 225 dch->state = 4; 226 l1_event(dch->l1, HW_POWERUP_IND); 227 break; 228 case W_L1IND_LD: 229 if (dch->state <= 5) { 230 dch->state = 5; 231 l1_event(dch->l1, ANYSIGNAL); 232 } else { 233 dch->state = 8; 234 l1_event(dch->l1, LOSTFRAMING); 235 } 236 break; 237 case W_L1IND_ARD: 238 dch->state = 6; 239 l1_event(dch->l1, INFO2); 240 break; 241 case W_L1IND_AI8: 242 dch->state = 7; 243 l1_event(dch->l1, INFO4_P8); 244 break; 245 case W_L1IND_AI10: 246 dch->state = 7; 247 l1_event(dch->l1, INFO4_P10); 248 break; 249 default: 250 pr_debug("%s: TE unknown state %02x dch state %02x\n", 251 card->name, card->state, dch->state); 252 break; 253 } 254 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 255 } 256 257 static void 258 W6692_empty_Dfifo(struct w6692_hw *card, int count) 259 { 260 struct dchannel *dch = &card->dch; 261 u8 *ptr; 262 263 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 264 if (!dch->rx_skb) { 265 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 266 if (!dch->rx_skb) { 267 pr_info("%s: D receive out of memory\n", card->name); 268 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 269 return; 270 } 271 } 272 if ((dch->rx_skb->len + count) >= dch->maxlen) { 273 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 274 dch->rx_skb->len + count); 275 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 276 return; 277 } 278 ptr = skb_put(dch->rx_skb, count); 279 insb(card->addr + W_D_RFIFO, ptr, count); 280 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 281 if (debug & DEBUG_HW_DFIFO) { 282 snprintf(card->log, 63, "D-recv %s %d ", 283 card->name, count); 284 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 285 } 286 } 287 288 static void 289 W6692_fill_Dfifo(struct w6692_hw *card) 290 { 291 struct dchannel *dch = &card->dch; 292 int count; 293 u8 *ptr; 294 u8 cmd = W_D_CMDR_XMS; 295 296 pr_debug("%s: fill_Dfifo\n", card->name); 297 if (!dch->tx_skb) 298 return; 299 count = dch->tx_skb->len - dch->tx_idx; 300 if (count <= 0) 301 return; 302 if (count > W_D_FIFO_THRESH) 303 count = W_D_FIFO_THRESH; 304 else 305 cmd |= W_D_CMDR_XME; 306 ptr = dch->tx_skb->data + dch->tx_idx; 307 dch->tx_idx += count; 308 outsb(card->addr + W_D_XFIFO, ptr, count); 309 WriteW6692(card, W_D_CMDR, cmd); 310 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 311 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 312 del_timer(&dch->timer); 313 } 314 init_timer(&dch->timer); 315 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 316 add_timer(&dch->timer); 317 if (debug & DEBUG_HW_DFIFO) { 318 snprintf(card->log, 63, "D-send %s %d ", 319 card->name, count); 320 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 321 } 322 } 323 324 static void 325 d_retransmit(struct w6692_hw *card) 326 { 327 struct dchannel *dch = &card->dch; 328 329 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 330 del_timer(&dch->timer); 331 #ifdef FIXME 332 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 333 dchannel_sched_event(dch, D_CLEARBUSY); 334 #endif 335 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 336 /* Restart frame */ 337 dch->tx_idx = 0; 338 W6692_fill_Dfifo(card); 339 } else if (dch->tx_skb) { /* should not happen */ 340 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 341 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 342 dch->tx_idx = 0; 343 W6692_fill_Dfifo(card); 344 } else { 345 pr_info("%s: XDU no TX_BUSY\n", card->name); 346 if (get_next_dframe(dch)) 347 W6692_fill_Dfifo(card); 348 } 349 } 350 351 static void 352 handle_rxD(struct w6692_hw *card) { 353 u8 stat; 354 int count; 355 356 stat = ReadW6692(card, W_D_RSTA); 357 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 358 if (stat & W_D_RSTA_RDOV) { 359 pr_debug("%s: D-channel RDOV\n", card->name); 360 #ifdef ERROR_STATISTIC 361 card->dch.err_rx++; 362 #endif 363 } 364 if (stat & W_D_RSTA_CRCE) { 365 pr_debug("%s: D-channel CRC error\n", card->name); 366 #ifdef ERROR_STATISTIC 367 card->dch.err_crc++; 368 #endif 369 } 370 if (stat & W_D_RSTA_RMB) { 371 pr_debug("%s: D-channel ABORT\n", card->name); 372 #ifdef ERROR_STATISTIC 373 card->dch.err_rx++; 374 #endif 375 } 376 if (card->dch.rx_skb) 377 dev_kfree_skb(card->dch.rx_skb); 378 card->dch.rx_skb = NULL; 379 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 380 } else { 381 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 382 if (count == 0) 383 count = W_D_FIFO_THRESH; 384 W6692_empty_Dfifo(card, count); 385 recv_Dchannel(&card->dch); 386 } 387 } 388 389 static void 390 handle_txD(struct w6692_hw *card) { 391 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 392 del_timer(&card->dch.timer); 393 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 394 W6692_fill_Dfifo(card); 395 } else { 396 if (card->dch.tx_skb) 397 dev_kfree_skb(card->dch.tx_skb); 398 if (get_next_dframe(&card->dch)) 399 W6692_fill_Dfifo(card); 400 } 401 } 402 403 static void 404 handle_statusD(struct w6692_hw *card) 405 { 406 struct dchannel *dch = &card->dch; 407 u8 exval, v1, cir; 408 409 exval = ReadW6692(card, W_D_EXIR); 410 411 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 412 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 413 /* Transmit underrun/collision */ 414 pr_debug("%s: D-channel underrun/collision\n", card->name); 415 #ifdef ERROR_STATISTIC 416 dch->err_tx++; 417 #endif 418 d_retransmit(card); 419 } 420 if (exval & W_D_EXI_RDOV) { /* RDOV */ 421 pr_debug("%s: D-channel RDOV\n", card->name); 422 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 423 } 424 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 425 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 426 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 427 v1 = ReadW6692(card, W_MOSR); 428 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 429 card->name, v1); 430 } 431 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 432 cir = ReadW6692(card, W_CIR); 433 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 434 if (cir & W_CIR_ICC) { 435 v1 = cir & W_CIR_COD_MASK; 436 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 437 dch->state, v1); 438 card->state = v1; 439 if (card->fmask & led) { 440 switch (v1) { 441 case W_L1IND_AI8: 442 case W_L1IND_AI10: 443 w6692_led_handler(card, 1); 444 break; 445 default: 446 w6692_led_handler(card, 0); 447 break; 448 } 449 } 450 W6692_new_ph(card); 451 } 452 if (cir & W_CIR_SCC) { 453 v1 = ReadW6692(card, W_SQR); 454 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 455 } 456 } 457 if (exval & W_D_EXI_WEXP) 458 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 459 if (exval & W_D_EXI_TEXP) 460 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 461 } 462 463 static void 464 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 465 { 466 struct w6692_hw *card = wch->bch.hw; 467 u8 *ptr; 468 469 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 470 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 471 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 472 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 473 if (wch->bch.rx_skb) 474 skb_trim(wch->bch.rx_skb, 0); 475 return; 476 } 477 if (!wch->bch.rx_skb) { 478 wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC); 479 if (unlikely(!wch->bch.rx_skb)) { 480 pr_info("%s: B receive out of memory\n", card->name); 481 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 482 W_B_CMDR_RACT); 483 return; 484 } 485 } 486 if (wch->bch.rx_skb->len + count > wch->bch.maxlen) { 487 pr_debug("%s: empty_Bfifo incoming packet too large\n", 488 card->name); 489 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 490 skb_trim(wch->bch.rx_skb, 0); 491 return; 492 } 493 ptr = skb_put(wch->bch.rx_skb, count); 494 insb(wch->addr + W_B_RFIFO, ptr, count); 495 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 496 if (debug & DEBUG_HW_DFIFO) { 497 snprintf(card->log, 63, "B%1d-recv %s %d ", 498 wch->bch.nr, card->name, count); 499 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 500 } 501 } 502 503 static void 504 W6692_fill_Bfifo(struct w6692_ch *wch) 505 { 506 struct w6692_hw *card = wch->bch.hw; 507 int count; 508 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 509 510 pr_debug("%s: fill Bfifo\n", card->name); 511 if (!wch->bch.tx_skb) 512 return; 513 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 514 if (count <= 0) 515 return; 516 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 517 if (count > W_B_FIFO_THRESH) 518 count = W_B_FIFO_THRESH; 519 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 520 cmd |= W_B_CMDR_XME; 521 522 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 523 count, wch->bch.tx_idx); 524 wch->bch.tx_idx += count; 525 outsb(wch->addr + W_B_XFIFO, ptr, count); 526 WriteW6692B(wch, W_B_CMDR, cmd); 527 if (debug & DEBUG_HW_DFIFO) { 528 snprintf(card->log, 63, "B%1d-send %s %d ", 529 wch->bch.nr, card->name, count); 530 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 531 } 532 } 533 534 #if 0 535 static int 536 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 537 { 538 struct w6692_hw *card = wch->bch.hw; 539 u16 *vol = (u16 *)skb->data; 540 u8 val; 541 542 if ((!(card->fmask & pots)) || 543 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 544 return -ENODEV; 545 if (skb->len < 2) 546 return -EINVAL; 547 if (*vol > 7) 548 return -EINVAL; 549 val = *vol & 7; 550 val = 7 - val; 551 if (mic) { 552 val <<= 3; 553 card->xaddr &= 0xc7; 554 } else { 555 card->xaddr &= 0xf8; 556 } 557 card->xaddr |= val; 558 WriteW6692(card, W_XADDR, card->xaddr); 559 return 0; 560 } 561 562 static int 563 enable_pots(struct w6692_ch *wch) 564 { 565 struct w6692_hw *card = wch->bch.hw; 566 567 if ((!(card->fmask & pots)) || 568 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 569 return -ENODEV; 570 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 571 WriteW6692B(wch, W_B_MODE, wch->b_mode); 572 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 573 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 574 WriteW6692(card, W_PCTL, card->pctl); 575 return 0; 576 } 577 #endif 578 579 static int 580 disable_pots(struct w6692_ch *wch) 581 { 582 struct w6692_hw *card = wch->bch.hw; 583 584 if (!(card->fmask & pots)) 585 return -ENODEV; 586 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 587 WriteW6692B(wch, W_B_MODE, wch->b_mode); 588 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 589 W_B_CMDR_XRST); 590 return 0; 591 } 592 593 static int 594 w6692_mode(struct w6692_ch *wch, u32 pr) 595 { 596 struct w6692_hw *card; 597 598 card = wch->bch.hw; 599 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 600 wch->bch.nr, wch->bch.state, pr); 601 switch (pr) { 602 case ISDN_P_NONE: 603 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 604 disable_pots(wch); 605 wch->b_mode = 0; 606 mISDN_clear_bchannel(&wch->bch); 607 WriteW6692B(wch, W_B_MODE, wch->b_mode); 608 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 609 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 610 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 611 break; 612 case ISDN_P_B_RAW: 613 wch->b_mode = W_B_MODE_MMS; 614 WriteW6692B(wch, W_B_MODE, wch->b_mode); 615 WriteW6692B(wch, W_B_EXIM, 0); 616 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 617 W_B_CMDR_XRST); 618 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 619 break; 620 case ISDN_P_B_HDLC: 621 wch->b_mode = W_B_MODE_ITF; 622 WriteW6692B(wch, W_B_MODE, wch->b_mode); 623 WriteW6692B(wch, W_B_ADM1, 0xff); 624 WriteW6692B(wch, W_B_ADM2, 0xff); 625 WriteW6692B(wch, W_B_EXIM, 0); 626 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 627 W_B_CMDR_XRST); 628 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 629 break; 630 default: 631 pr_info("%s: protocol %x not known\n", card->name, pr); 632 return -ENOPROTOOPT; 633 } 634 wch->bch.state = pr; 635 return 0; 636 } 637 638 static void 639 send_next(struct w6692_ch *wch) 640 { 641 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) 642 W6692_fill_Bfifo(wch); 643 else { 644 if (wch->bch.tx_skb) { 645 /* send confirm, on trans, free on hdlc. */ 646 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 647 confirm_Bsend(&wch->bch); 648 dev_kfree_skb(wch->bch.tx_skb); 649 } 650 if (get_next_bframe(&wch->bch)) 651 W6692_fill_Bfifo(wch); 652 } 653 } 654 655 static void 656 W6692B_interrupt(struct w6692_hw *card, int ch) 657 { 658 struct w6692_ch *wch = &card->bc[ch]; 659 int count; 660 u8 stat, star = 0; 661 662 stat = ReadW6692B(wch, W_B_EXIR); 663 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 664 if (stat & W_B_EXI_RME) { 665 star = ReadW6692B(wch, W_B_STAR); 666 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 667 if ((star & W_B_STAR_RDOV) && 668 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 669 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 670 wch->bch.nr, wch->bch.state); 671 #ifdef ERROR_STATISTIC 672 wch->bch.err_rdo++; 673 #endif 674 } 675 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 676 if (star & W_B_STAR_CRCE) { 677 pr_debug("%s: B%d CRC error\n", 678 card->name, wch->bch.nr); 679 #ifdef ERROR_STATISTIC 680 wch->bch.err_crc++; 681 #endif 682 } 683 if (star & W_B_STAR_RMB) { 684 pr_debug("%s: B%d message abort\n", 685 card->name, wch->bch.nr); 686 #ifdef ERROR_STATISTIC 687 wch->bch.err_inv++; 688 #endif 689 } 690 } 691 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 692 W_B_CMDR_RRST | W_B_CMDR_RACT); 693 if (wch->bch.rx_skb) 694 skb_trim(wch->bch.rx_skb, 0); 695 } else { 696 count = ReadW6692B(wch, W_B_RBCL) & 697 (W_B_FIFO_THRESH - 1); 698 if (count == 0) 699 count = W_B_FIFO_THRESH; 700 W6692_empty_Bfifo(wch, count); 701 recv_Bchannel(&wch->bch, 0); 702 } 703 } 704 if (stat & W_B_EXI_RMR) { 705 if (!(stat & W_B_EXI_RME)) 706 star = ReadW6692B(wch, W_B_STAR); 707 if (star & W_B_STAR_RDOV) { 708 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 709 wch->bch.nr, wch->bch.state); 710 #ifdef ERROR_STATISTIC 711 wch->bch.err_rdo++; 712 #endif 713 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 714 W_B_CMDR_RRST | W_B_CMDR_RACT); 715 } else { 716 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 717 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) && 718 wch->bch.rx_skb && (wch->bch.rx_skb->len > 0)) 719 recv_Bchannel(&wch->bch, 0); 720 } 721 } 722 if (stat & W_B_EXI_RDOV) { 723 /* only if it is not handled yet */ 724 if (!(star & W_B_STAR_RDOV)) { 725 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 726 wch->bch.nr, wch->bch.state); 727 #ifdef ERROR_STATISTIC 728 wch->bch.err_rdo++; 729 #endif 730 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 731 W_B_CMDR_RRST | W_B_CMDR_RACT); 732 } 733 } 734 if (stat & W_B_EXI_XFR) { 735 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 736 star = ReadW6692B(wch, W_B_STAR); 737 pr_debug("%s: B%d star %02x\n", card->name, 738 wch->bch.nr, star); 739 } 740 if (star & W_B_STAR_XDOW) { 741 pr_debug("%s: B%d XDOW proto=%x\n", card->name, 742 wch->bch.nr, wch->bch.state); 743 #ifdef ERROR_STATISTIC 744 wch->bch.err_xdu++; 745 #endif 746 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 747 W_B_CMDR_RACT); 748 /* resend */ 749 if (wch->bch.tx_skb) { 750 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 751 wch->bch.tx_idx = 0; 752 } 753 } 754 send_next(wch); 755 if (stat & W_B_EXI_XDUN) 756 return; /* handle XDOW only once */ 757 } 758 if (stat & W_B_EXI_XDUN) { 759 pr_debug("%s: B%d XDUN proto=%x\n", card->name, 760 wch->bch.nr, wch->bch.state); 761 #ifdef ERROR_STATISTIC 762 wch->bch.err_xdu++; 763 #endif 764 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT); 765 /* resend */ 766 if (wch->bch.tx_skb) { 767 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 768 wch->bch.tx_idx = 0; 769 } 770 send_next(wch); 771 } 772 } 773 774 static irqreturn_t 775 w6692_irq(int intno, void *dev_id) 776 { 777 struct w6692_hw *card = dev_id; 778 u8 ista; 779 780 spin_lock(&card->lock); 781 ista = ReadW6692(card, W_ISTA); 782 if ((ista | card->imask) == card->imask) { 783 /* possible a shared IRQ reqest */ 784 spin_unlock(&card->lock); 785 return IRQ_NONE; 786 } 787 card->irqcnt++; 788 pr_debug("%s: ista %02x\n", card->name, ista); 789 ista &= ~card->imask; 790 if (ista & W_INT_B1_EXI) 791 W6692B_interrupt(card, 0); 792 if (ista & W_INT_B2_EXI) 793 W6692B_interrupt(card, 1); 794 if (ista & W_INT_D_RME) 795 handle_rxD(card); 796 if (ista & W_INT_D_RMR) 797 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 798 if (ista & W_INT_D_XFR) 799 handle_txD(card); 800 if (ista & W_INT_D_EXI) 801 handle_statusD(card); 802 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 803 pr_debug("%s: W6692 spurious XINT!\n", card->name); 804 /* End IRQ Handler */ 805 spin_unlock(&card->lock); 806 return IRQ_HANDLED; 807 } 808 809 static void 810 dbusy_timer_handler(struct dchannel *dch) 811 { 812 struct w6692_hw *card = dch->hw; 813 int rbch, star; 814 u_long flags; 815 816 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 817 spin_lock_irqsave(&card->lock, flags); 818 rbch = ReadW6692(card, W_D_RBCH); 819 star = ReadW6692(card, W_D_STAR); 820 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 821 card->name, rbch, star); 822 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 823 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 824 else { 825 /* discard frame; reset transceiver */ 826 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 827 if (dch->tx_idx) 828 dch->tx_idx = 0; 829 else 830 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 831 card->name); 832 /* Transmitter reset */ 833 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 834 } 835 spin_unlock_irqrestore(&card->lock, flags); 836 } 837 } 838 839 void initW6692(struct w6692_hw *card) 840 { 841 u8 val; 842 843 card->dch.timer.function = (void *)dbusy_timer_handler; 844 card->dch.timer.data = (u_long)&card->dch; 845 init_timer(&card->dch.timer); 846 w6692_mode(&card->bc[0], ISDN_P_NONE); 847 w6692_mode(&card->bc[1], ISDN_P_NONE); 848 WriteW6692(card, W_D_CTL, 0x00); 849 disable_hwirq(card); 850 WriteW6692(card, W_D_SAM, 0xff); 851 WriteW6692(card, W_D_TAM, 0xff); 852 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 853 card->state = W_L1CMD_RST; 854 ph_command(card, W_L1CMD_RST); 855 ph_command(card, W_L1CMD_ECK); 856 /* enable all IRQ but extern */ 857 card->imask = 0x18; 858 WriteW6692(card, W_D_EXIM, 0x00); 859 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 860 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 861 /* Reset D-chan receiver and transmitter */ 862 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 863 /* Reset B-chan receiver and transmitter */ 864 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 865 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 866 /* enable peripheral */ 867 if (card->subtype == W6692_USR) { 868 /* seems that USR implemented some power control features 869 * Pin 79 is connected to the oscilator circuit so we 870 * have to handle it here 871 */ 872 card->pctl = 0x80; 873 card->xdata = 0; 874 WriteW6692(card, W_PCTL, card->pctl); 875 WriteW6692(card, W_XDATA, card->xdata); 876 } else { 877 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 878 W_PCTL_OE1 | W_PCTL_OE0; 879 card->xaddr = 0x00;/* all sw off */ 880 if (card->fmask & pots) 881 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 882 if (card->fmask & led) 883 card->xdata |= 0x04; /* LED OFF */ 884 if ((card->fmask & pots) || (card->fmask & led)) { 885 WriteW6692(card, W_PCTL, card->pctl); 886 WriteW6692(card, W_XADDR, card->xaddr); 887 WriteW6692(card, W_XDATA, card->xdata); 888 val = ReadW6692(card, W_XADDR); 889 if (debug & DEBUG_HW) 890 pr_notice("%s: W_XADDR=%02x\n", 891 card->name, val); 892 } 893 } 894 } 895 896 static void 897 reset_w6692(struct w6692_hw *card) 898 { 899 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 900 mdelay(10); 901 WriteW6692(card, W_D_CTL, 0); 902 } 903 904 static int 905 init_card(struct w6692_hw *card) 906 { 907 int cnt = 3; 908 u_long flags; 909 910 spin_lock_irqsave(&card->lock, flags); 911 disable_hwirq(card); 912 spin_unlock_irqrestore(&card->lock, flags); 913 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 914 pr_info("%s: couldn't get interrupt %d\n", card->name, 915 card->irq); 916 return -EIO; 917 } 918 while (cnt--) { 919 spin_lock_irqsave(&card->lock, flags); 920 initW6692(card); 921 enable_hwirq(card); 922 spin_unlock_irqrestore(&card->lock, flags); 923 /* Timeout 10ms */ 924 msleep_interruptible(10); 925 if (debug & DEBUG_HW) 926 pr_notice("%s: IRQ %d count %d\n", card->name, 927 card->irq, card->irqcnt); 928 if (!card->irqcnt) { 929 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 930 card->name, card->irq, 3 - cnt); 931 reset_w6692(card); 932 } else 933 return 0; 934 } 935 free_irq(card->irq, card); 936 return -EIO; 937 } 938 939 static int 940 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 941 { 942 struct bchannel *bch = container_of(ch, struct bchannel, ch); 943 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 944 struct w6692_hw *card = bch->hw; 945 int ret = -EINVAL; 946 struct mISDNhead *hh = mISDN_HEAD_P(skb); 947 u32 id; 948 u_long flags; 949 950 switch (hh->prim) { 951 case PH_DATA_REQ: 952 spin_lock_irqsave(&card->lock, flags); 953 ret = bchannel_senddata(bch, skb); 954 if (ret > 0) { /* direct TX */ 955 id = hh->id; /* skb can be freed */ 956 ret = 0; 957 W6692_fill_Bfifo(bc); 958 spin_unlock_irqrestore(&card->lock, flags); 959 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) 960 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 961 } else 962 spin_unlock_irqrestore(&card->lock, flags); 963 return ret; 964 case PH_ACTIVATE_REQ: 965 spin_lock_irqsave(&card->lock, flags); 966 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 967 ret = w6692_mode(bc, ch->protocol); 968 else 969 ret = 0; 970 spin_unlock_irqrestore(&card->lock, flags); 971 if (!ret) 972 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 973 NULL, GFP_KERNEL); 974 break; 975 case PH_DEACTIVATE_REQ: 976 spin_lock_irqsave(&card->lock, flags); 977 mISDN_clear_bchannel(bch); 978 w6692_mode(bc, ISDN_P_NONE); 979 spin_unlock_irqrestore(&card->lock, flags); 980 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 981 NULL, GFP_KERNEL); 982 ret = 0; 983 break; 984 default: 985 pr_info("%s: %s unknown prim(%x,%x)\n", 986 card->name, __func__, hh->prim, hh->id); 987 ret = -EINVAL; 988 } 989 if (!ret) 990 dev_kfree_skb(skb); 991 return ret; 992 } 993 994 static int 995 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 996 { 997 int ret = 0; 998 999 switch (cq->op) { 1000 case MISDN_CTRL_GETOP: 1001 cq->op = 0; 1002 break; 1003 /* Nothing implemented yet */ 1004 case MISDN_CTRL_FILL_EMPTY: 1005 default: 1006 pr_info("%s: unknown Op %x\n", __func__, cq->op); 1007 ret = -EINVAL; 1008 break; 1009 } 1010 return ret; 1011 } 1012 1013 static int 1014 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1015 { 1016 struct bchannel *bch; 1017 1018 if (rq->adr.channel == 0 || rq->adr.channel > 2) 1019 return -EINVAL; 1020 if (rq->protocol == ISDN_P_NONE) 1021 return -EINVAL; 1022 bch = &card->bc[rq->adr.channel - 1].bch; 1023 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1024 return -EBUSY; /* b-channel can be only open once */ 1025 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); 1026 bch->ch.protocol = rq->protocol; 1027 rq->ch = &bch->ch; 1028 return 0; 1029 } 1030 1031 static int 1032 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1033 { 1034 int ret = 0; 1035 1036 switch (cq->op) { 1037 case MISDN_CTRL_GETOP: 1038 cq->op = MISDN_CTRL_L1_TIMER3; 1039 break; 1040 case MISDN_CTRL_L1_TIMER3: 1041 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1042 break; 1043 default: 1044 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1045 ret = -EINVAL; 1046 break; 1047 } 1048 return ret; 1049 } 1050 1051 static int 1052 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1053 { 1054 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1055 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1056 struct w6692_hw *card = bch->hw; 1057 int ret = -EINVAL; 1058 u_long flags; 1059 1060 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1061 switch (cmd) { 1062 case CLOSE_CHANNEL: 1063 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1064 if (test_bit(FLG_ACTIVE, &bch->Flags)) { 1065 spin_lock_irqsave(&card->lock, flags); 1066 mISDN_freebchannel(bch); 1067 w6692_mode(bc, ISDN_P_NONE); 1068 spin_unlock_irqrestore(&card->lock, flags); 1069 } else { 1070 skb_queue_purge(&bch->rqueue); 1071 bch->rcount = 0; 1072 } 1073 ch->protocol = ISDN_P_NONE; 1074 ch->peer = NULL; 1075 module_put(THIS_MODULE); 1076 ret = 0; 1077 break; 1078 case CONTROL_CHANNEL: 1079 ret = channel_bctrl(bch, arg); 1080 break; 1081 default: 1082 pr_info("%s: %s unknown prim(%x)\n", 1083 card->name, __func__, cmd); 1084 } 1085 return ret; 1086 } 1087 1088 static int 1089 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1090 { 1091 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1092 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1093 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1094 int ret = -EINVAL; 1095 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1096 u32 id; 1097 u_long flags; 1098 1099 switch (hh->prim) { 1100 case PH_DATA_REQ: 1101 spin_lock_irqsave(&card->lock, flags); 1102 ret = dchannel_senddata(dch, skb); 1103 if (ret > 0) { /* direct TX */ 1104 id = hh->id; /* skb can be freed */ 1105 W6692_fill_Dfifo(card); 1106 ret = 0; 1107 spin_unlock_irqrestore(&card->lock, flags); 1108 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1109 } else 1110 spin_unlock_irqrestore(&card->lock, flags); 1111 return ret; 1112 case PH_ACTIVATE_REQ: 1113 ret = l1_event(dch->l1, hh->prim); 1114 break; 1115 case PH_DEACTIVATE_REQ: 1116 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1117 ret = l1_event(dch->l1, hh->prim); 1118 break; 1119 } 1120 1121 if (!ret) 1122 dev_kfree_skb(skb); 1123 return ret; 1124 } 1125 1126 static int 1127 w6692_l1callback(struct dchannel *dch, u32 cmd) 1128 { 1129 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1130 u_long flags; 1131 1132 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1133 switch (cmd) { 1134 case INFO3_P8: 1135 spin_lock_irqsave(&card->lock, flags); 1136 ph_command(card, W_L1CMD_AR8); 1137 spin_unlock_irqrestore(&card->lock, flags); 1138 break; 1139 case INFO3_P10: 1140 spin_lock_irqsave(&card->lock, flags); 1141 ph_command(card, W_L1CMD_AR10); 1142 spin_unlock_irqrestore(&card->lock, flags); 1143 break; 1144 case HW_RESET_REQ: 1145 spin_lock_irqsave(&card->lock, flags); 1146 if (card->state != W_L1IND_DRD) 1147 ph_command(card, W_L1CMD_RST); 1148 ph_command(card, W_L1CMD_ECK); 1149 spin_unlock_irqrestore(&card->lock, flags); 1150 break; 1151 case HW_DEACT_REQ: 1152 skb_queue_purge(&dch->squeue); 1153 if (dch->tx_skb) { 1154 dev_kfree_skb(dch->tx_skb); 1155 dch->tx_skb = NULL; 1156 } 1157 dch->tx_idx = 0; 1158 if (dch->rx_skb) { 1159 dev_kfree_skb(dch->rx_skb); 1160 dch->rx_skb = NULL; 1161 } 1162 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1163 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1164 del_timer(&dch->timer); 1165 break; 1166 case HW_POWERUP_REQ: 1167 spin_lock_irqsave(&card->lock, flags); 1168 ph_command(card, W_L1CMD_ECK); 1169 spin_unlock_irqrestore(&card->lock, flags); 1170 break; 1171 case PH_ACTIVATE_IND: 1172 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1173 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1174 GFP_ATOMIC); 1175 break; 1176 case PH_DEACTIVATE_IND: 1177 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1178 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1179 GFP_ATOMIC); 1180 break; 1181 default: 1182 pr_debug("%s: %s unknown command %x\n", card->name, 1183 __func__, cmd); 1184 return -1; 1185 } 1186 return 0; 1187 } 1188 1189 static int 1190 open_dchannel(struct w6692_hw *card, struct channel_req *rq) 1191 { 1192 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1193 card->dch.dev.id, __builtin_return_address(1)); 1194 if (rq->protocol != ISDN_P_TE_S0) 1195 return -EINVAL; 1196 if (rq->adr.channel == 1) 1197 /* E-Channel not supported */ 1198 return -EINVAL; 1199 rq->ch = &card->dch.dev.D; 1200 rq->ch->protocol = rq->protocol; 1201 if (card->dch.state == 7) 1202 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1203 0, NULL, GFP_KERNEL); 1204 return 0; 1205 } 1206 1207 static int 1208 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1209 { 1210 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1211 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1212 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1213 struct channel_req *rq; 1214 int err = 0; 1215 1216 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1217 switch (cmd) { 1218 case OPEN_CHANNEL: 1219 rq = arg; 1220 if (rq->protocol == ISDN_P_TE_S0) 1221 err = open_dchannel(card, rq); 1222 else 1223 err = open_bchannel(card, rq); 1224 if (err) 1225 break; 1226 if (!try_module_get(THIS_MODULE)) 1227 pr_info("%s: cannot get module\n", card->name); 1228 break; 1229 case CLOSE_CHANNEL: 1230 pr_debug("%s: dev(%d) close from %p\n", card->name, 1231 dch->dev.id, __builtin_return_address(0)); 1232 module_put(THIS_MODULE); 1233 break; 1234 case CONTROL_CHANNEL: 1235 err = channel_ctrl(card, arg); 1236 break; 1237 default: 1238 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1239 return -EINVAL; 1240 } 1241 return err; 1242 } 1243 1244 static int 1245 setup_w6692(struct w6692_hw *card) 1246 { 1247 u32 val; 1248 1249 if (!request_region(card->addr, 256, card->name)) { 1250 pr_info("%s: config port %x-%x already in use\n", card->name, 1251 card->addr, card->addr + 255); 1252 return -EIO; 1253 } 1254 W6692Version(card); 1255 card->bc[0].addr = card->addr; 1256 card->bc[1].addr = card->addr + 0x40; 1257 val = ReadW6692(card, W_ISTA); 1258 if (debug & DEBUG_HW) 1259 pr_notice("%s ISTA=%02x\n", card->name, val); 1260 val = ReadW6692(card, W_IMASK); 1261 if (debug & DEBUG_HW) 1262 pr_notice("%s IMASK=%02x\n", card->name, val); 1263 val = ReadW6692(card, W_D_EXIR); 1264 if (debug & DEBUG_HW) 1265 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1266 val = ReadW6692(card, W_D_EXIM); 1267 if (debug & DEBUG_HW) 1268 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1269 val = ReadW6692(card, W_D_RSTA); 1270 if (debug & DEBUG_HW) 1271 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1272 return 0; 1273 } 1274 1275 static void 1276 release_card(struct w6692_hw *card) 1277 { 1278 u_long flags; 1279 1280 spin_lock_irqsave(&card->lock, flags); 1281 disable_hwirq(card); 1282 w6692_mode(&card->bc[0], ISDN_P_NONE); 1283 w6692_mode(&card->bc[1], ISDN_P_NONE); 1284 if ((card->fmask & led) || card->subtype == W6692_USR) { 1285 card->xdata |= 0x04; /* LED OFF */ 1286 WriteW6692(card, W_XDATA, card->xdata); 1287 } 1288 spin_unlock_irqrestore(&card->lock, flags); 1289 free_irq(card->irq, card); 1290 l1_event(card->dch.l1, CLOSE_CHANNEL); 1291 mISDN_unregister_device(&card->dch.dev); 1292 release_region(card->addr, 256); 1293 mISDN_freebchannel(&card->bc[1].bch); 1294 mISDN_freebchannel(&card->bc[0].bch); 1295 mISDN_freedchannel(&card->dch); 1296 write_lock_irqsave(&card_lock, flags); 1297 list_del(&card->list); 1298 write_unlock_irqrestore(&card_lock, flags); 1299 pci_disable_device(card->pdev); 1300 pci_set_drvdata(card->pdev, NULL); 1301 kfree(card); 1302 } 1303 1304 static int 1305 setup_instance(struct w6692_hw *card) 1306 { 1307 int i, err; 1308 u_long flags; 1309 1310 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1311 write_lock_irqsave(&card_lock, flags); 1312 list_add_tail(&card->list, &Cards); 1313 write_unlock_irqrestore(&card_lock, flags); 1314 card->fmask = (1 << w6692_cnt); 1315 _set_debug(card); 1316 spin_lock_init(&card->lock); 1317 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1318 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1319 card->dch.dev.D.send = w6692_l2l1D; 1320 card->dch.dev.D.ctrl = w6692_dctrl; 1321 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1322 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1323 card->dch.hw = card; 1324 card->dch.dev.nrbchan = 2; 1325 for (i = 0; i < 2; i++) { 1326 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM); 1327 card->bc[i].bch.hw = card; 1328 card->bc[i].bch.nr = i + 1; 1329 card->bc[i].bch.ch.nr = i + 1; 1330 card->bc[i].bch.ch.send = w6692_l2l1B; 1331 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1332 set_channelmap(i + 1, card->dch.dev.channelmap); 1333 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1334 } 1335 err = setup_w6692(card); 1336 if (err) 1337 goto error_setup; 1338 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1339 card->name); 1340 if (err) 1341 goto error_reg; 1342 err = init_card(card); 1343 if (err) 1344 goto error_init; 1345 err = create_l1(&card->dch, w6692_l1callback); 1346 if (!err) { 1347 w6692_cnt++; 1348 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1349 return 0; 1350 } 1351 1352 free_irq(card->irq, card); 1353 error_init: 1354 mISDN_unregister_device(&card->dch.dev); 1355 error_reg: 1356 release_region(card->addr, 256); 1357 error_setup: 1358 mISDN_freebchannel(&card->bc[1].bch); 1359 mISDN_freebchannel(&card->bc[0].bch); 1360 mISDN_freedchannel(&card->dch); 1361 write_lock_irqsave(&card_lock, flags); 1362 list_del(&card->list); 1363 write_unlock_irqrestore(&card_lock, flags); 1364 kfree(card); 1365 return err; 1366 } 1367 1368 static int __devinit 1369 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1370 { 1371 int err = -ENOMEM; 1372 struct w6692_hw *card; 1373 struct w6692map *m = (struct w6692map *)ent->driver_data; 1374 1375 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1376 if (!card) { 1377 pr_info("No kmem for w6692 card\n"); 1378 return err; 1379 } 1380 card->pdev = pdev; 1381 card->subtype = m->subtype; 1382 err = pci_enable_device(pdev); 1383 if (err) { 1384 kfree(card); 1385 return err; 1386 } 1387 1388 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1389 m->name, pci_name(pdev)); 1390 1391 card->addr = pci_resource_start(pdev, 1); 1392 card->irq = pdev->irq; 1393 pci_set_drvdata(pdev, card); 1394 err = setup_instance(card); 1395 if (err) 1396 pci_set_drvdata(pdev, NULL); 1397 return err; 1398 } 1399 1400 static void __devexit 1401 w6692_remove_pci(struct pci_dev *pdev) 1402 { 1403 struct w6692_hw *card = pci_get_drvdata(pdev); 1404 1405 if (card) 1406 release_card(card); 1407 else 1408 if (debug) 1409 pr_notice("%s: drvdata already removed\n", __func__); 1410 } 1411 1412 static struct pci_device_id w6692_ids[] = { 1413 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1414 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1415 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1416 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1417 (ulong)&w6692_map[2]}, 1418 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1419 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1420 { } 1421 }; 1422 MODULE_DEVICE_TABLE(pci, w6692_ids); 1423 1424 static struct pci_driver w6692_driver = { 1425 .name = "w6692", 1426 .probe = w6692_probe, 1427 .remove = __devexit_p(w6692_remove_pci), 1428 .id_table = w6692_ids, 1429 }; 1430 1431 static int __init w6692_init(void) 1432 { 1433 int err; 1434 1435 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1436 1437 err = pci_register_driver(&w6692_driver); 1438 return err; 1439 } 1440 1441 static void __exit w6692_cleanup(void) 1442 { 1443 pci_unregister_driver(&w6692_driver); 1444 } 1445 1446 module_init(w6692_init); 1447 module_exit(w6692_cleanup); 1448