1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/delay.h> 28 #include <linux/mISDNhw.h> 29 #include <linux/slab.h> 30 #include "w6692.h" 31 32 #define W6692_REV "2.0" 33 34 #define DBUSY_TIMER_VALUE 80 35 36 enum { 37 W6692_ASUS, 38 W6692_WINBOND, 39 W6692_USR 40 }; 41 42 /* private data in the PCI devices list */ 43 struct w6692map { 44 u_int subtype; 45 char *name; 46 }; 47 48 static const struct w6692map w6692_map[] = 49 { 50 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 51 {W6692_WINBOND, "Winbond W6692"}, 52 {W6692_USR, "USR W6692"} 53 }; 54 55 #ifndef PCI_VENDOR_ID_USR 56 #define PCI_VENDOR_ID_USR 0x16ec 57 #define PCI_DEVICE_ID_USR_6692 0x3409 58 #endif 59 60 struct w6692_ch { 61 struct bchannel bch; 62 u32 addr; 63 struct timer_list timer; 64 u8 b_mode; 65 }; 66 67 struct w6692_hw { 68 struct list_head list; 69 struct pci_dev *pdev; 70 char name[MISDN_MAX_IDLEN]; 71 u32 irq; 72 u32 irqcnt; 73 u32 addr; 74 u32 fmask; /* feature mask - bit set per card nr */ 75 int subtype; 76 spinlock_t lock; /* hw lock */ 77 u8 imask; 78 u8 pctl; 79 u8 xaddr; 80 u8 xdata; 81 u8 state; 82 struct w6692_ch bc[2]; 83 struct dchannel dch; 84 char log[64]; 85 }; 86 87 static LIST_HEAD(Cards); 88 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 89 90 static int w6692_cnt; 91 static int debug; 92 static u32 led; 93 static u32 pots; 94 95 static void 96 _set_debug(struct w6692_hw *card) 97 { 98 card->dch.debug = debug; 99 card->bc[0].bch.debug = debug; 100 card->bc[1].bch.debug = debug; 101 } 102 103 static int 104 set_debug(const char *val, struct kernel_param *kp) 105 { 106 int ret; 107 struct w6692_hw *card; 108 109 ret = param_set_uint(val, kp); 110 if (!ret) { 111 read_lock(&card_lock); 112 list_for_each_entry(card, &Cards, list) 113 _set_debug(card); 114 read_unlock(&card_lock); 115 } 116 return ret; 117 } 118 119 MODULE_AUTHOR("Karsten Keil"); 120 MODULE_LICENSE("GPL v2"); 121 MODULE_VERSION(W6692_REV); 122 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 123 MODULE_PARM_DESC(debug, "W6692 debug mask"); 124 module_param(led, uint, S_IRUGO | S_IWUSR); 125 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 126 module_param(pots, uint, S_IRUGO | S_IWUSR); 127 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 128 129 static inline u8 130 ReadW6692(struct w6692_hw *card, u8 offset) 131 { 132 return inb(card->addr + offset); 133 } 134 135 static inline void 136 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 137 { 138 outb(value, card->addr + offset); 139 } 140 141 static inline u8 142 ReadW6692B(struct w6692_ch *bc, u8 offset) 143 { 144 return inb(bc->addr + offset); 145 } 146 147 static inline void 148 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 149 { 150 outb(value, bc->addr + offset); 151 } 152 153 static void 154 enable_hwirq(struct w6692_hw *card) 155 { 156 WriteW6692(card, W_IMASK, card->imask); 157 } 158 159 static void 160 disable_hwirq(struct w6692_hw *card) 161 { 162 WriteW6692(card, W_IMASK, 0xff); 163 } 164 165 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 166 167 static void 168 W6692Version(struct w6692_hw *card) 169 { 170 int val; 171 172 val = ReadW6692(card, W_D_RBCH); 173 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 174 W6692Ver[(val >> 6) & 3]); 175 } 176 177 static void 178 w6692_led_handler(struct w6692_hw *card, int on) 179 { 180 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 181 return; 182 if (on) { 183 card->xdata &= 0xfb; /* LED ON */ 184 WriteW6692(card, W_XDATA, card->xdata); 185 } else { 186 card->xdata |= 0x04; /* LED OFF */ 187 WriteW6692(card, W_XDATA, card->xdata); 188 } 189 } 190 191 static void 192 ph_command(struct w6692_hw *card, u8 cmd) 193 { 194 pr_debug("%s: ph_command %x\n", card->name, cmd); 195 WriteW6692(card, W_CIX, cmd); 196 } 197 198 static void 199 W6692_new_ph(struct w6692_hw *card) 200 { 201 if (card->state == W_L1CMD_RST) 202 ph_command(card, W_L1CMD_DRC); 203 schedule_event(&card->dch, FLG_PHCHANGE); 204 } 205 206 static void 207 W6692_ph_bh(struct dchannel *dch) 208 { 209 struct w6692_hw *card = dch->hw; 210 211 switch (card->state) { 212 case W_L1CMD_RST: 213 dch->state = 0; 214 l1_event(dch->l1, HW_RESET_IND); 215 break; 216 case W_L1IND_CD: 217 dch->state = 3; 218 l1_event(dch->l1, HW_DEACT_CNF); 219 break; 220 case W_L1IND_DRD: 221 dch->state = 3; 222 l1_event(dch->l1, HW_DEACT_IND); 223 break; 224 case W_L1IND_CE: 225 dch->state = 4; 226 l1_event(dch->l1, HW_POWERUP_IND); 227 break; 228 case W_L1IND_LD: 229 if (dch->state <= 5) { 230 dch->state = 5; 231 l1_event(dch->l1, ANYSIGNAL); 232 } else { 233 dch->state = 8; 234 l1_event(dch->l1, LOSTFRAMING); 235 } 236 break; 237 case W_L1IND_ARD: 238 dch->state = 6; 239 l1_event(dch->l1, INFO2); 240 break; 241 case W_L1IND_AI8: 242 dch->state = 7; 243 l1_event(dch->l1, INFO4_P8); 244 break; 245 case W_L1IND_AI10: 246 dch->state = 7; 247 l1_event(dch->l1, INFO4_P10); 248 break; 249 default: 250 pr_debug("%s: TE unknown state %02x dch state %02x\n", 251 card->name, card->state, dch->state); 252 break; 253 } 254 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 255 } 256 257 static void 258 W6692_empty_Dfifo(struct w6692_hw *card, int count) 259 { 260 struct dchannel *dch = &card->dch; 261 u8 *ptr; 262 263 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 264 if (!dch->rx_skb) { 265 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 266 if (!dch->rx_skb) { 267 pr_info("%s: D receive out of memory\n", card->name); 268 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 269 return; 270 } 271 } 272 if ((dch->rx_skb->len + count) >= dch->maxlen) { 273 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 274 dch->rx_skb->len + count); 275 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 276 return; 277 } 278 ptr = skb_put(dch->rx_skb, count); 279 insb(card->addr + W_D_RFIFO, ptr, count); 280 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 281 if (debug & DEBUG_HW_DFIFO) { 282 snprintf(card->log, 63, "D-recv %s %d ", 283 card->name, count); 284 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 285 } 286 } 287 288 static void 289 W6692_fill_Dfifo(struct w6692_hw *card) 290 { 291 struct dchannel *dch = &card->dch; 292 int count; 293 u8 *ptr; 294 u8 cmd = W_D_CMDR_XMS; 295 296 pr_debug("%s: fill_Dfifo\n", card->name); 297 if (!dch->tx_skb) 298 return; 299 count = dch->tx_skb->len - dch->tx_idx; 300 if (count <= 0) 301 return; 302 if (count > W_D_FIFO_THRESH) 303 count = W_D_FIFO_THRESH; 304 else 305 cmd |= W_D_CMDR_XME; 306 ptr = dch->tx_skb->data + dch->tx_idx; 307 dch->tx_idx += count; 308 outsb(card->addr + W_D_XFIFO, ptr, count); 309 WriteW6692(card, W_D_CMDR, cmd); 310 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 311 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 312 del_timer(&dch->timer); 313 } 314 init_timer(&dch->timer); 315 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 316 add_timer(&dch->timer); 317 if (debug & DEBUG_HW_DFIFO) { 318 snprintf(card->log, 63, "D-send %s %d ", 319 card->name, count); 320 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 321 } 322 } 323 324 static void 325 d_retransmit(struct w6692_hw *card) 326 { 327 struct dchannel *dch = &card->dch; 328 329 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 330 del_timer(&dch->timer); 331 #ifdef FIXME 332 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 333 dchannel_sched_event(dch, D_CLEARBUSY); 334 #endif 335 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 336 /* Restart frame */ 337 dch->tx_idx = 0; 338 W6692_fill_Dfifo(card); 339 } else if (dch->tx_skb) { /* should not happen */ 340 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 341 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 342 dch->tx_idx = 0; 343 W6692_fill_Dfifo(card); 344 } else { 345 pr_info("%s: XDU no TX_BUSY\n", card->name); 346 if (get_next_dframe(dch)) 347 W6692_fill_Dfifo(card); 348 } 349 } 350 351 static void 352 handle_rxD(struct w6692_hw *card) { 353 u8 stat; 354 int count; 355 356 stat = ReadW6692(card, W_D_RSTA); 357 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 358 if (stat & W_D_RSTA_RDOV) { 359 pr_debug("%s: D-channel RDOV\n", card->name); 360 #ifdef ERROR_STATISTIC 361 card->dch.err_rx++; 362 #endif 363 } 364 if (stat & W_D_RSTA_CRCE) { 365 pr_debug("%s: D-channel CRC error\n", card->name); 366 #ifdef ERROR_STATISTIC 367 card->dch.err_crc++; 368 #endif 369 } 370 if (stat & W_D_RSTA_RMB) { 371 pr_debug("%s: D-channel ABORT\n", card->name); 372 #ifdef ERROR_STATISTIC 373 card->dch.err_rx++; 374 #endif 375 } 376 if (card->dch.rx_skb) 377 dev_kfree_skb(card->dch.rx_skb); 378 card->dch.rx_skb = NULL; 379 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 380 } else { 381 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 382 if (count == 0) 383 count = W_D_FIFO_THRESH; 384 W6692_empty_Dfifo(card, count); 385 recv_Dchannel(&card->dch); 386 } 387 } 388 389 static void 390 handle_txD(struct w6692_hw *card) { 391 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 392 del_timer(&card->dch.timer); 393 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 394 W6692_fill_Dfifo(card); 395 } else { 396 if (card->dch.tx_skb) 397 dev_kfree_skb(card->dch.tx_skb); 398 if (get_next_dframe(&card->dch)) 399 W6692_fill_Dfifo(card); 400 } 401 } 402 403 static void 404 handle_statusD(struct w6692_hw *card) 405 { 406 struct dchannel *dch = &card->dch; 407 u8 exval, v1, cir; 408 409 exval = ReadW6692(card, W_D_EXIR); 410 411 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 412 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 413 /* Transmit underrun/collision */ 414 pr_debug("%s: D-channel underrun/collision\n", card->name); 415 #ifdef ERROR_STATISTIC 416 dch->err_tx++; 417 #endif 418 d_retransmit(card); 419 } 420 if (exval & W_D_EXI_RDOV) { /* RDOV */ 421 pr_debug("%s: D-channel RDOV\n", card->name); 422 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 423 } 424 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 425 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 426 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 427 v1 = ReadW6692(card, W_MOSR); 428 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 429 card->name, v1); 430 } 431 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 432 cir = ReadW6692(card, W_CIR); 433 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 434 if (cir & W_CIR_ICC) { 435 v1 = cir & W_CIR_COD_MASK; 436 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 437 dch->state, v1); 438 card->state = v1; 439 if (card->fmask & led) { 440 switch (v1) { 441 case W_L1IND_AI8: 442 case W_L1IND_AI10: 443 w6692_led_handler(card, 1); 444 break; 445 default: 446 w6692_led_handler(card, 0); 447 break; 448 } 449 } 450 W6692_new_ph(card); 451 } 452 if (cir & W_CIR_SCC) { 453 v1 = ReadW6692(card, W_SQR); 454 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 455 } 456 } 457 if (exval & W_D_EXI_WEXP) 458 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 459 if (exval & W_D_EXI_TEXP) 460 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 461 } 462 463 static void 464 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 465 { 466 struct w6692_hw *card = wch->bch.hw; 467 u8 *ptr; 468 int maxlen; 469 470 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 471 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 472 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 473 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 474 if (wch->bch.rx_skb) 475 skb_trim(wch->bch.rx_skb, 0); 476 return; 477 } 478 if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) { 479 wch->bch.dropcnt += count; 480 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 481 return; 482 } 483 maxlen = bchannel_get_rxbuf(&wch->bch, count); 484 if (maxlen < 0) { 485 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 486 if (wch->bch.rx_skb) 487 skb_trim(wch->bch.rx_skb, 0); 488 pr_warning("%s.B%d: No bufferspace for %d bytes\n", 489 card->name, wch->bch.nr, count); 490 return; 491 } 492 ptr = skb_put(wch->bch.rx_skb, count); 493 insb(wch->addr + W_B_RFIFO, ptr, count); 494 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 495 if (debug & DEBUG_HW_DFIFO) { 496 snprintf(card->log, 63, "B%1d-recv %s %d ", 497 wch->bch.nr, card->name, count); 498 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 499 } 500 } 501 502 static void 503 W6692_fill_Bfifo(struct w6692_ch *wch) 504 { 505 struct w6692_hw *card = wch->bch.hw; 506 int count, fillempty = 0; 507 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 508 509 pr_debug("%s: fill Bfifo\n", card->name); 510 if (!wch->bch.tx_skb) { 511 if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) 512 return; 513 ptr = wch->bch.fill; 514 count = W_B_FIFO_THRESH; 515 fillempty = 1; 516 } else { 517 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 518 if (count <= 0) 519 return; 520 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 521 } 522 if (count > W_B_FIFO_THRESH) 523 count = W_B_FIFO_THRESH; 524 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 525 cmd |= W_B_CMDR_XME; 526 527 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 528 count, wch->bch.tx_idx); 529 wch->bch.tx_idx += count; 530 if (fillempty) { 531 while (count > 0) { 532 outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE); 533 count -= MISDN_BCH_FILL_SIZE; 534 } 535 } else { 536 outsb(wch->addr + W_B_XFIFO, ptr, count); 537 } 538 WriteW6692B(wch, W_B_CMDR, cmd); 539 if ((debug & DEBUG_HW_BFIFO) && !fillempty) { 540 snprintf(card->log, 63, "B%1d-send %s %d ", 541 wch->bch.nr, card->name, count); 542 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 543 } 544 } 545 546 #if 0 547 static int 548 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 549 { 550 struct w6692_hw *card = wch->bch.hw; 551 u16 *vol = (u16 *)skb->data; 552 u8 val; 553 554 if ((!(card->fmask & pots)) || 555 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 556 return -ENODEV; 557 if (skb->len < 2) 558 return -EINVAL; 559 if (*vol > 7) 560 return -EINVAL; 561 val = *vol & 7; 562 val = 7 - val; 563 if (mic) { 564 val <<= 3; 565 card->xaddr &= 0xc7; 566 } else { 567 card->xaddr &= 0xf8; 568 } 569 card->xaddr |= val; 570 WriteW6692(card, W_XADDR, card->xaddr); 571 return 0; 572 } 573 574 static int 575 enable_pots(struct w6692_ch *wch) 576 { 577 struct w6692_hw *card = wch->bch.hw; 578 579 if ((!(card->fmask & pots)) || 580 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 581 return -ENODEV; 582 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 583 WriteW6692B(wch, W_B_MODE, wch->b_mode); 584 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 585 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 586 WriteW6692(card, W_PCTL, card->pctl); 587 return 0; 588 } 589 #endif 590 591 static int 592 disable_pots(struct w6692_ch *wch) 593 { 594 struct w6692_hw *card = wch->bch.hw; 595 596 if (!(card->fmask & pots)) 597 return -ENODEV; 598 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 599 WriteW6692B(wch, W_B_MODE, wch->b_mode); 600 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 601 W_B_CMDR_XRST); 602 return 0; 603 } 604 605 static int 606 w6692_mode(struct w6692_ch *wch, u32 pr) 607 { 608 struct w6692_hw *card; 609 610 card = wch->bch.hw; 611 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 612 wch->bch.nr, wch->bch.state, pr); 613 switch (pr) { 614 case ISDN_P_NONE: 615 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 616 disable_pots(wch); 617 wch->b_mode = 0; 618 mISDN_clear_bchannel(&wch->bch); 619 WriteW6692B(wch, W_B_MODE, wch->b_mode); 620 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 621 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 622 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 623 break; 624 case ISDN_P_B_RAW: 625 wch->b_mode = W_B_MODE_MMS; 626 WriteW6692B(wch, W_B_MODE, wch->b_mode); 627 WriteW6692B(wch, W_B_EXIM, 0); 628 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 629 W_B_CMDR_XRST); 630 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 631 break; 632 case ISDN_P_B_HDLC: 633 wch->b_mode = W_B_MODE_ITF; 634 WriteW6692B(wch, W_B_MODE, wch->b_mode); 635 WriteW6692B(wch, W_B_ADM1, 0xff); 636 WriteW6692B(wch, W_B_ADM2, 0xff); 637 WriteW6692B(wch, W_B_EXIM, 0); 638 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 639 W_B_CMDR_XRST); 640 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 641 break; 642 default: 643 pr_info("%s: protocol %x not known\n", card->name, pr); 644 return -ENOPROTOOPT; 645 } 646 wch->bch.state = pr; 647 return 0; 648 } 649 650 static void 651 send_next(struct w6692_ch *wch) 652 { 653 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) { 654 W6692_fill_Bfifo(wch); 655 } else { 656 if (wch->bch.tx_skb) 657 dev_kfree_skb(wch->bch.tx_skb); 658 if (get_next_bframe(&wch->bch)) { 659 W6692_fill_Bfifo(wch); 660 test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags); 661 } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) { 662 W6692_fill_Bfifo(wch); 663 } 664 } 665 } 666 667 static void 668 W6692B_interrupt(struct w6692_hw *card, int ch) 669 { 670 struct w6692_ch *wch = &card->bc[ch]; 671 int count; 672 u8 stat, star = 0; 673 674 stat = ReadW6692B(wch, W_B_EXIR); 675 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 676 if (stat & W_B_EXI_RME) { 677 star = ReadW6692B(wch, W_B_STAR); 678 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 679 if ((star & W_B_STAR_RDOV) && 680 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 681 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 682 wch->bch.nr, wch->bch.state); 683 #ifdef ERROR_STATISTIC 684 wch->bch.err_rdo++; 685 #endif 686 } 687 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 688 if (star & W_B_STAR_CRCE) { 689 pr_debug("%s: B%d CRC error\n", 690 card->name, wch->bch.nr); 691 #ifdef ERROR_STATISTIC 692 wch->bch.err_crc++; 693 #endif 694 } 695 if (star & W_B_STAR_RMB) { 696 pr_debug("%s: B%d message abort\n", 697 card->name, wch->bch.nr); 698 #ifdef ERROR_STATISTIC 699 wch->bch.err_inv++; 700 #endif 701 } 702 } 703 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 704 W_B_CMDR_RRST | W_B_CMDR_RACT); 705 if (wch->bch.rx_skb) 706 skb_trim(wch->bch.rx_skb, 0); 707 } else { 708 count = ReadW6692B(wch, W_B_RBCL) & 709 (W_B_FIFO_THRESH - 1); 710 if (count == 0) 711 count = W_B_FIFO_THRESH; 712 W6692_empty_Bfifo(wch, count); 713 recv_Bchannel(&wch->bch, 0, false); 714 } 715 } 716 if (stat & W_B_EXI_RMR) { 717 if (!(stat & W_B_EXI_RME)) 718 star = ReadW6692B(wch, W_B_STAR); 719 if (star & W_B_STAR_RDOV) { 720 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 721 wch->bch.nr, wch->bch.state); 722 #ifdef ERROR_STATISTIC 723 wch->bch.err_rdo++; 724 #endif 725 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 726 W_B_CMDR_RRST | W_B_CMDR_RACT); 727 } else { 728 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 729 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 730 recv_Bchannel(&wch->bch, 0, false); 731 } 732 } 733 if (stat & W_B_EXI_RDOV) { 734 /* only if it is not handled yet */ 735 if (!(star & W_B_STAR_RDOV)) { 736 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 737 wch->bch.nr, wch->bch.state); 738 #ifdef ERROR_STATISTIC 739 wch->bch.err_rdo++; 740 #endif 741 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 742 W_B_CMDR_RRST | W_B_CMDR_RACT); 743 } 744 } 745 if (stat & W_B_EXI_XFR) { 746 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 747 star = ReadW6692B(wch, W_B_STAR); 748 pr_debug("%s: B%d star %02x\n", card->name, 749 wch->bch.nr, star); 750 } 751 if (star & W_B_STAR_XDOW) { 752 pr_warning("%s: B%d XDOW proto=%x\n", card->name, 753 wch->bch.nr, wch->bch.state); 754 #ifdef ERROR_STATISTIC 755 wch->bch.err_xdu++; 756 #endif 757 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 758 W_B_CMDR_RACT); 759 /* resend */ 760 if (wch->bch.tx_skb) { 761 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 762 wch->bch.tx_idx = 0; 763 } 764 } 765 send_next(wch); 766 if (star & W_B_STAR_XDOW) 767 return; /* handle XDOW only once */ 768 } 769 if (stat & W_B_EXI_XDUN) { 770 pr_warning("%s: B%d XDUN proto=%x\n", card->name, 771 wch->bch.nr, wch->bch.state); 772 #ifdef ERROR_STATISTIC 773 wch->bch.err_xdu++; 774 #endif 775 /* resend - no XRST needed */ 776 if (wch->bch.tx_skb) { 777 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 778 wch->bch.tx_idx = 0; 779 } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) { 780 test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags); 781 } 782 send_next(wch); 783 } 784 } 785 786 static irqreturn_t 787 w6692_irq(int intno, void *dev_id) 788 { 789 struct w6692_hw *card = dev_id; 790 u8 ista; 791 792 spin_lock(&card->lock); 793 ista = ReadW6692(card, W_ISTA); 794 if ((ista | card->imask) == card->imask) { 795 /* possible a shared IRQ reqest */ 796 spin_unlock(&card->lock); 797 return IRQ_NONE; 798 } 799 card->irqcnt++; 800 pr_debug("%s: ista %02x\n", card->name, ista); 801 ista &= ~card->imask; 802 if (ista & W_INT_B1_EXI) 803 W6692B_interrupt(card, 0); 804 if (ista & W_INT_B2_EXI) 805 W6692B_interrupt(card, 1); 806 if (ista & W_INT_D_RME) 807 handle_rxD(card); 808 if (ista & W_INT_D_RMR) 809 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 810 if (ista & W_INT_D_XFR) 811 handle_txD(card); 812 if (ista & W_INT_D_EXI) 813 handle_statusD(card); 814 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 815 pr_debug("%s: W6692 spurious XINT!\n", card->name); 816 /* End IRQ Handler */ 817 spin_unlock(&card->lock); 818 return IRQ_HANDLED; 819 } 820 821 static void 822 dbusy_timer_handler(struct dchannel *dch) 823 { 824 struct w6692_hw *card = dch->hw; 825 int rbch, star; 826 u_long flags; 827 828 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 829 spin_lock_irqsave(&card->lock, flags); 830 rbch = ReadW6692(card, W_D_RBCH); 831 star = ReadW6692(card, W_D_STAR); 832 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 833 card->name, rbch, star); 834 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 835 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 836 else { 837 /* discard frame; reset transceiver */ 838 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 839 if (dch->tx_idx) 840 dch->tx_idx = 0; 841 else 842 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 843 card->name); 844 /* Transmitter reset */ 845 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 846 } 847 spin_unlock_irqrestore(&card->lock, flags); 848 } 849 } 850 851 static void initW6692(struct w6692_hw *card) 852 { 853 u8 val; 854 855 card->dch.timer.function = (void *)dbusy_timer_handler; 856 card->dch.timer.data = (u_long)&card->dch; 857 init_timer(&card->dch.timer); 858 w6692_mode(&card->bc[0], ISDN_P_NONE); 859 w6692_mode(&card->bc[1], ISDN_P_NONE); 860 WriteW6692(card, W_D_CTL, 0x00); 861 disable_hwirq(card); 862 WriteW6692(card, W_D_SAM, 0xff); 863 WriteW6692(card, W_D_TAM, 0xff); 864 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 865 card->state = W_L1CMD_RST; 866 ph_command(card, W_L1CMD_RST); 867 ph_command(card, W_L1CMD_ECK); 868 /* enable all IRQ but extern */ 869 card->imask = 0x18; 870 WriteW6692(card, W_D_EXIM, 0x00); 871 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 872 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 873 /* Reset D-chan receiver and transmitter */ 874 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 875 /* Reset B-chan receiver and transmitter */ 876 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 877 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 878 /* enable peripheral */ 879 if (card->subtype == W6692_USR) { 880 /* seems that USR implemented some power control features 881 * Pin 79 is connected to the oscilator circuit so we 882 * have to handle it here 883 */ 884 card->pctl = 0x80; 885 card->xdata = 0; 886 WriteW6692(card, W_PCTL, card->pctl); 887 WriteW6692(card, W_XDATA, card->xdata); 888 } else { 889 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 890 W_PCTL_OE1 | W_PCTL_OE0; 891 card->xaddr = 0x00;/* all sw off */ 892 if (card->fmask & pots) 893 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 894 if (card->fmask & led) 895 card->xdata |= 0x04; /* LED OFF */ 896 if ((card->fmask & pots) || (card->fmask & led)) { 897 WriteW6692(card, W_PCTL, card->pctl); 898 WriteW6692(card, W_XADDR, card->xaddr); 899 WriteW6692(card, W_XDATA, card->xdata); 900 val = ReadW6692(card, W_XADDR); 901 if (debug & DEBUG_HW) 902 pr_notice("%s: W_XADDR=%02x\n", 903 card->name, val); 904 } 905 } 906 } 907 908 static void 909 reset_w6692(struct w6692_hw *card) 910 { 911 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 912 mdelay(10); 913 WriteW6692(card, W_D_CTL, 0); 914 } 915 916 static int 917 init_card(struct w6692_hw *card) 918 { 919 int cnt = 3; 920 u_long flags; 921 922 spin_lock_irqsave(&card->lock, flags); 923 disable_hwirq(card); 924 spin_unlock_irqrestore(&card->lock, flags); 925 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 926 pr_info("%s: couldn't get interrupt %d\n", card->name, 927 card->irq); 928 return -EIO; 929 } 930 while (cnt--) { 931 spin_lock_irqsave(&card->lock, flags); 932 initW6692(card); 933 enable_hwirq(card); 934 spin_unlock_irqrestore(&card->lock, flags); 935 /* Timeout 10ms */ 936 msleep_interruptible(10); 937 if (debug & DEBUG_HW) 938 pr_notice("%s: IRQ %d count %d\n", card->name, 939 card->irq, card->irqcnt); 940 if (!card->irqcnt) { 941 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 942 card->name, card->irq, 3 - cnt); 943 reset_w6692(card); 944 } else 945 return 0; 946 } 947 free_irq(card->irq, card); 948 return -EIO; 949 } 950 951 static int 952 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 953 { 954 struct bchannel *bch = container_of(ch, struct bchannel, ch); 955 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 956 struct w6692_hw *card = bch->hw; 957 int ret = -EINVAL; 958 struct mISDNhead *hh = mISDN_HEAD_P(skb); 959 unsigned long flags; 960 961 switch (hh->prim) { 962 case PH_DATA_REQ: 963 spin_lock_irqsave(&card->lock, flags); 964 ret = bchannel_senddata(bch, skb); 965 if (ret > 0) { /* direct TX */ 966 ret = 0; 967 W6692_fill_Bfifo(bc); 968 } 969 spin_unlock_irqrestore(&card->lock, flags); 970 return ret; 971 case PH_ACTIVATE_REQ: 972 spin_lock_irqsave(&card->lock, flags); 973 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 974 ret = w6692_mode(bc, ch->protocol); 975 else 976 ret = 0; 977 spin_unlock_irqrestore(&card->lock, flags); 978 if (!ret) 979 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 980 NULL, GFP_KERNEL); 981 break; 982 case PH_DEACTIVATE_REQ: 983 spin_lock_irqsave(&card->lock, flags); 984 mISDN_clear_bchannel(bch); 985 w6692_mode(bc, ISDN_P_NONE); 986 spin_unlock_irqrestore(&card->lock, flags); 987 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 988 NULL, GFP_KERNEL); 989 ret = 0; 990 break; 991 default: 992 pr_info("%s: %s unknown prim(%x,%x)\n", 993 card->name, __func__, hh->prim, hh->id); 994 ret = -EINVAL; 995 } 996 if (!ret) 997 dev_kfree_skb(skb); 998 return ret; 999 } 1000 1001 static int 1002 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 1003 { 1004 return mISDN_ctrl_bchannel(bch, cq); 1005 } 1006 1007 static int 1008 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1009 { 1010 struct bchannel *bch; 1011 1012 if (rq->adr.channel == 0 || rq->adr.channel > 2) 1013 return -EINVAL; 1014 if (rq->protocol == ISDN_P_NONE) 1015 return -EINVAL; 1016 bch = &card->bc[rq->adr.channel - 1].bch; 1017 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1018 return -EBUSY; /* b-channel can be only open once */ 1019 bch->ch.protocol = rq->protocol; 1020 rq->ch = &bch->ch; 1021 return 0; 1022 } 1023 1024 static int 1025 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1026 { 1027 int ret = 0; 1028 1029 switch (cq->op) { 1030 case MISDN_CTRL_GETOP: 1031 cq->op = MISDN_CTRL_L1_TIMER3; 1032 break; 1033 case MISDN_CTRL_L1_TIMER3: 1034 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1035 break; 1036 default: 1037 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1038 ret = -EINVAL; 1039 break; 1040 } 1041 return ret; 1042 } 1043 1044 static int 1045 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1046 { 1047 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1048 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1049 struct w6692_hw *card = bch->hw; 1050 int ret = -EINVAL; 1051 u_long flags; 1052 1053 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1054 switch (cmd) { 1055 case CLOSE_CHANNEL: 1056 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1057 cancel_work_sync(&bch->workq); 1058 spin_lock_irqsave(&card->lock, flags); 1059 mISDN_clear_bchannel(bch); 1060 w6692_mode(bc, ISDN_P_NONE); 1061 spin_unlock_irqrestore(&card->lock, flags); 1062 ch->protocol = ISDN_P_NONE; 1063 ch->peer = NULL; 1064 module_put(THIS_MODULE); 1065 ret = 0; 1066 break; 1067 case CONTROL_CHANNEL: 1068 ret = channel_bctrl(bch, arg); 1069 break; 1070 default: 1071 pr_info("%s: %s unknown prim(%x)\n", 1072 card->name, __func__, cmd); 1073 } 1074 return ret; 1075 } 1076 1077 static int 1078 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1079 { 1080 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1081 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1082 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1083 int ret = -EINVAL; 1084 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1085 u32 id; 1086 u_long flags; 1087 1088 switch (hh->prim) { 1089 case PH_DATA_REQ: 1090 spin_lock_irqsave(&card->lock, flags); 1091 ret = dchannel_senddata(dch, skb); 1092 if (ret > 0) { /* direct TX */ 1093 id = hh->id; /* skb can be freed */ 1094 W6692_fill_Dfifo(card); 1095 ret = 0; 1096 spin_unlock_irqrestore(&card->lock, flags); 1097 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1098 } else 1099 spin_unlock_irqrestore(&card->lock, flags); 1100 return ret; 1101 case PH_ACTIVATE_REQ: 1102 ret = l1_event(dch->l1, hh->prim); 1103 break; 1104 case PH_DEACTIVATE_REQ: 1105 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1106 ret = l1_event(dch->l1, hh->prim); 1107 break; 1108 } 1109 1110 if (!ret) 1111 dev_kfree_skb(skb); 1112 return ret; 1113 } 1114 1115 static int 1116 w6692_l1callback(struct dchannel *dch, u32 cmd) 1117 { 1118 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1119 u_long flags; 1120 1121 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1122 switch (cmd) { 1123 case INFO3_P8: 1124 spin_lock_irqsave(&card->lock, flags); 1125 ph_command(card, W_L1CMD_AR8); 1126 spin_unlock_irqrestore(&card->lock, flags); 1127 break; 1128 case INFO3_P10: 1129 spin_lock_irqsave(&card->lock, flags); 1130 ph_command(card, W_L1CMD_AR10); 1131 spin_unlock_irqrestore(&card->lock, flags); 1132 break; 1133 case HW_RESET_REQ: 1134 spin_lock_irqsave(&card->lock, flags); 1135 if (card->state != W_L1IND_DRD) 1136 ph_command(card, W_L1CMD_RST); 1137 ph_command(card, W_L1CMD_ECK); 1138 spin_unlock_irqrestore(&card->lock, flags); 1139 break; 1140 case HW_DEACT_REQ: 1141 skb_queue_purge(&dch->squeue); 1142 if (dch->tx_skb) { 1143 dev_kfree_skb(dch->tx_skb); 1144 dch->tx_skb = NULL; 1145 } 1146 dch->tx_idx = 0; 1147 if (dch->rx_skb) { 1148 dev_kfree_skb(dch->rx_skb); 1149 dch->rx_skb = NULL; 1150 } 1151 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1152 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1153 del_timer(&dch->timer); 1154 break; 1155 case HW_POWERUP_REQ: 1156 spin_lock_irqsave(&card->lock, flags); 1157 ph_command(card, W_L1CMD_ECK); 1158 spin_unlock_irqrestore(&card->lock, flags); 1159 break; 1160 case PH_ACTIVATE_IND: 1161 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1162 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1163 GFP_ATOMIC); 1164 break; 1165 case PH_DEACTIVATE_IND: 1166 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1167 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1168 GFP_ATOMIC); 1169 break; 1170 default: 1171 pr_debug("%s: %s unknown command %x\n", card->name, 1172 __func__, cmd); 1173 return -1; 1174 } 1175 return 0; 1176 } 1177 1178 static int 1179 open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller) 1180 { 1181 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1182 card->dch.dev.id, caller); 1183 if (rq->protocol != ISDN_P_TE_S0) 1184 return -EINVAL; 1185 if (rq->adr.channel == 1) 1186 /* E-Channel not supported */ 1187 return -EINVAL; 1188 rq->ch = &card->dch.dev.D; 1189 rq->ch->protocol = rq->protocol; 1190 if (card->dch.state == 7) 1191 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1192 0, NULL, GFP_KERNEL); 1193 return 0; 1194 } 1195 1196 static int 1197 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1198 { 1199 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1200 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1201 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1202 struct channel_req *rq; 1203 int err = 0; 1204 1205 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1206 switch (cmd) { 1207 case OPEN_CHANNEL: 1208 rq = arg; 1209 if (rq->protocol == ISDN_P_TE_S0) 1210 err = open_dchannel(card, rq, __builtin_return_address(0)); 1211 else 1212 err = open_bchannel(card, rq); 1213 if (err) 1214 break; 1215 if (!try_module_get(THIS_MODULE)) 1216 pr_info("%s: cannot get module\n", card->name); 1217 break; 1218 case CLOSE_CHANNEL: 1219 pr_debug("%s: dev(%d) close from %p\n", card->name, 1220 dch->dev.id, __builtin_return_address(0)); 1221 module_put(THIS_MODULE); 1222 break; 1223 case CONTROL_CHANNEL: 1224 err = channel_ctrl(card, arg); 1225 break; 1226 default: 1227 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1228 return -EINVAL; 1229 } 1230 return err; 1231 } 1232 1233 static int 1234 setup_w6692(struct w6692_hw *card) 1235 { 1236 u32 val; 1237 1238 if (!request_region(card->addr, 256, card->name)) { 1239 pr_info("%s: config port %x-%x already in use\n", card->name, 1240 card->addr, card->addr + 255); 1241 return -EIO; 1242 } 1243 W6692Version(card); 1244 card->bc[0].addr = card->addr; 1245 card->bc[1].addr = card->addr + 0x40; 1246 val = ReadW6692(card, W_ISTA); 1247 if (debug & DEBUG_HW) 1248 pr_notice("%s ISTA=%02x\n", card->name, val); 1249 val = ReadW6692(card, W_IMASK); 1250 if (debug & DEBUG_HW) 1251 pr_notice("%s IMASK=%02x\n", card->name, val); 1252 val = ReadW6692(card, W_D_EXIR); 1253 if (debug & DEBUG_HW) 1254 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1255 val = ReadW6692(card, W_D_EXIM); 1256 if (debug & DEBUG_HW) 1257 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1258 val = ReadW6692(card, W_D_RSTA); 1259 if (debug & DEBUG_HW) 1260 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1261 return 0; 1262 } 1263 1264 static void 1265 release_card(struct w6692_hw *card) 1266 { 1267 u_long flags; 1268 1269 spin_lock_irqsave(&card->lock, flags); 1270 disable_hwirq(card); 1271 w6692_mode(&card->bc[0], ISDN_P_NONE); 1272 w6692_mode(&card->bc[1], ISDN_P_NONE); 1273 if ((card->fmask & led) || card->subtype == W6692_USR) { 1274 card->xdata |= 0x04; /* LED OFF */ 1275 WriteW6692(card, W_XDATA, card->xdata); 1276 } 1277 spin_unlock_irqrestore(&card->lock, flags); 1278 free_irq(card->irq, card); 1279 l1_event(card->dch.l1, CLOSE_CHANNEL); 1280 mISDN_unregister_device(&card->dch.dev); 1281 release_region(card->addr, 256); 1282 mISDN_freebchannel(&card->bc[1].bch); 1283 mISDN_freebchannel(&card->bc[0].bch); 1284 mISDN_freedchannel(&card->dch); 1285 write_lock_irqsave(&card_lock, flags); 1286 list_del(&card->list); 1287 write_unlock_irqrestore(&card_lock, flags); 1288 pci_disable_device(card->pdev); 1289 pci_set_drvdata(card->pdev, NULL); 1290 kfree(card); 1291 } 1292 1293 static int 1294 setup_instance(struct w6692_hw *card) 1295 { 1296 int i, err; 1297 u_long flags; 1298 1299 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1300 write_lock_irqsave(&card_lock, flags); 1301 list_add_tail(&card->list, &Cards); 1302 write_unlock_irqrestore(&card_lock, flags); 1303 card->fmask = (1 << w6692_cnt); 1304 _set_debug(card); 1305 spin_lock_init(&card->lock); 1306 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1307 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1308 card->dch.dev.D.send = w6692_l2l1D; 1309 card->dch.dev.D.ctrl = w6692_dctrl; 1310 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1311 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1312 card->dch.hw = card; 1313 card->dch.dev.nrbchan = 2; 1314 for (i = 0; i < 2; i++) { 1315 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM, 1316 W_B_FIFO_THRESH); 1317 card->bc[i].bch.hw = card; 1318 card->bc[i].bch.nr = i + 1; 1319 card->bc[i].bch.ch.nr = i + 1; 1320 card->bc[i].bch.ch.send = w6692_l2l1B; 1321 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1322 set_channelmap(i + 1, card->dch.dev.channelmap); 1323 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1324 } 1325 err = setup_w6692(card); 1326 if (err) 1327 goto error_setup; 1328 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1329 card->name); 1330 if (err) 1331 goto error_reg; 1332 err = init_card(card); 1333 if (err) 1334 goto error_init; 1335 err = create_l1(&card->dch, w6692_l1callback); 1336 if (!err) { 1337 w6692_cnt++; 1338 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1339 return 0; 1340 } 1341 1342 free_irq(card->irq, card); 1343 error_init: 1344 mISDN_unregister_device(&card->dch.dev); 1345 error_reg: 1346 release_region(card->addr, 256); 1347 error_setup: 1348 mISDN_freebchannel(&card->bc[1].bch); 1349 mISDN_freebchannel(&card->bc[0].bch); 1350 mISDN_freedchannel(&card->dch); 1351 write_lock_irqsave(&card_lock, flags); 1352 list_del(&card->list); 1353 write_unlock_irqrestore(&card_lock, flags); 1354 kfree(card); 1355 return err; 1356 } 1357 1358 static int 1359 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1360 { 1361 int err = -ENOMEM; 1362 struct w6692_hw *card; 1363 struct w6692map *m = (struct w6692map *)ent->driver_data; 1364 1365 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1366 if (!card) { 1367 pr_info("No kmem for w6692 card\n"); 1368 return err; 1369 } 1370 card->pdev = pdev; 1371 card->subtype = m->subtype; 1372 err = pci_enable_device(pdev); 1373 if (err) { 1374 kfree(card); 1375 return err; 1376 } 1377 1378 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1379 m->name, pci_name(pdev)); 1380 1381 card->addr = pci_resource_start(pdev, 1); 1382 card->irq = pdev->irq; 1383 pci_set_drvdata(pdev, card); 1384 err = setup_instance(card); 1385 if (err) 1386 pci_set_drvdata(pdev, NULL); 1387 return err; 1388 } 1389 1390 static void 1391 w6692_remove_pci(struct pci_dev *pdev) 1392 { 1393 struct w6692_hw *card = pci_get_drvdata(pdev); 1394 1395 if (card) 1396 release_card(card); 1397 else 1398 if (debug) 1399 pr_notice("%s: drvdata already removed\n", __func__); 1400 } 1401 1402 static struct pci_device_id w6692_ids[] = { 1403 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1404 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1405 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1406 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1407 (ulong)&w6692_map[2]}, 1408 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1409 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1410 { } 1411 }; 1412 MODULE_DEVICE_TABLE(pci, w6692_ids); 1413 1414 static struct pci_driver w6692_driver = { 1415 .name = "w6692", 1416 .probe = w6692_probe, 1417 .remove = w6692_remove_pci, 1418 .id_table = w6692_ids, 1419 }; 1420 1421 static int __init w6692_init(void) 1422 { 1423 int err; 1424 1425 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1426 1427 err = pci_register_driver(&w6692_driver); 1428 return err; 1429 } 1430 1431 static void __exit w6692_cleanup(void) 1432 { 1433 pci_unregister_driver(&w6692_driver); 1434 } 1435 1436 module_init(w6692_init); 1437 module_exit(w6692_cleanup); 1438