1 /* 2 * w6692.c mISDN driver for Winbond w6692 based cards 3 * 4 * Author Karsten Keil <kkeil@suse.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/delay.h> 28 #include <linux/mISDNhw.h> 29 #include <linux/slab.h> 30 #include "w6692.h" 31 32 #define W6692_REV "2.0" 33 34 #define DBUSY_TIMER_VALUE 80 35 36 enum { 37 W6692_ASUS, 38 W6692_WINBOND, 39 W6692_USR 40 }; 41 42 /* private data in the PCI devices list */ 43 struct w6692map { 44 u_int subtype; 45 char *name; 46 }; 47 48 static const struct w6692map w6692_map[] = 49 { 50 {W6692_ASUS, "Dynalink/AsusCom IS64PH"}, 51 {W6692_WINBOND, "Winbond W6692"}, 52 {W6692_USR, "USR W6692"} 53 }; 54 55 #define PCI_DEVICE_ID_USR_6692 0x3409 56 57 struct w6692_ch { 58 struct bchannel bch; 59 u32 addr; 60 struct timer_list timer; 61 u8 b_mode; 62 }; 63 64 struct w6692_hw { 65 struct list_head list; 66 struct pci_dev *pdev; 67 char name[MISDN_MAX_IDLEN]; 68 u32 irq; 69 u32 irqcnt; 70 u32 addr; 71 u32 fmask; /* feature mask - bit set per card nr */ 72 int subtype; 73 spinlock_t lock; /* hw lock */ 74 u8 imask; 75 u8 pctl; 76 u8 xaddr; 77 u8 xdata; 78 u8 state; 79 struct w6692_ch bc[2]; 80 struct dchannel dch; 81 char log[64]; 82 }; 83 84 static LIST_HEAD(Cards); 85 static DEFINE_RWLOCK(card_lock); /* protect Cards */ 86 87 static int w6692_cnt; 88 static int debug; 89 static u32 led; 90 static u32 pots; 91 92 static void 93 _set_debug(struct w6692_hw *card) 94 { 95 card->dch.debug = debug; 96 card->bc[0].bch.debug = debug; 97 card->bc[1].bch.debug = debug; 98 } 99 100 static int 101 set_debug(const char *val, const struct kernel_param *kp) 102 { 103 int ret; 104 struct w6692_hw *card; 105 106 ret = param_set_uint(val, kp); 107 if (!ret) { 108 read_lock(&card_lock); 109 list_for_each_entry(card, &Cards, list) 110 _set_debug(card); 111 read_unlock(&card_lock); 112 } 113 return ret; 114 } 115 116 MODULE_AUTHOR("Karsten Keil"); 117 MODULE_LICENSE("GPL v2"); 118 MODULE_VERSION(W6692_REV); 119 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR); 120 MODULE_PARM_DESC(debug, "W6692 debug mask"); 121 module_param(led, uint, S_IRUGO | S_IWUSR); 122 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)"); 123 module_param(pots, uint, S_IRUGO | S_IWUSR); 124 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)"); 125 126 static inline u8 127 ReadW6692(struct w6692_hw *card, u8 offset) 128 { 129 return inb(card->addr + offset); 130 } 131 132 static inline void 133 WriteW6692(struct w6692_hw *card, u8 offset, u8 value) 134 { 135 outb(value, card->addr + offset); 136 } 137 138 static inline u8 139 ReadW6692B(struct w6692_ch *bc, u8 offset) 140 { 141 return inb(bc->addr + offset); 142 } 143 144 static inline void 145 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value) 146 { 147 outb(value, bc->addr + offset); 148 } 149 150 static void 151 enable_hwirq(struct w6692_hw *card) 152 { 153 WriteW6692(card, W_IMASK, card->imask); 154 } 155 156 static void 157 disable_hwirq(struct w6692_hw *card) 158 { 159 WriteW6692(card, W_IMASK, 0xff); 160 } 161 162 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"}; 163 164 static void 165 W6692Version(struct w6692_hw *card) 166 { 167 int val; 168 169 val = ReadW6692(card, W_D_RBCH); 170 pr_notice("%s: Winbond W6692 version: %s\n", card->name, 171 W6692Ver[(val >> 6) & 3]); 172 } 173 174 static void 175 w6692_led_handler(struct w6692_hw *card, int on) 176 { 177 if ((!(card->fmask & led)) || card->subtype == W6692_USR) 178 return; 179 if (on) { 180 card->xdata &= 0xfb; /* LED ON */ 181 WriteW6692(card, W_XDATA, card->xdata); 182 } else { 183 card->xdata |= 0x04; /* LED OFF */ 184 WriteW6692(card, W_XDATA, card->xdata); 185 } 186 } 187 188 static void 189 ph_command(struct w6692_hw *card, u8 cmd) 190 { 191 pr_debug("%s: ph_command %x\n", card->name, cmd); 192 WriteW6692(card, W_CIX, cmd); 193 } 194 195 static void 196 W6692_new_ph(struct w6692_hw *card) 197 { 198 if (card->state == W_L1CMD_RST) 199 ph_command(card, W_L1CMD_DRC); 200 schedule_event(&card->dch, FLG_PHCHANGE); 201 } 202 203 static void 204 W6692_ph_bh(struct dchannel *dch) 205 { 206 struct w6692_hw *card = dch->hw; 207 208 switch (card->state) { 209 case W_L1CMD_RST: 210 dch->state = 0; 211 l1_event(dch->l1, HW_RESET_IND); 212 break; 213 case W_L1IND_CD: 214 dch->state = 3; 215 l1_event(dch->l1, HW_DEACT_CNF); 216 break; 217 case W_L1IND_DRD: 218 dch->state = 3; 219 l1_event(dch->l1, HW_DEACT_IND); 220 break; 221 case W_L1IND_CE: 222 dch->state = 4; 223 l1_event(dch->l1, HW_POWERUP_IND); 224 break; 225 case W_L1IND_LD: 226 if (dch->state <= 5) { 227 dch->state = 5; 228 l1_event(dch->l1, ANYSIGNAL); 229 } else { 230 dch->state = 8; 231 l1_event(dch->l1, LOSTFRAMING); 232 } 233 break; 234 case W_L1IND_ARD: 235 dch->state = 6; 236 l1_event(dch->l1, INFO2); 237 break; 238 case W_L1IND_AI8: 239 dch->state = 7; 240 l1_event(dch->l1, INFO4_P8); 241 break; 242 case W_L1IND_AI10: 243 dch->state = 7; 244 l1_event(dch->l1, INFO4_P10); 245 break; 246 default: 247 pr_debug("%s: TE unknown state %02x dch state %02x\n", 248 card->name, card->state, dch->state); 249 break; 250 } 251 pr_debug("%s: TE newstate %02x\n", card->name, dch->state); 252 } 253 254 static void 255 W6692_empty_Dfifo(struct w6692_hw *card, int count) 256 { 257 struct dchannel *dch = &card->dch; 258 u8 *ptr; 259 260 pr_debug("%s: empty_Dfifo %d\n", card->name, count); 261 if (!dch->rx_skb) { 262 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC); 263 if (!dch->rx_skb) { 264 pr_info("%s: D receive out of memory\n", card->name); 265 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 266 return; 267 } 268 } 269 if ((dch->rx_skb->len + count) >= dch->maxlen) { 270 pr_debug("%s: empty_Dfifo overrun %d\n", card->name, 271 dch->rx_skb->len + count); 272 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 273 return; 274 } 275 ptr = skb_put(dch->rx_skb, count); 276 insb(card->addr + W_D_RFIFO, ptr, count); 277 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK); 278 if (debug & DEBUG_HW_DFIFO) { 279 snprintf(card->log, 63, "D-recv %s %d ", 280 card->name, count); 281 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 282 } 283 } 284 285 static void 286 W6692_fill_Dfifo(struct w6692_hw *card) 287 { 288 struct dchannel *dch = &card->dch; 289 int count; 290 u8 *ptr; 291 u8 cmd = W_D_CMDR_XMS; 292 293 pr_debug("%s: fill_Dfifo\n", card->name); 294 if (!dch->tx_skb) 295 return; 296 count = dch->tx_skb->len - dch->tx_idx; 297 if (count <= 0) 298 return; 299 if (count > W_D_FIFO_THRESH) 300 count = W_D_FIFO_THRESH; 301 else 302 cmd |= W_D_CMDR_XME; 303 ptr = dch->tx_skb->data + dch->tx_idx; 304 dch->tx_idx += count; 305 outsb(card->addr + W_D_XFIFO, ptr, count); 306 WriteW6692(card, W_D_CMDR, cmd); 307 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) { 308 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name); 309 del_timer(&dch->timer); 310 } 311 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000); 312 add_timer(&dch->timer); 313 if (debug & DEBUG_HW_DFIFO) { 314 snprintf(card->log, 63, "D-send %s %d ", 315 card->name, count); 316 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 317 } 318 } 319 320 static void 321 d_retransmit(struct w6692_hw *card) 322 { 323 struct dchannel *dch = &card->dch; 324 325 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 326 del_timer(&dch->timer); 327 #ifdef FIXME 328 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) 329 dchannel_sched_event(dch, D_CLEARBUSY); 330 #endif 331 if (test_bit(FLG_TX_BUSY, &dch->Flags)) { 332 /* Restart frame */ 333 dch->tx_idx = 0; 334 W6692_fill_Dfifo(card); 335 } else if (dch->tx_skb) { /* should not happen */ 336 pr_info("%s: %s without TX_BUSY\n", card->name, __func__); 337 test_and_set_bit(FLG_TX_BUSY, &dch->Flags); 338 dch->tx_idx = 0; 339 W6692_fill_Dfifo(card); 340 } else { 341 pr_info("%s: XDU no TX_BUSY\n", card->name); 342 if (get_next_dframe(dch)) 343 W6692_fill_Dfifo(card); 344 } 345 } 346 347 static void 348 handle_rxD(struct w6692_hw *card) { 349 u8 stat; 350 int count; 351 352 stat = ReadW6692(card, W_D_RSTA); 353 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) { 354 if (stat & W_D_RSTA_RDOV) { 355 pr_debug("%s: D-channel RDOV\n", card->name); 356 #ifdef ERROR_STATISTIC 357 card->dch.err_rx++; 358 #endif 359 } 360 if (stat & W_D_RSTA_CRCE) { 361 pr_debug("%s: D-channel CRC error\n", card->name); 362 #ifdef ERROR_STATISTIC 363 card->dch.err_crc++; 364 #endif 365 } 366 if (stat & W_D_RSTA_RMB) { 367 pr_debug("%s: D-channel ABORT\n", card->name); 368 #ifdef ERROR_STATISTIC 369 card->dch.err_rx++; 370 #endif 371 } 372 if (card->dch.rx_skb) 373 dev_kfree_skb(card->dch.rx_skb); 374 card->dch.rx_skb = NULL; 375 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST); 376 } else { 377 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1); 378 if (count == 0) 379 count = W_D_FIFO_THRESH; 380 W6692_empty_Dfifo(card, count); 381 recv_Dchannel(&card->dch); 382 } 383 } 384 385 static void 386 handle_txD(struct w6692_hw *card) { 387 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags)) 388 del_timer(&card->dch.timer); 389 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) { 390 W6692_fill_Dfifo(card); 391 } else { 392 if (card->dch.tx_skb) 393 dev_kfree_skb(card->dch.tx_skb); 394 if (get_next_dframe(&card->dch)) 395 W6692_fill_Dfifo(card); 396 } 397 } 398 399 static void 400 handle_statusD(struct w6692_hw *card) 401 { 402 struct dchannel *dch = &card->dch; 403 u8 exval, v1, cir; 404 405 exval = ReadW6692(card, W_D_EXIR); 406 407 pr_debug("%s: D_EXIR %02x\n", card->name, exval); 408 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) { 409 /* Transmit underrun/collision */ 410 pr_debug("%s: D-channel underrun/collision\n", card->name); 411 #ifdef ERROR_STATISTIC 412 dch->err_tx++; 413 #endif 414 d_retransmit(card); 415 } 416 if (exval & W_D_EXI_RDOV) { /* RDOV */ 417 pr_debug("%s: D-channel RDOV\n", card->name); 418 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST); 419 } 420 if (exval & W_D_EXI_TIN2) /* TIN2 - never */ 421 pr_debug("%s: spurious TIN2 interrupt\n", card->name); 422 if (exval & W_D_EXI_MOC) { /* MOC - not supported */ 423 v1 = ReadW6692(card, W_MOSR); 424 pr_debug("%s: spurious MOC interrupt MOSR %02x\n", 425 card->name, v1); 426 } 427 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */ 428 cir = ReadW6692(card, W_CIR); 429 pr_debug("%s: ISC CIR %02X\n", card->name, cir); 430 if (cir & W_CIR_ICC) { 431 v1 = cir & W_CIR_COD_MASK; 432 pr_debug("%s: ph_state_change %x -> %x\n", card->name, 433 dch->state, v1); 434 card->state = v1; 435 if (card->fmask & led) { 436 switch (v1) { 437 case W_L1IND_AI8: 438 case W_L1IND_AI10: 439 w6692_led_handler(card, 1); 440 break; 441 default: 442 w6692_led_handler(card, 0); 443 break; 444 } 445 } 446 W6692_new_ph(card); 447 } 448 if (cir & W_CIR_SCC) { 449 v1 = ReadW6692(card, W_SQR); 450 pr_debug("%s: SCC SQR %02X\n", card->name, v1); 451 } 452 } 453 if (exval & W_D_EXI_WEXP) 454 pr_debug("%s: spurious WEXP interrupt!\n", card->name); 455 if (exval & W_D_EXI_TEXP) 456 pr_debug("%s: spurious TEXP interrupt!\n", card->name); 457 } 458 459 static void 460 W6692_empty_Bfifo(struct w6692_ch *wch, int count) 461 { 462 struct w6692_hw *card = wch->bch.hw; 463 u8 *ptr; 464 int maxlen; 465 466 pr_debug("%s: empty_Bfifo %d\n", card->name, count); 467 if (unlikely(wch->bch.state == ISDN_P_NONE)) { 468 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name); 469 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 470 if (wch->bch.rx_skb) 471 skb_trim(wch->bch.rx_skb, 0); 472 return; 473 } 474 if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) { 475 wch->bch.dropcnt += count; 476 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 477 return; 478 } 479 maxlen = bchannel_get_rxbuf(&wch->bch, count); 480 if (maxlen < 0) { 481 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 482 if (wch->bch.rx_skb) 483 skb_trim(wch->bch.rx_skb, 0); 484 pr_warning("%s.B%d: No bufferspace for %d bytes\n", 485 card->name, wch->bch.nr, count); 486 return; 487 } 488 ptr = skb_put(wch->bch.rx_skb, count); 489 insb(wch->addr + W_B_RFIFO, ptr, count); 490 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT); 491 if (debug & DEBUG_HW_DFIFO) { 492 snprintf(card->log, 63, "B%1d-recv %s %d ", 493 wch->bch.nr, card->name, count); 494 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 495 } 496 } 497 498 static void 499 W6692_fill_Bfifo(struct w6692_ch *wch) 500 { 501 struct w6692_hw *card = wch->bch.hw; 502 int count, fillempty = 0; 503 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS; 504 505 pr_debug("%s: fill Bfifo\n", card->name); 506 if (!wch->bch.tx_skb) { 507 if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) 508 return; 509 ptr = wch->bch.fill; 510 count = W_B_FIFO_THRESH; 511 fillempty = 1; 512 } else { 513 count = wch->bch.tx_skb->len - wch->bch.tx_idx; 514 if (count <= 0) 515 return; 516 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx; 517 } 518 if (count > W_B_FIFO_THRESH) 519 count = W_B_FIFO_THRESH; 520 else if (test_bit(FLG_HDLC, &wch->bch.Flags)) 521 cmd |= W_B_CMDR_XME; 522 523 pr_debug("%s: fill Bfifo%d/%d\n", card->name, 524 count, wch->bch.tx_idx); 525 wch->bch.tx_idx += count; 526 if (fillempty) { 527 while (count > 0) { 528 outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE); 529 count -= MISDN_BCH_FILL_SIZE; 530 } 531 } else { 532 outsb(wch->addr + W_B_XFIFO, ptr, count); 533 } 534 WriteW6692B(wch, W_B_CMDR, cmd); 535 if ((debug & DEBUG_HW_BFIFO) && !fillempty) { 536 snprintf(card->log, 63, "B%1d-send %s %d ", 537 wch->bch.nr, card->name, count); 538 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count); 539 } 540 } 541 542 #if 0 543 static int 544 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb) 545 { 546 struct w6692_hw *card = wch->bch.hw; 547 u16 *vol = (u16 *)skb->data; 548 u8 val; 549 550 if ((!(card->fmask & pots)) || 551 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 552 return -ENODEV; 553 if (skb->len < 2) 554 return -EINVAL; 555 if (*vol > 7) 556 return -EINVAL; 557 val = *vol & 7; 558 val = 7 - val; 559 if (mic) { 560 val <<= 3; 561 card->xaddr &= 0xc7; 562 } else { 563 card->xaddr &= 0xf8; 564 } 565 card->xaddr |= val; 566 WriteW6692(card, W_XADDR, card->xaddr); 567 return 0; 568 } 569 570 static int 571 enable_pots(struct w6692_ch *wch) 572 { 573 struct w6692_hw *card = wch->bch.hw; 574 575 if ((!(card->fmask & pots)) || 576 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 577 return -ENODEV; 578 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0; 579 WriteW6692B(wch, W_B_MODE, wch->b_mode); 580 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 581 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0); 582 WriteW6692(card, W_PCTL, card->pctl); 583 return 0; 584 } 585 #endif 586 587 static int 588 disable_pots(struct w6692_ch *wch) 589 { 590 struct w6692_hw *card = wch->bch.hw; 591 592 if (!(card->fmask & pots)) 593 return -ENODEV; 594 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0); 595 WriteW6692B(wch, W_B_MODE, wch->b_mode); 596 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 597 W_B_CMDR_XRST); 598 return 0; 599 } 600 601 static int 602 w6692_mode(struct w6692_ch *wch, u32 pr) 603 { 604 struct w6692_hw *card; 605 606 card = wch->bch.hw; 607 pr_debug("%s: B%d protocol %x-->%x\n", card->name, 608 wch->bch.nr, wch->bch.state, pr); 609 switch (pr) { 610 case ISDN_P_NONE: 611 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM)) 612 disable_pots(wch); 613 wch->b_mode = 0; 614 mISDN_clear_bchannel(&wch->bch); 615 WriteW6692B(wch, W_B_MODE, wch->b_mode); 616 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 617 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags); 618 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags); 619 break; 620 case ISDN_P_B_RAW: 621 wch->b_mode = W_B_MODE_MMS; 622 WriteW6692B(wch, W_B_MODE, wch->b_mode); 623 WriteW6692B(wch, W_B_EXIM, 0); 624 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 625 W_B_CMDR_XRST); 626 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags); 627 break; 628 case ISDN_P_B_HDLC: 629 wch->b_mode = W_B_MODE_ITF; 630 WriteW6692B(wch, W_B_MODE, wch->b_mode); 631 WriteW6692B(wch, W_B_ADM1, 0xff); 632 WriteW6692B(wch, W_B_ADM2, 0xff); 633 WriteW6692B(wch, W_B_EXIM, 0); 634 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT | 635 W_B_CMDR_XRST); 636 test_and_set_bit(FLG_HDLC, &wch->bch.Flags); 637 break; 638 default: 639 pr_info("%s: protocol %x not known\n", card->name, pr); 640 return -ENOPROTOOPT; 641 } 642 wch->bch.state = pr; 643 return 0; 644 } 645 646 static void 647 send_next(struct w6692_ch *wch) 648 { 649 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) { 650 W6692_fill_Bfifo(wch); 651 } else { 652 if (wch->bch.tx_skb) 653 dev_kfree_skb(wch->bch.tx_skb); 654 if (get_next_bframe(&wch->bch)) { 655 W6692_fill_Bfifo(wch); 656 test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags); 657 } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) { 658 W6692_fill_Bfifo(wch); 659 } 660 } 661 } 662 663 static void 664 W6692B_interrupt(struct w6692_hw *card, int ch) 665 { 666 struct w6692_ch *wch = &card->bc[ch]; 667 int count; 668 u8 stat, star = 0; 669 670 stat = ReadW6692B(wch, W_B_EXIR); 671 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat); 672 if (stat & W_B_EXI_RME) { 673 star = ReadW6692B(wch, W_B_STAR); 674 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) { 675 if ((star & W_B_STAR_RDOV) && 676 test_bit(FLG_ACTIVE, &wch->bch.Flags)) { 677 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 678 wch->bch.nr, wch->bch.state); 679 #ifdef ERROR_STATISTIC 680 wch->bch.err_rdo++; 681 #endif 682 } 683 if (test_bit(FLG_HDLC, &wch->bch.Flags)) { 684 if (star & W_B_STAR_CRCE) { 685 pr_debug("%s: B%d CRC error\n", 686 card->name, wch->bch.nr); 687 #ifdef ERROR_STATISTIC 688 wch->bch.err_crc++; 689 #endif 690 } 691 if (star & W_B_STAR_RMB) { 692 pr_debug("%s: B%d message abort\n", 693 card->name, wch->bch.nr); 694 #ifdef ERROR_STATISTIC 695 wch->bch.err_inv++; 696 #endif 697 } 698 } 699 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 700 W_B_CMDR_RRST | W_B_CMDR_RACT); 701 if (wch->bch.rx_skb) 702 skb_trim(wch->bch.rx_skb, 0); 703 } else { 704 count = ReadW6692B(wch, W_B_RBCL) & 705 (W_B_FIFO_THRESH - 1); 706 if (count == 0) 707 count = W_B_FIFO_THRESH; 708 W6692_empty_Bfifo(wch, count); 709 recv_Bchannel(&wch->bch, 0, false); 710 } 711 } 712 if (stat & W_B_EXI_RMR) { 713 if (!(stat & W_B_EXI_RME)) 714 star = ReadW6692B(wch, W_B_STAR); 715 if (star & W_B_STAR_RDOV) { 716 pr_debug("%s: B%d RDOV proto=%x\n", card->name, 717 wch->bch.nr, wch->bch.state); 718 #ifdef ERROR_STATISTIC 719 wch->bch.err_rdo++; 720 #endif 721 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 722 W_B_CMDR_RRST | W_B_CMDR_RACT); 723 } else { 724 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH); 725 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 726 recv_Bchannel(&wch->bch, 0, false); 727 } 728 } 729 if (stat & W_B_EXI_RDOV) { 730 /* only if it is not handled yet */ 731 if (!(star & W_B_STAR_RDOV)) { 732 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name, 733 wch->bch.nr, wch->bch.state); 734 #ifdef ERROR_STATISTIC 735 wch->bch.err_rdo++; 736 #endif 737 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | 738 W_B_CMDR_RRST | W_B_CMDR_RACT); 739 } 740 } 741 if (stat & W_B_EXI_XFR) { 742 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) { 743 star = ReadW6692B(wch, W_B_STAR); 744 pr_debug("%s: B%d star %02x\n", card->name, 745 wch->bch.nr, star); 746 } 747 if (star & W_B_STAR_XDOW) { 748 pr_warning("%s: B%d XDOW proto=%x\n", card->name, 749 wch->bch.nr, wch->bch.state); 750 #ifdef ERROR_STATISTIC 751 wch->bch.err_xdu++; 752 #endif 753 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | 754 W_B_CMDR_RACT); 755 /* resend */ 756 if (wch->bch.tx_skb) { 757 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 758 wch->bch.tx_idx = 0; 759 } 760 } 761 send_next(wch); 762 if (star & W_B_STAR_XDOW) 763 return; /* handle XDOW only once */ 764 } 765 if (stat & W_B_EXI_XDUN) { 766 pr_warning("%s: B%d XDUN proto=%x\n", card->name, 767 wch->bch.nr, wch->bch.state); 768 #ifdef ERROR_STATISTIC 769 wch->bch.err_xdu++; 770 #endif 771 /* resend - no XRST needed */ 772 if (wch->bch.tx_skb) { 773 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags)) 774 wch->bch.tx_idx = 0; 775 } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) { 776 test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags); 777 } 778 send_next(wch); 779 } 780 } 781 782 static irqreturn_t 783 w6692_irq(int intno, void *dev_id) 784 { 785 struct w6692_hw *card = dev_id; 786 u8 ista; 787 788 spin_lock(&card->lock); 789 ista = ReadW6692(card, W_ISTA); 790 if ((ista | card->imask) == card->imask) { 791 /* possible a shared IRQ reqest */ 792 spin_unlock(&card->lock); 793 return IRQ_NONE; 794 } 795 card->irqcnt++; 796 pr_debug("%s: ista %02x\n", card->name, ista); 797 ista &= ~card->imask; 798 if (ista & W_INT_B1_EXI) 799 W6692B_interrupt(card, 0); 800 if (ista & W_INT_B2_EXI) 801 W6692B_interrupt(card, 1); 802 if (ista & W_INT_D_RME) 803 handle_rxD(card); 804 if (ista & W_INT_D_RMR) 805 W6692_empty_Dfifo(card, W_D_FIFO_THRESH); 806 if (ista & W_INT_D_XFR) 807 handle_txD(card); 808 if (ista & W_INT_D_EXI) 809 handle_statusD(card); 810 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */ 811 pr_debug("%s: W6692 spurious XINT!\n", card->name); 812 /* End IRQ Handler */ 813 spin_unlock(&card->lock); 814 return IRQ_HANDLED; 815 } 816 817 static void 818 dbusy_timer_handler(struct timer_list *t) 819 { 820 struct dchannel *dch = from_timer(dch, t, timer); 821 struct w6692_hw *card = dch->hw; 822 int rbch, star; 823 u_long flags; 824 825 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) { 826 spin_lock_irqsave(&card->lock, flags); 827 rbch = ReadW6692(card, W_D_RBCH); 828 star = ReadW6692(card, W_D_STAR); 829 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n", 830 card->name, rbch, star); 831 if (star & W_D_STAR_XBZ) /* D-Channel Busy */ 832 test_and_set_bit(FLG_L1_BUSY, &dch->Flags); 833 else { 834 /* discard frame; reset transceiver */ 835 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags); 836 if (dch->tx_idx) 837 dch->tx_idx = 0; 838 else 839 pr_info("%s: W6692 D-Channel Busy no tx_idx\n", 840 card->name); 841 /* Transmitter reset */ 842 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST); 843 } 844 spin_unlock_irqrestore(&card->lock, flags); 845 } 846 } 847 848 static void initW6692(struct w6692_hw *card) 849 { 850 u8 val; 851 852 timer_setup(&card->dch.timer, dbusy_timer_handler, 0); 853 w6692_mode(&card->bc[0], ISDN_P_NONE); 854 w6692_mode(&card->bc[1], ISDN_P_NONE); 855 WriteW6692(card, W_D_CTL, 0x00); 856 disable_hwirq(card); 857 WriteW6692(card, W_D_SAM, 0xff); 858 WriteW6692(card, W_D_TAM, 0xff); 859 WriteW6692(card, W_D_MODE, W_D_MODE_RACT); 860 card->state = W_L1CMD_RST; 861 ph_command(card, W_L1CMD_RST); 862 ph_command(card, W_L1CMD_ECK); 863 /* enable all IRQ but extern */ 864 card->imask = 0x18; 865 WriteW6692(card, W_D_EXIM, 0x00); 866 WriteW6692B(&card->bc[0], W_B_EXIM, 0); 867 WriteW6692B(&card->bc[1], W_B_EXIM, 0); 868 /* Reset D-chan receiver and transmitter */ 869 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST); 870 /* Reset B-chan receiver and transmitter */ 871 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 872 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST); 873 /* enable peripheral */ 874 if (card->subtype == W6692_USR) { 875 /* seems that USR implemented some power control features 876 * Pin 79 is connected to the oscilator circuit so we 877 * have to handle it here 878 */ 879 card->pctl = 0x80; 880 card->xdata = 0; 881 WriteW6692(card, W_PCTL, card->pctl); 882 WriteW6692(card, W_XDATA, card->xdata); 883 } else { 884 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 | 885 W_PCTL_OE1 | W_PCTL_OE0; 886 card->xaddr = 0x00;/* all sw off */ 887 if (card->fmask & pots) 888 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */ 889 if (card->fmask & led) 890 card->xdata |= 0x04; /* LED OFF */ 891 if ((card->fmask & pots) || (card->fmask & led)) { 892 WriteW6692(card, W_PCTL, card->pctl); 893 WriteW6692(card, W_XADDR, card->xaddr); 894 WriteW6692(card, W_XDATA, card->xdata); 895 val = ReadW6692(card, W_XADDR); 896 if (debug & DEBUG_HW) 897 pr_notice("%s: W_XADDR=%02x\n", 898 card->name, val); 899 } 900 } 901 } 902 903 static void 904 reset_w6692(struct w6692_hw *card) 905 { 906 WriteW6692(card, W_D_CTL, W_D_CTL_SRST); 907 mdelay(10); 908 WriteW6692(card, W_D_CTL, 0); 909 } 910 911 static int 912 init_card(struct w6692_hw *card) 913 { 914 int cnt = 3; 915 u_long flags; 916 917 spin_lock_irqsave(&card->lock, flags); 918 disable_hwirq(card); 919 spin_unlock_irqrestore(&card->lock, flags); 920 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) { 921 pr_info("%s: couldn't get interrupt %d\n", card->name, 922 card->irq); 923 return -EIO; 924 } 925 while (cnt--) { 926 spin_lock_irqsave(&card->lock, flags); 927 initW6692(card); 928 enable_hwirq(card); 929 spin_unlock_irqrestore(&card->lock, flags); 930 /* Timeout 10ms */ 931 msleep_interruptible(10); 932 if (debug & DEBUG_HW) 933 pr_notice("%s: IRQ %d count %d\n", card->name, 934 card->irq, card->irqcnt); 935 if (!card->irqcnt) { 936 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n", 937 card->name, card->irq, 3 - cnt); 938 reset_w6692(card); 939 } else 940 return 0; 941 } 942 free_irq(card->irq, card); 943 return -EIO; 944 } 945 946 static int 947 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb) 948 { 949 struct bchannel *bch = container_of(ch, struct bchannel, ch); 950 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 951 struct w6692_hw *card = bch->hw; 952 int ret = -EINVAL; 953 struct mISDNhead *hh = mISDN_HEAD_P(skb); 954 unsigned long flags; 955 956 switch (hh->prim) { 957 case PH_DATA_REQ: 958 spin_lock_irqsave(&card->lock, flags); 959 ret = bchannel_senddata(bch, skb); 960 if (ret > 0) { /* direct TX */ 961 ret = 0; 962 W6692_fill_Bfifo(bc); 963 } 964 spin_unlock_irqrestore(&card->lock, flags); 965 return ret; 966 case PH_ACTIVATE_REQ: 967 spin_lock_irqsave(&card->lock, flags); 968 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 969 ret = w6692_mode(bc, ch->protocol); 970 else 971 ret = 0; 972 spin_unlock_irqrestore(&card->lock, flags); 973 if (!ret) 974 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 975 NULL, GFP_KERNEL); 976 break; 977 case PH_DEACTIVATE_REQ: 978 spin_lock_irqsave(&card->lock, flags); 979 mISDN_clear_bchannel(bch); 980 w6692_mode(bc, ISDN_P_NONE); 981 spin_unlock_irqrestore(&card->lock, flags); 982 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 983 NULL, GFP_KERNEL); 984 ret = 0; 985 break; 986 default: 987 pr_info("%s: %s unknown prim(%x,%x)\n", 988 card->name, __func__, hh->prim, hh->id); 989 ret = -EINVAL; 990 } 991 if (!ret) 992 dev_kfree_skb(skb); 993 return ret; 994 } 995 996 static int 997 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 998 { 999 return mISDN_ctrl_bchannel(bch, cq); 1000 } 1001 1002 static int 1003 open_bchannel(struct w6692_hw *card, struct channel_req *rq) 1004 { 1005 struct bchannel *bch; 1006 1007 if (rq->adr.channel == 0 || rq->adr.channel > 2) 1008 return -EINVAL; 1009 if (rq->protocol == ISDN_P_NONE) 1010 return -EINVAL; 1011 bch = &card->bc[rq->adr.channel - 1].bch; 1012 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1013 return -EBUSY; /* b-channel can be only open once */ 1014 bch->ch.protocol = rq->protocol; 1015 rq->ch = &bch->ch; 1016 return 0; 1017 } 1018 1019 static int 1020 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq) 1021 { 1022 int ret = 0; 1023 1024 switch (cq->op) { 1025 case MISDN_CTRL_GETOP: 1026 cq->op = MISDN_CTRL_L1_TIMER3; 1027 break; 1028 case MISDN_CTRL_L1_TIMER3: 1029 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); 1030 break; 1031 default: 1032 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op); 1033 ret = -EINVAL; 1034 break; 1035 } 1036 return ret; 1037 } 1038 1039 static int 1040 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1041 { 1042 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1043 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch); 1044 struct w6692_hw *card = bch->hw; 1045 int ret = -EINVAL; 1046 u_long flags; 1047 1048 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg); 1049 switch (cmd) { 1050 case CLOSE_CHANNEL: 1051 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1052 cancel_work_sync(&bch->workq); 1053 spin_lock_irqsave(&card->lock, flags); 1054 mISDN_clear_bchannel(bch); 1055 w6692_mode(bc, ISDN_P_NONE); 1056 spin_unlock_irqrestore(&card->lock, flags); 1057 ch->protocol = ISDN_P_NONE; 1058 ch->peer = NULL; 1059 module_put(THIS_MODULE); 1060 ret = 0; 1061 break; 1062 case CONTROL_CHANNEL: 1063 ret = channel_bctrl(bch, arg); 1064 break; 1065 default: 1066 pr_info("%s: %s unknown prim(%x)\n", 1067 card->name, __func__, cmd); 1068 } 1069 return ret; 1070 } 1071 1072 static int 1073 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb) 1074 { 1075 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1076 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1077 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1078 int ret = -EINVAL; 1079 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1080 u32 id; 1081 u_long flags; 1082 1083 switch (hh->prim) { 1084 case PH_DATA_REQ: 1085 spin_lock_irqsave(&card->lock, flags); 1086 ret = dchannel_senddata(dch, skb); 1087 if (ret > 0) { /* direct TX */ 1088 id = hh->id; /* skb can be freed */ 1089 W6692_fill_Dfifo(card); 1090 ret = 0; 1091 spin_unlock_irqrestore(&card->lock, flags); 1092 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1093 } else 1094 spin_unlock_irqrestore(&card->lock, flags); 1095 return ret; 1096 case PH_ACTIVATE_REQ: 1097 ret = l1_event(dch->l1, hh->prim); 1098 break; 1099 case PH_DEACTIVATE_REQ: 1100 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); 1101 ret = l1_event(dch->l1, hh->prim); 1102 break; 1103 } 1104 1105 if (!ret) 1106 dev_kfree_skb(skb); 1107 return ret; 1108 } 1109 1110 static int 1111 w6692_l1callback(struct dchannel *dch, u32 cmd) 1112 { 1113 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1114 u_long flags; 1115 1116 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state); 1117 switch (cmd) { 1118 case INFO3_P8: 1119 spin_lock_irqsave(&card->lock, flags); 1120 ph_command(card, W_L1CMD_AR8); 1121 spin_unlock_irqrestore(&card->lock, flags); 1122 break; 1123 case INFO3_P10: 1124 spin_lock_irqsave(&card->lock, flags); 1125 ph_command(card, W_L1CMD_AR10); 1126 spin_unlock_irqrestore(&card->lock, flags); 1127 break; 1128 case HW_RESET_REQ: 1129 spin_lock_irqsave(&card->lock, flags); 1130 if (card->state != W_L1IND_DRD) 1131 ph_command(card, W_L1CMD_RST); 1132 ph_command(card, W_L1CMD_ECK); 1133 spin_unlock_irqrestore(&card->lock, flags); 1134 break; 1135 case HW_DEACT_REQ: 1136 skb_queue_purge(&dch->squeue); 1137 if (dch->tx_skb) { 1138 dev_kfree_skb(dch->tx_skb); 1139 dch->tx_skb = NULL; 1140 } 1141 dch->tx_idx = 0; 1142 if (dch->rx_skb) { 1143 dev_kfree_skb(dch->rx_skb); 1144 dch->rx_skb = NULL; 1145 } 1146 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); 1147 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) 1148 del_timer(&dch->timer); 1149 break; 1150 case HW_POWERUP_REQ: 1151 spin_lock_irqsave(&card->lock, flags); 1152 ph_command(card, W_L1CMD_ECK); 1153 spin_unlock_irqrestore(&card->lock, flags); 1154 break; 1155 case PH_ACTIVATE_IND: 1156 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 1157 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1158 GFP_ATOMIC); 1159 break; 1160 case PH_DEACTIVATE_IND: 1161 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); 1162 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, 1163 GFP_ATOMIC); 1164 break; 1165 default: 1166 pr_debug("%s: %s unknown command %x\n", card->name, 1167 __func__, cmd); 1168 return -1; 1169 } 1170 return 0; 1171 } 1172 1173 static int 1174 open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller) 1175 { 1176 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__, 1177 card->dch.dev.id, caller); 1178 if (rq->protocol != ISDN_P_TE_S0) 1179 return -EINVAL; 1180 if (rq->adr.channel == 1) 1181 /* E-Channel not supported */ 1182 return -EINVAL; 1183 rq->ch = &card->dch.dev.D; 1184 rq->ch->protocol = rq->protocol; 1185 if (card->dch.state == 7) 1186 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 1187 0, NULL, GFP_KERNEL); 1188 return 0; 1189 } 1190 1191 static int 1192 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1193 { 1194 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D); 1195 struct dchannel *dch = container_of(dev, struct dchannel, dev); 1196 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch); 1197 struct channel_req *rq; 1198 int err = 0; 1199 1200 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg); 1201 switch (cmd) { 1202 case OPEN_CHANNEL: 1203 rq = arg; 1204 if (rq->protocol == ISDN_P_TE_S0) 1205 err = open_dchannel(card, rq, __builtin_return_address(0)); 1206 else 1207 err = open_bchannel(card, rq); 1208 if (err) 1209 break; 1210 if (!try_module_get(THIS_MODULE)) 1211 pr_info("%s: cannot get module\n", card->name); 1212 break; 1213 case CLOSE_CHANNEL: 1214 pr_debug("%s: dev(%d) close from %p\n", card->name, 1215 dch->dev.id, __builtin_return_address(0)); 1216 module_put(THIS_MODULE); 1217 break; 1218 case CONTROL_CHANNEL: 1219 err = channel_ctrl(card, arg); 1220 break; 1221 default: 1222 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd); 1223 return -EINVAL; 1224 } 1225 return err; 1226 } 1227 1228 static int 1229 setup_w6692(struct w6692_hw *card) 1230 { 1231 u32 val; 1232 1233 if (!request_region(card->addr, 256, card->name)) { 1234 pr_info("%s: config port %x-%x already in use\n", card->name, 1235 card->addr, card->addr + 255); 1236 return -EIO; 1237 } 1238 W6692Version(card); 1239 card->bc[0].addr = card->addr; 1240 card->bc[1].addr = card->addr + 0x40; 1241 val = ReadW6692(card, W_ISTA); 1242 if (debug & DEBUG_HW) 1243 pr_notice("%s ISTA=%02x\n", card->name, val); 1244 val = ReadW6692(card, W_IMASK); 1245 if (debug & DEBUG_HW) 1246 pr_notice("%s IMASK=%02x\n", card->name, val); 1247 val = ReadW6692(card, W_D_EXIR); 1248 if (debug & DEBUG_HW) 1249 pr_notice("%s D_EXIR=%02x\n", card->name, val); 1250 val = ReadW6692(card, W_D_EXIM); 1251 if (debug & DEBUG_HW) 1252 pr_notice("%s D_EXIM=%02x\n", card->name, val); 1253 val = ReadW6692(card, W_D_RSTA); 1254 if (debug & DEBUG_HW) 1255 pr_notice("%s D_RSTA=%02x\n", card->name, val); 1256 return 0; 1257 } 1258 1259 static void 1260 release_card(struct w6692_hw *card) 1261 { 1262 u_long flags; 1263 1264 spin_lock_irqsave(&card->lock, flags); 1265 disable_hwirq(card); 1266 w6692_mode(&card->bc[0], ISDN_P_NONE); 1267 w6692_mode(&card->bc[1], ISDN_P_NONE); 1268 if ((card->fmask & led) || card->subtype == W6692_USR) { 1269 card->xdata |= 0x04; /* LED OFF */ 1270 WriteW6692(card, W_XDATA, card->xdata); 1271 } 1272 spin_unlock_irqrestore(&card->lock, flags); 1273 free_irq(card->irq, card); 1274 l1_event(card->dch.l1, CLOSE_CHANNEL); 1275 mISDN_unregister_device(&card->dch.dev); 1276 release_region(card->addr, 256); 1277 mISDN_freebchannel(&card->bc[1].bch); 1278 mISDN_freebchannel(&card->bc[0].bch); 1279 mISDN_freedchannel(&card->dch); 1280 write_lock_irqsave(&card_lock, flags); 1281 list_del(&card->list); 1282 write_unlock_irqrestore(&card_lock, flags); 1283 pci_disable_device(card->pdev); 1284 pci_set_drvdata(card->pdev, NULL); 1285 kfree(card); 1286 } 1287 1288 static int 1289 setup_instance(struct w6692_hw *card) 1290 { 1291 int i, err; 1292 u_long flags; 1293 1294 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1); 1295 write_lock_irqsave(&card_lock, flags); 1296 list_add_tail(&card->list, &Cards); 1297 write_unlock_irqrestore(&card_lock, flags); 1298 card->fmask = (1 << w6692_cnt); 1299 _set_debug(card); 1300 spin_lock_init(&card->lock); 1301 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh); 1302 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0); 1303 card->dch.dev.D.send = w6692_l2l1D; 1304 card->dch.dev.D.ctrl = w6692_dctrl; 1305 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1306 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 1307 card->dch.hw = card; 1308 card->dch.dev.nrbchan = 2; 1309 for (i = 0; i < 2; i++) { 1310 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM, 1311 W_B_FIFO_THRESH); 1312 card->bc[i].bch.hw = card; 1313 card->bc[i].bch.nr = i + 1; 1314 card->bc[i].bch.ch.nr = i + 1; 1315 card->bc[i].bch.ch.send = w6692_l2l1B; 1316 card->bc[i].bch.ch.ctrl = w6692_bctrl; 1317 set_channelmap(i + 1, card->dch.dev.channelmap); 1318 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels); 1319 } 1320 err = setup_w6692(card); 1321 if (err) 1322 goto error_setup; 1323 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev, 1324 card->name); 1325 if (err) 1326 goto error_reg; 1327 err = init_card(card); 1328 if (err) 1329 goto error_init; 1330 err = create_l1(&card->dch, w6692_l1callback); 1331 if (!err) { 1332 w6692_cnt++; 1333 pr_notice("W6692 %d cards installed\n", w6692_cnt); 1334 return 0; 1335 } 1336 1337 free_irq(card->irq, card); 1338 error_init: 1339 mISDN_unregister_device(&card->dch.dev); 1340 error_reg: 1341 release_region(card->addr, 256); 1342 error_setup: 1343 mISDN_freebchannel(&card->bc[1].bch); 1344 mISDN_freebchannel(&card->bc[0].bch); 1345 mISDN_freedchannel(&card->dch); 1346 write_lock_irqsave(&card_lock, flags); 1347 list_del(&card->list); 1348 write_unlock_irqrestore(&card_lock, flags); 1349 kfree(card); 1350 return err; 1351 } 1352 1353 static int 1354 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1355 { 1356 int err = -ENOMEM; 1357 struct w6692_hw *card; 1358 struct w6692map *m = (struct w6692map *)ent->driver_data; 1359 1360 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL); 1361 if (!card) { 1362 pr_info("No kmem for w6692 card\n"); 1363 return err; 1364 } 1365 card->pdev = pdev; 1366 card->subtype = m->subtype; 1367 err = pci_enable_device(pdev); 1368 if (err) { 1369 kfree(card); 1370 return err; 1371 } 1372 1373 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n", 1374 m->name, pci_name(pdev)); 1375 1376 card->addr = pci_resource_start(pdev, 1); 1377 card->irq = pdev->irq; 1378 pci_set_drvdata(pdev, card); 1379 err = setup_instance(card); 1380 if (err) 1381 pci_set_drvdata(pdev, NULL); 1382 return err; 1383 } 1384 1385 static void 1386 w6692_remove_pci(struct pci_dev *pdev) 1387 { 1388 struct w6692_hw *card = pci_get_drvdata(pdev); 1389 1390 if (card) 1391 release_card(card); 1392 else 1393 if (debug) 1394 pr_notice("%s: drvdata already removed\n", __func__); 1395 } 1396 1397 static const struct pci_device_id w6692_ids[] = { 1398 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, 1399 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]}, 1400 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1401 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0, 1402 (ulong)&w6692_map[2]}, 1403 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, 1404 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]}, 1405 { } 1406 }; 1407 MODULE_DEVICE_TABLE(pci, w6692_ids); 1408 1409 static struct pci_driver w6692_driver = { 1410 .name = "w6692", 1411 .probe = w6692_probe, 1412 .remove = w6692_remove_pci, 1413 .id_table = w6692_ids, 1414 }; 1415 1416 static int __init w6692_init(void) 1417 { 1418 int err; 1419 1420 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV); 1421 1422 err = pci_register_driver(&w6692_driver); 1423 return err; 1424 } 1425 1426 static void __exit w6692_cleanup(void) 1427 { 1428 pci_unregister_driver(&w6692_driver); 1429 } 1430 1431 module_init(w6692_init); 1432 module_exit(w6692_cleanup); 1433