1 /* 2 * Cypress APA trackpad with I2C interface 3 * 4 * Author: Dudley Du <dudl@cypress.com> 5 * 6 * Copyright (C) 2014 Cypress Semiconductor, Inc. 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file COPYING in the main directory of this archive for 10 * more details. 11 */ 12 13 #ifndef _CYAPA_H 14 #define _CYAPA_H 15 16 #include <linux/firmware.h> 17 18 /* APA trackpad firmware generation number. */ 19 #define CYAPA_GEN_UNKNOWN 0x00 /* unknown protocol. */ 20 #define CYAPA_GEN3 0x03 /* support MT-protocol B with tracking ID. */ 21 #define CYAPA_GEN5 0x05 /* support TrueTouch GEN5 trackpad device. */ 22 23 #define CYAPA_NAME "Cypress APA Trackpad (cyapa)" 24 25 /* 26 * Macros for SMBus communication 27 */ 28 #define SMBUS_READ 0x01 29 #define SMBUS_WRITE 0x00 30 #define SMBUS_ENCODE_IDX(cmd, idx) ((cmd) | (((idx) & 0x03) << 1)) 31 #define SMBUS_ENCODE_RW(cmd, rw) ((cmd) | ((rw) & 0x01)) 32 #define SMBUS_BYTE_BLOCK_CMD_MASK 0x80 33 #define SMBUS_GROUP_BLOCK_CMD_MASK 0x40 34 35 /* Commands for read/write registers of Cypress trackpad */ 36 #define CYAPA_CMD_SOFT_RESET 0x00 37 #define CYAPA_CMD_POWER_MODE 0x01 38 #define CYAPA_CMD_DEV_STATUS 0x02 39 #define CYAPA_CMD_GROUP_DATA 0x03 40 #define CYAPA_CMD_GROUP_CMD 0x04 41 #define CYAPA_CMD_GROUP_QUERY 0x05 42 #define CYAPA_CMD_BL_STATUS 0x06 43 #define CYAPA_CMD_BL_HEAD 0x07 44 #define CYAPA_CMD_BL_CMD 0x08 45 #define CYAPA_CMD_BL_DATA 0x09 46 #define CYAPA_CMD_BL_ALL 0x0a 47 #define CYAPA_CMD_BLK_PRODUCT_ID 0x0b 48 #define CYAPA_CMD_BLK_HEAD 0x0c 49 #define CYAPA_CMD_MAX_BASELINE 0x0d 50 #define CYAPA_CMD_MIN_BASELINE 0x0e 51 52 #define BL_HEAD_OFFSET 0x00 53 #define BL_DATA_OFFSET 0x10 54 55 #define BL_STATUS_SIZE 3 /* Length of gen3 bootloader status registers */ 56 #define CYAPA_REG_MAP_SIZE 256 57 58 /* 59 * Gen3 Operational Device Status Register 60 * 61 * bit 7: Valid interrupt source 62 * bit 6 - 4: Reserved 63 * bit 3 - 2: Power status 64 * bit 1 - 0: Device status 65 */ 66 #define REG_OP_STATUS 0x00 67 #define OP_STATUS_SRC 0x80 68 #define OP_STATUS_POWER 0x0c 69 #define OP_STATUS_DEV 0x03 70 #define OP_STATUS_MASK (OP_STATUS_SRC | OP_STATUS_POWER | OP_STATUS_DEV) 71 72 /* 73 * Operational Finger Count/Button Flags Register 74 * 75 * bit 7 - 4: Number of touched finger 76 * bit 3: Valid data 77 * bit 2: Middle Physical Button 78 * bit 1: Right Physical Button 79 * bit 0: Left physical Button 80 */ 81 #define REG_OP_DATA1 0x01 82 #define OP_DATA_VALID 0x08 83 #define OP_DATA_MIDDLE_BTN 0x04 84 #define OP_DATA_RIGHT_BTN 0x02 85 #define OP_DATA_LEFT_BTN 0x01 86 #define OP_DATA_BTN_MASK (OP_DATA_MIDDLE_BTN | OP_DATA_RIGHT_BTN | \ 87 OP_DATA_LEFT_BTN) 88 89 /* 90 * Write-only command file register used to issue commands and 91 * parameters to the bootloader. 92 * The default value read from it is always 0x00. 93 */ 94 #define REG_BL_FILE 0x00 95 #define BL_FILE 0x00 96 97 /* 98 * Bootloader Status Register 99 * 100 * bit 7: Busy 101 * bit 6 - 5: Reserved 102 * bit 4: Bootloader running 103 * bit 3 - 2: Reserved 104 * bit 1: Watchdog Reset 105 * bit 0: Checksum valid 106 */ 107 #define REG_BL_STATUS 0x01 108 #define BL_STATUS_REV_6_5 0x60 109 #define BL_STATUS_BUSY 0x80 110 #define BL_STATUS_RUNNING 0x10 111 #define BL_STATUS_REV_3_2 0x0c 112 #define BL_STATUS_WATCHDOG 0x02 113 #define BL_STATUS_CSUM_VALID 0x01 114 #define BL_STATUS_REV_MASK (BL_STATUS_WATCHDOG | BL_STATUS_REV_3_2 | \ 115 BL_STATUS_REV_6_5) 116 117 /* 118 * Bootloader Error Register 119 * 120 * bit 7: Invalid 121 * bit 6: Invalid security key 122 * bit 5: Bootloading 123 * bit 4: Command checksum 124 * bit 3: Flash protection error 125 * bit 2: Flash checksum error 126 * bit 1 - 0: Reserved 127 */ 128 #define REG_BL_ERROR 0x02 129 #define BL_ERROR_INVALID 0x80 130 #define BL_ERROR_INVALID_KEY 0x40 131 #define BL_ERROR_BOOTLOADING 0x20 132 #define BL_ERROR_CMD_CSUM 0x10 133 #define BL_ERROR_FLASH_PROT 0x08 134 #define BL_ERROR_FLASH_CSUM 0x04 135 #define BL_ERROR_RESERVED 0x03 136 #define BL_ERROR_NO_ERR_IDLE 0x00 137 #define BL_ERROR_NO_ERR_ACTIVE (BL_ERROR_BOOTLOADING) 138 139 #define CAPABILITY_BTN_SHIFT 3 140 #define CAPABILITY_LEFT_BTN_MASK (0x01 << 3) 141 #define CAPABILITY_RIGHT_BTN_MASK (0x01 << 4) 142 #define CAPABILITY_MIDDLE_BTN_MASK (0x01 << 5) 143 #define CAPABILITY_BTN_MASK (CAPABILITY_LEFT_BTN_MASK | \ 144 CAPABILITY_RIGHT_BTN_MASK | \ 145 CAPABILITY_MIDDLE_BTN_MASK) 146 147 #define PWR_MODE_MASK 0xfc 148 #define PWR_MODE_FULL_ACTIVE (0x3f << 2) 149 #define PWR_MODE_IDLE (0x03 << 2) /* Default rt suspend scanrate: 30ms */ 150 #define PWR_MODE_SLEEP (0x05 << 2) /* Default suspend scanrate: 50ms */ 151 #define PWR_MODE_BTN_ONLY (0x01 << 2) 152 #define PWR_MODE_OFF (0x00 << 2) 153 154 #define PWR_STATUS_MASK 0x0c 155 #define PWR_STATUS_ACTIVE (0x03 << 2) 156 #define PWR_STATUS_IDLE (0x02 << 2) 157 #define PWR_STATUS_BTN_ONLY (0x01 << 2) 158 #define PWR_STATUS_OFF (0x00 << 2) 159 160 #define AUTOSUSPEND_DELAY 2000 /* unit : ms */ 161 162 #define UNINIT_SLEEP_TIME 0xFFFF 163 #define UNINIT_PWR_MODE 0xFF 164 165 #define BTN_ONLY_MODE_NAME "buttononly" 166 #define OFF_MODE_NAME "off" 167 168 /* The touch.id is used as the MT slot id, thus max MT slot is 15 */ 169 #define CYAPA_MAX_MT_SLOTS 15 170 171 struct cyapa; 172 173 typedef bool (*cb_sort)(struct cyapa *, u8 *, int); 174 175 struct cyapa_dev_ops { 176 int (*check_fw)(struct cyapa *, const struct firmware *); 177 int (*bl_enter)(struct cyapa *); 178 int (*bl_activate)(struct cyapa *); 179 int (*bl_initiate)(struct cyapa *, const struct firmware *); 180 int (*update_fw)(struct cyapa *, const struct firmware *); 181 int (*bl_deactivate)(struct cyapa *); 182 183 ssize_t (*show_baseline)(struct device *, 184 struct device_attribute *, char *); 185 ssize_t (*calibrate_store)(struct device *, 186 struct device_attribute *, const char *, size_t); 187 188 int (*initialize)(struct cyapa *cyapa); 189 190 int (*state_parse)(struct cyapa *cyapa, u8 *reg_status, int len); 191 int (*operational_check)(struct cyapa *cyapa); 192 193 int (*irq_handler)(struct cyapa *); 194 bool (*irq_cmd_handler)(struct cyapa *); 195 int (*sort_empty_output_data)(struct cyapa *, 196 u8 *, int *, cb_sort); 197 198 int (*set_power_mode)(struct cyapa *, u8, u16); 199 }; 200 201 struct cyapa_gen5_cmd_states { 202 struct mutex cmd_lock; 203 struct completion cmd_ready; 204 atomic_t cmd_issued; 205 u8 in_progress_cmd; 206 bool is_irq_mode; 207 208 cb_sort resp_sort_func; 209 u8 *resp_data; 210 int *resp_len; 211 212 u8 irq_cmd_buf[CYAPA_REG_MAP_SIZE]; 213 u8 empty_buf[CYAPA_REG_MAP_SIZE]; 214 }; 215 216 union cyapa_cmd_states { 217 struct cyapa_gen5_cmd_states gen5; 218 }; 219 220 enum cyapa_state { 221 CYAPA_STATE_NO_DEVICE, 222 CYAPA_STATE_BL_BUSY, 223 CYAPA_STATE_BL_IDLE, 224 CYAPA_STATE_BL_ACTIVE, 225 CYAPA_STATE_OP, 226 CYAPA_STATE_GEN5_BL, 227 CYAPA_STATE_GEN5_APP, 228 }; 229 230 /* The main device structure */ 231 struct cyapa { 232 enum cyapa_state state; 233 u8 status[BL_STATUS_SIZE]; 234 bool operational; /* true: ready for data reporting; false: not. */ 235 236 struct i2c_client *client; 237 struct input_dev *input; 238 char phys[32]; /* Device physical location */ 239 bool irq_wake; /* Irq wake is enabled */ 240 bool smbus; 241 242 /* power mode settings */ 243 u8 suspend_power_mode; 244 u16 suspend_sleep_time; 245 u8 runtime_suspend_power_mode; 246 u16 runtime_suspend_sleep_time; 247 u8 dev_pwr_mode; 248 u16 dev_sleep_time; 249 250 /* Read from query data region. */ 251 char product_id[16]; 252 u8 fw_maj_ver; /* Firmware major version. */ 253 u8 fw_min_ver; /* Firmware minor version. */ 254 u8 btn_capability; 255 u8 gen; 256 int max_abs_x; 257 int max_abs_y; 258 int physical_size_x; 259 int physical_size_y; 260 261 /* Used in ttsp and truetouch based trackpad devices. */ 262 u8 x_origin; /* X Axis Origin: 0 = left side; 1 = rigth side. */ 263 u8 y_origin; /* Y Axis Origin: 0 = top; 1 = bottom. */ 264 int electrodes_x; /* Number of electrodes on the X Axis*/ 265 int electrodes_y; /* Number of electrodes on the Y Axis*/ 266 int electrodes_rx; /* Number of Rx electrodes */ 267 int aligned_electrodes_rx; /* 4 aligned */ 268 int max_z; 269 270 /* 271 * Used to synchronize the access or update the device state. 272 * And since update firmware and read firmware image process will take 273 * quite long time, maybe more than 10 seconds, so use mutex_lock 274 * to sync and wait other interface and detecting are done or ready. 275 */ 276 struct mutex state_sync_lock; 277 278 const struct cyapa_dev_ops *ops; 279 280 union cyapa_cmd_states cmd_states; 281 }; 282 283 284 ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len, 285 u8 *values); 286 ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len, 287 u8 *values); 288 289 ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values); 290 291 int cyapa_poll_state(struct cyapa *cyapa, unsigned int timeout); 292 293 u8 cyapa_sleep_time_to_pwr_cmd(u16 sleep_time); 294 u16 cyapa_pwr_cmd_to_sleep_time(u8 pwr_mode); 295 296 297 extern const char product_id[]; 298 extern const struct cyapa_dev_ops cyapa_gen3_ops; 299 extern const struct cyapa_dev_ops cyapa_gen5_ops; 300 301 #endif 302