1 /* 2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters 3 * Copyright (C) 2004 Arcom Control Systems 4 * Copyright (C) 2008 Pengutronix 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/moduleparam.h> 20 #include <linux/delay.h> 21 #include <linux/jiffies.h> 22 #include <linux/errno.h> 23 #include <linux/i2c.h> 24 #include <linux/i2c-algo-pca.h> 25 26 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \ 27 printk(KERN_DEBUG fmt, ## args); } while (0) 28 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \ 29 printk(KERN_DEBUG fmt, ## args); } while (0) 30 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \ 31 printk(KERN_DEBUG fmt, ## args); } while (0) 32 33 static int i2c_debug; 34 35 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val) 36 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg) 37 38 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA) 39 #define pca_clock(adap) adap->i2c_clock 40 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) 41 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) 42 #define pca_wait(adap) adap->wait_for_completion(adap->data) 43 44 static void pca_reset(struct i2c_algo_pca_data *adap) 45 { 46 if (adap->chip == I2C_PCA_CHIP_9665) { 47 /* Ignore the reset function from the module, 48 * we can use the parallel bus reset. 49 */ 50 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); 51 pca_outw(adap, I2C_PCA_IND, 0xA5); 52 pca_outw(adap, I2C_PCA_IND, 0x5A); 53 } else { 54 adap->reset_chip(adap->data); 55 } 56 } 57 58 /* 59 * Generate a start condition on the i2c bus. 60 * 61 * returns after the start condition has occurred 62 */ 63 static int pca_start(struct i2c_algo_pca_data *adap) 64 { 65 int sta = pca_get_con(adap); 66 DEB2("=== START\n"); 67 sta |= I2C_PCA_CON_STA; 68 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 69 pca_set_con(adap, sta); 70 return pca_wait(adap); 71 } 72 73 /* 74 * Generate a repeated start condition on the i2c bus 75 * 76 * return after the repeated start condition has occurred 77 */ 78 static int pca_repeated_start(struct i2c_algo_pca_data *adap) 79 { 80 int sta = pca_get_con(adap); 81 DEB2("=== REPEATED START\n"); 82 sta |= I2C_PCA_CON_STA; 83 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 84 pca_set_con(adap, sta); 85 return pca_wait(adap); 86 } 87 88 /* 89 * Generate a stop condition on the i2c bus 90 * 91 * returns after the stop condition has been generated 92 * 93 * STOPs do not generate an interrupt or set the SI flag, since the 94 * part returns the idle state (0xf8). Hence we don't need to 95 * pca_wait here. 96 */ 97 static void pca_stop(struct i2c_algo_pca_data *adap) 98 { 99 int sta = pca_get_con(adap); 100 DEB2("=== STOP\n"); 101 sta |= I2C_PCA_CON_STO; 102 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI); 103 pca_set_con(adap, sta); 104 } 105 106 /* 107 * Send the slave address and R/W bit 108 * 109 * returns after the address has been sent 110 */ 111 static int pca_address(struct i2c_algo_pca_data *adap, 112 struct i2c_msg *msg) 113 { 114 int sta = pca_get_con(adap); 115 int addr = i2c_8bit_addr_from_msg(msg); 116 117 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", 118 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); 119 120 pca_outw(adap, I2C_PCA_DAT, addr); 121 122 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 123 pca_set_con(adap, sta); 124 125 return pca_wait(adap); 126 } 127 128 /* 129 * Transmit a byte. 130 * 131 * Returns after the byte has been transmitted 132 */ 133 static int pca_tx_byte(struct i2c_algo_pca_data *adap, 134 __u8 b) 135 { 136 int sta = pca_get_con(adap); 137 DEB2("=== WRITE %#04x\n", b); 138 pca_outw(adap, I2C_PCA_DAT, b); 139 140 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 141 pca_set_con(adap, sta); 142 143 return pca_wait(adap); 144 } 145 146 /* 147 * Receive a byte 148 * 149 * returns immediately. 150 */ 151 static void pca_rx_byte(struct i2c_algo_pca_data *adap, 152 __u8 *b, int ack) 153 { 154 *b = pca_inw(adap, I2C_PCA_DAT); 155 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); 156 } 157 158 /* 159 * Setup ACK or NACK for next received byte and wait for it to arrive. 160 * 161 * Returns after next byte has arrived. 162 */ 163 static int pca_rx_ack(struct i2c_algo_pca_data *adap, 164 int ack) 165 { 166 int sta = pca_get_con(adap); 167 168 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA); 169 170 if (ack) 171 sta |= I2C_PCA_CON_AA; 172 173 pca_set_con(adap, sta); 174 return pca_wait(adap); 175 } 176 177 static int pca_xfer(struct i2c_adapter *i2c_adap, 178 struct i2c_msg *msgs, 179 int num) 180 { 181 struct i2c_algo_pca_data *adap = i2c_adap->algo_data; 182 struct i2c_msg *msg = NULL; 183 int curmsg; 184 int numbytes = 0; 185 int state; 186 int ret; 187 int completed = 1; 188 unsigned long timeout = jiffies + i2c_adap->timeout; 189 190 while ((state = pca_status(adap)) != 0xf8) { 191 if (time_before(jiffies, timeout)) { 192 msleep(10); 193 } else { 194 dev_dbg(&i2c_adap->dev, "bus is not idle. status is " 195 "%#04x\n", state); 196 return -EBUSY; 197 } 198 } 199 200 DEB1("{{{ XFER %d messages\n", num); 201 202 if (i2c_debug >= 2) { 203 for (curmsg = 0; curmsg < num; curmsg++) { 204 int addr, i; 205 msg = &msgs[curmsg]; 206 207 addr = (0x7f & msg->addr) ; 208 209 if (msg->flags & I2C_M_RD) 210 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", 211 curmsg, msg->len, addr, (addr << 1) | 1); 212 else { 213 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", 214 curmsg, msg->len, addr, addr << 1, 215 msg->len == 0 ? "" : ", "); 216 for (i = 0; i < msg->len; i++) 217 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", "); 218 printk("]\n"); 219 } 220 } 221 } 222 223 curmsg = 0; 224 ret = -EIO; 225 while (curmsg < num) { 226 state = pca_status(adap); 227 228 DEB3("STATE is 0x%02x\n", state); 229 msg = &msgs[curmsg]; 230 231 switch (state) { 232 case 0xf8: /* On reset or stop the bus is idle */ 233 completed = pca_start(adap); 234 break; 235 236 case 0x08: /* A START condition has been transmitted */ 237 case 0x10: /* A repeated start condition has been transmitted */ 238 completed = pca_address(adap, msg); 239 break; 240 241 case 0x18: /* SLA+W has been transmitted; ACK has been received */ 242 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ 243 if (numbytes < msg->len) { 244 completed = pca_tx_byte(adap, 245 msg->buf[numbytes]); 246 numbytes++; 247 break; 248 } 249 curmsg++; numbytes = 0; 250 if (curmsg == num) 251 pca_stop(adap); 252 else 253 completed = pca_repeated_start(adap); 254 break; 255 256 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ 257 DEB2("NOT ACK received after SLA+W\n"); 258 pca_stop(adap); 259 ret = -ENXIO; 260 goto out; 261 262 case 0x40: /* SLA+R has been transmitted; ACK has been received */ 263 completed = pca_rx_ack(adap, msg->len > 1); 264 break; 265 266 case 0x50: /* Data bytes has been received; ACK has been returned */ 267 if (numbytes < msg->len) { 268 pca_rx_byte(adap, &msg->buf[numbytes], 1); 269 numbytes++; 270 completed = pca_rx_ack(adap, 271 numbytes < msg->len - 1); 272 break; 273 } 274 curmsg++; numbytes = 0; 275 if (curmsg == num) 276 pca_stop(adap); 277 else 278 completed = pca_repeated_start(adap); 279 break; 280 281 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ 282 DEB2("NOT ACK received after SLA+R\n"); 283 pca_stop(adap); 284 ret = -ENXIO; 285 goto out; 286 287 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ 288 DEB2("NOT ACK received after data byte\n"); 289 pca_stop(adap); 290 goto out; 291 292 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ 293 DEB2("Arbitration lost\n"); 294 /* 295 * The PCA9564 data sheet (2006-09-01) says "A 296 * START condition will be transmitted when the 297 * bus becomes free (STOP or SCL and SDA high)" 298 * when the STA bit is set (p. 11). 299 * 300 * In case this won't work, try pca_reset() 301 * instead. 302 */ 303 pca_start(adap); 304 goto out; 305 306 case 0x58: /* Data byte has been received; NOT ACK has been returned */ 307 if (numbytes == msg->len - 1) { 308 pca_rx_byte(adap, &msg->buf[numbytes], 0); 309 curmsg++; numbytes = 0; 310 if (curmsg == num) 311 pca_stop(adap); 312 else 313 completed = pca_repeated_start(adap); 314 } else { 315 DEB2("NOT ACK sent after data byte received. " 316 "Not final byte. numbytes %d. len %d\n", 317 numbytes, msg->len); 318 pca_stop(adap); 319 goto out; 320 } 321 break; 322 case 0x70: /* Bus error - SDA stuck low */ 323 DEB2("BUS ERROR - SDA Stuck low\n"); 324 pca_reset(adap); 325 goto out; 326 case 0x90: /* Bus error - SCL stuck low */ 327 DEB2("BUS ERROR - SCL Stuck low\n"); 328 pca_reset(adap); 329 goto out; 330 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */ 331 DEB2("BUS ERROR - Illegal START or STOP\n"); 332 pca_reset(adap); 333 goto out; 334 default: 335 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state); 336 break; 337 } 338 339 if (!completed) 340 goto out; 341 } 342 343 ret = curmsg; 344 out: 345 DEB1("}}} transferred %d/%d messages. " 346 "status is %#04x. control is %#04x\n", 347 curmsg, num, pca_status(adap), 348 pca_get_con(adap)); 349 return ret; 350 } 351 352 static u32 pca_func(struct i2c_adapter *adap) 353 { 354 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 355 } 356 357 static const struct i2c_algorithm pca_algo = { 358 .master_xfer = pca_xfer, 359 .functionality = pca_func, 360 }; 361 362 static unsigned int pca_probe_chip(struct i2c_adapter *adap) 363 { 364 struct i2c_algo_pca_data *pca_data = adap->algo_data; 365 /* The trick here is to check if there is an indirect register 366 * available. If there is one, we will read the value we first 367 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value 368 * we wrote on I2C_PCA_ADR 369 */ 370 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 371 pca_outw(pca_data, I2C_PCA_IND, 0xAA); 372 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO); 373 pca_outw(pca_data, I2C_PCA_IND, 0x00); 374 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 375 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) { 376 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name); 377 pca_data->chip = I2C_PCA_CHIP_9665; 378 } else { 379 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name); 380 pca_data->chip = I2C_PCA_CHIP_9564; 381 } 382 return pca_data->chip; 383 } 384 385 static int pca_init(struct i2c_adapter *adap) 386 { 387 struct i2c_algo_pca_data *pca_data = adap->algo_data; 388 389 adap->algo = &pca_algo; 390 391 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) { 392 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36}; 393 int clock; 394 395 if (pca_data->i2c_clock > 7) { 396 switch (pca_data->i2c_clock) { 397 case 330000: 398 pca_data->i2c_clock = I2C_PCA_CON_330kHz; 399 break; 400 case 288000: 401 pca_data->i2c_clock = I2C_PCA_CON_288kHz; 402 break; 403 case 217000: 404 pca_data->i2c_clock = I2C_PCA_CON_217kHz; 405 break; 406 case 146000: 407 pca_data->i2c_clock = I2C_PCA_CON_146kHz; 408 break; 409 case 88000: 410 pca_data->i2c_clock = I2C_PCA_CON_88kHz; 411 break; 412 case 59000: 413 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 414 break; 415 case 44000: 416 pca_data->i2c_clock = I2C_PCA_CON_44kHz; 417 break; 418 case 36000: 419 pca_data->i2c_clock = I2C_PCA_CON_36kHz; 420 break; 421 default: 422 printk(KERN_WARNING 423 "%s: Invalid I2C clock speed selected." 424 " Using default 59kHz.\n", adap->name); 425 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 426 } 427 } else { 428 printk(KERN_WARNING "%s: " 429 "Choosing the clock frequency based on " 430 "index is deprecated." 431 " Use the nominal frequency.\n", adap->name); 432 } 433 434 pca_reset(pca_data); 435 436 clock = pca_clock(pca_data); 437 printk(KERN_INFO "%s: Clock frequency is %dkHz\n", 438 adap->name, freqs[clock]); 439 440 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); 441 } else { 442 int clock; 443 int mode; 444 int tlow, thi; 445 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */ 446 int min_tlow, min_thi; 447 /* These values are the maximum raise and fall values allowed 448 * by the I2C operation mode (Standard, Fast or Fast+) 449 * They are used (added) below to calculate the clock dividers 450 * of PCA9665. Note that they are slightly different of the 451 * real maximum, to allow the change on mode exactly on the 452 * maximum clock rate for each mode 453 */ 454 int raise_fall_time; 455 456 if (pca_data->i2c_clock > 1265800) { 457 printk(KERN_WARNING "%s: I2C clock speed too high." 458 " Using 1265.8kHz.\n", adap->name); 459 pca_data->i2c_clock = 1265800; 460 } 461 462 if (pca_data->i2c_clock < 60300) { 463 printk(KERN_WARNING "%s: I2C clock speed too low." 464 " Using 60.3kHz.\n", adap->name); 465 pca_data->i2c_clock = 60300; 466 } 467 468 /* To avoid integer overflow, use clock/100 for calculations */ 469 clock = pca_clock(pca_data) / 100; 470 471 if (pca_data->i2c_clock > 1000000) { 472 mode = I2C_PCA_MODE_TURBO; 473 min_tlow = 14; 474 min_thi = 5; 475 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 476 } else if (pca_data->i2c_clock > 400000) { 477 mode = I2C_PCA_MODE_FASTP; 478 min_tlow = 17; 479 min_thi = 9; 480 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 481 } else if (pca_data->i2c_clock > 100000) { 482 mode = I2C_PCA_MODE_FAST; 483 min_tlow = 44; 484 min_thi = 20; 485 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */ 486 } else { 487 mode = I2C_PCA_MODE_STD; 488 min_tlow = 157; 489 min_thi = 134; 490 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */ 491 } 492 493 /* The minimum clock that respects the thi/tlow = 134/157 is 494 * 64800 Hz. Below that, we have to fix the tlow to 255 and 495 * calculate the thi factor. 496 */ 497 if (clock < 648) { 498 tlow = 255; 499 thi = 1000000 - clock * raise_fall_time; 500 thi /= (I2C_PCA_OSC_PER * clock) - tlow; 501 } else { 502 tlow = (1000000 - clock * raise_fall_time) * min_tlow; 503 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); 504 thi = tlow * min_thi / min_tlow; 505 } 506 507 pca_reset(pca_data); 508 509 printk(KERN_INFO 510 "%s: Clock frequency is %dHz\n", adap->name, clock * 100); 511 512 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); 513 pca_outw(pca_data, I2C_PCA_IND, mode); 514 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); 515 pca_outw(pca_data, I2C_PCA_IND, tlow); 516 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); 517 pca_outw(pca_data, I2C_PCA_IND, thi); 518 519 pca_set_con(pca_data, I2C_PCA_CON_ENSIO); 520 } 521 udelay(500); /* 500 us for oscillator to stabilise */ 522 523 return 0; 524 } 525 526 /* 527 * registering functions to load algorithms at runtime 528 */ 529 int i2c_pca_add_bus(struct i2c_adapter *adap) 530 { 531 int rval; 532 533 rval = pca_init(adap); 534 if (rval) 535 return rval; 536 537 return i2c_add_adapter(adap); 538 } 539 EXPORT_SYMBOL(i2c_pca_add_bus); 540 541 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) 542 { 543 int rval; 544 545 rval = pca_init(adap); 546 if (rval) 547 return rval; 548 549 return i2c_add_numbered_adapter(adap); 550 } 551 EXPORT_SYMBOL(i2c_pca_add_numbered_bus); 552 553 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, " 554 "Wolfram Sang <w.sang@pengutronix.de>"); 555 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm"); 556 MODULE_LICENSE("GPL"); 557 558 module_param(i2c_debug, int, 0); 559