1 /* 2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters 3 * Copyright (C) 2004 Arcom Control Systems 4 * Copyright (C) 2008 Pengutronix 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 19 * MA 02110-1301 USA. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/delay.h> 26 #include <linux/jiffies.h> 27 #include <linux/init.h> 28 #include <linux/errno.h> 29 #include <linux/i2c.h> 30 #include <linux/i2c-algo-pca.h> 31 32 #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \ 33 printk(KERN_DEBUG fmt, ## args); } while (0) 34 #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \ 35 printk(KERN_DEBUG fmt, ## args); } while (0) 36 #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \ 37 printk(KERN_DEBUG fmt, ## args); } while (0) 38 39 static int i2c_debug; 40 41 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val) 42 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg) 43 44 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA) 45 #define pca_clock(adap) adap->i2c_clock 46 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) 47 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) 48 #define pca_wait(adap) adap->wait_for_completion(adap->data) 49 50 static void pca_reset(struct i2c_algo_pca_data *adap) 51 { 52 if (adap->chip == I2C_PCA_CHIP_9665) { 53 /* Ignore the reset function from the module, 54 * we can use the parallel bus reset. 55 */ 56 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); 57 pca_outw(adap, I2C_PCA_IND, 0xA5); 58 pca_outw(adap, I2C_PCA_IND, 0x5A); 59 } else { 60 adap->reset_chip(adap->data); 61 } 62 } 63 64 /* 65 * Generate a start condition on the i2c bus. 66 * 67 * returns after the start condition has occurred 68 */ 69 static int pca_start(struct i2c_algo_pca_data *adap) 70 { 71 int sta = pca_get_con(adap); 72 DEB2("=== START\n"); 73 sta |= I2C_PCA_CON_STA; 74 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 75 pca_set_con(adap, sta); 76 return pca_wait(adap); 77 } 78 79 /* 80 * Generate a repeated start condition on the i2c bus 81 * 82 * return after the repeated start condition has occurred 83 */ 84 static int pca_repeated_start(struct i2c_algo_pca_data *adap) 85 { 86 int sta = pca_get_con(adap); 87 DEB2("=== REPEATED START\n"); 88 sta |= I2C_PCA_CON_STA; 89 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); 90 pca_set_con(adap, sta); 91 return pca_wait(adap); 92 } 93 94 /* 95 * Generate a stop condition on the i2c bus 96 * 97 * returns after the stop condition has been generated 98 * 99 * STOPs do not generate an interrupt or set the SI flag, since the 100 * part returns the idle state (0xf8). Hence we don't need to 101 * pca_wait here. 102 */ 103 static void pca_stop(struct i2c_algo_pca_data *adap) 104 { 105 int sta = pca_get_con(adap); 106 DEB2("=== STOP\n"); 107 sta |= I2C_PCA_CON_STO; 108 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI); 109 pca_set_con(adap, sta); 110 } 111 112 /* 113 * Send the slave address and R/W bit 114 * 115 * returns after the address has been sent 116 */ 117 static int pca_address(struct i2c_algo_pca_data *adap, 118 struct i2c_msg *msg) 119 { 120 int sta = pca_get_con(adap); 121 int addr; 122 123 addr = ((0x7f & msg->addr) << 1); 124 if (msg->flags & I2C_M_RD) 125 addr |= 1; 126 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", 127 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); 128 129 pca_outw(adap, I2C_PCA_DAT, addr); 130 131 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 132 pca_set_con(adap, sta); 133 134 return pca_wait(adap); 135 } 136 137 /* 138 * Transmit a byte. 139 * 140 * Returns after the byte has been transmitted 141 */ 142 static int pca_tx_byte(struct i2c_algo_pca_data *adap, 143 __u8 b) 144 { 145 int sta = pca_get_con(adap); 146 DEB2("=== WRITE %#04x\n", b); 147 pca_outw(adap, I2C_PCA_DAT, b); 148 149 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); 150 pca_set_con(adap, sta); 151 152 return pca_wait(adap); 153 } 154 155 /* 156 * Receive a byte 157 * 158 * returns immediately. 159 */ 160 static void pca_rx_byte(struct i2c_algo_pca_data *adap, 161 __u8 *b, int ack) 162 { 163 *b = pca_inw(adap, I2C_PCA_DAT); 164 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); 165 } 166 167 /* 168 * Setup ACK or NACK for next received byte and wait for it to arrive. 169 * 170 * Returns after next byte has arrived. 171 */ 172 static int pca_rx_ack(struct i2c_algo_pca_data *adap, 173 int ack) 174 { 175 int sta = pca_get_con(adap); 176 177 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA); 178 179 if (ack) 180 sta |= I2C_PCA_CON_AA; 181 182 pca_set_con(adap, sta); 183 return pca_wait(adap); 184 } 185 186 static int pca_xfer(struct i2c_adapter *i2c_adap, 187 struct i2c_msg *msgs, 188 int num) 189 { 190 struct i2c_algo_pca_data *adap = i2c_adap->algo_data; 191 struct i2c_msg *msg = NULL; 192 int curmsg; 193 int numbytes = 0; 194 int state; 195 int ret; 196 int completed = 1; 197 unsigned long timeout = jiffies + i2c_adap->timeout; 198 199 while ((state = pca_status(adap)) != 0xf8) { 200 if (time_before(jiffies, timeout)) { 201 msleep(10); 202 } else { 203 dev_dbg(&i2c_adap->dev, "bus is not idle. status is " 204 "%#04x\n", state); 205 return -EBUSY; 206 } 207 } 208 209 DEB1("{{{ XFER %d messages\n", num); 210 211 if (i2c_debug >= 2) { 212 for (curmsg = 0; curmsg < num; curmsg++) { 213 int addr, i; 214 msg = &msgs[curmsg]; 215 216 addr = (0x7f & msg->addr) ; 217 218 if (msg->flags & I2C_M_RD) 219 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", 220 curmsg, msg->len, addr, (addr << 1) | 1); 221 else { 222 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", 223 curmsg, msg->len, addr, addr << 1, 224 msg->len == 0 ? "" : ", "); 225 for (i = 0; i < msg->len; i++) 226 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", "); 227 printk("]\n"); 228 } 229 } 230 } 231 232 curmsg = 0; 233 ret = -EIO; 234 while (curmsg < num) { 235 state = pca_status(adap); 236 237 DEB3("STATE is 0x%02x\n", state); 238 msg = &msgs[curmsg]; 239 240 switch (state) { 241 case 0xf8: /* On reset or stop the bus is idle */ 242 completed = pca_start(adap); 243 break; 244 245 case 0x08: /* A START condition has been transmitted */ 246 case 0x10: /* A repeated start condition has been transmitted */ 247 completed = pca_address(adap, msg); 248 break; 249 250 case 0x18: /* SLA+W has been transmitted; ACK has been received */ 251 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ 252 if (numbytes < msg->len) { 253 completed = pca_tx_byte(adap, 254 msg->buf[numbytes]); 255 numbytes++; 256 break; 257 } 258 curmsg++; numbytes = 0; 259 if (curmsg == num) 260 pca_stop(adap); 261 else 262 completed = pca_repeated_start(adap); 263 break; 264 265 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ 266 DEB2("NOT ACK received after SLA+W\n"); 267 pca_stop(adap); 268 ret = -ENXIO; 269 goto out; 270 271 case 0x40: /* SLA+R has been transmitted; ACK has been received */ 272 completed = pca_rx_ack(adap, msg->len > 1); 273 break; 274 275 case 0x50: /* Data bytes has been received; ACK has been returned */ 276 if (numbytes < msg->len) { 277 pca_rx_byte(adap, &msg->buf[numbytes], 1); 278 numbytes++; 279 completed = pca_rx_ack(adap, 280 numbytes < msg->len - 1); 281 break; 282 } 283 curmsg++; numbytes = 0; 284 if (curmsg == num) 285 pca_stop(adap); 286 else 287 completed = pca_repeated_start(adap); 288 break; 289 290 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ 291 DEB2("NOT ACK received after SLA+R\n"); 292 pca_stop(adap); 293 ret = -ENXIO; 294 goto out; 295 296 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ 297 DEB2("NOT ACK received after data byte\n"); 298 pca_stop(adap); 299 goto out; 300 301 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ 302 DEB2("Arbitration lost\n"); 303 /* 304 * The PCA9564 data sheet (2006-09-01) says "A 305 * START condition will be transmitted when the 306 * bus becomes free (STOP or SCL and SDA high)" 307 * when the STA bit is set (p. 11). 308 * 309 * In case this won't work, try pca_reset() 310 * instead. 311 */ 312 pca_start(adap); 313 goto out; 314 315 case 0x58: /* Data byte has been received; NOT ACK has been returned */ 316 if (numbytes == msg->len - 1) { 317 pca_rx_byte(adap, &msg->buf[numbytes], 0); 318 curmsg++; numbytes = 0; 319 if (curmsg == num) 320 pca_stop(adap); 321 else 322 completed = pca_repeated_start(adap); 323 } else { 324 DEB2("NOT ACK sent after data byte received. " 325 "Not final byte. numbytes %d. len %d\n", 326 numbytes, msg->len); 327 pca_stop(adap); 328 goto out; 329 } 330 break; 331 case 0x70: /* Bus error - SDA stuck low */ 332 DEB2("BUS ERROR - SDA Stuck low\n"); 333 pca_reset(adap); 334 goto out; 335 case 0x90: /* Bus error - SCL stuck low */ 336 DEB2("BUS ERROR - SCL Stuck low\n"); 337 pca_reset(adap); 338 goto out; 339 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */ 340 DEB2("BUS ERROR - Illegal START or STOP\n"); 341 pca_reset(adap); 342 goto out; 343 default: 344 dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state); 345 break; 346 } 347 348 if (!completed) 349 goto out; 350 } 351 352 ret = curmsg; 353 out: 354 DEB1("}}} transferred %d/%d messages. " 355 "status is %#04x. control is %#04x\n", 356 curmsg, num, pca_status(adap), 357 pca_get_con(adap)); 358 return ret; 359 } 360 361 static u32 pca_func(struct i2c_adapter *adap) 362 { 363 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 364 } 365 366 static const struct i2c_algorithm pca_algo = { 367 .master_xfer = pca_xfer, 368 .functionality = pca_func, 369 }; 370 371 static unsigned int pca_probe_chip(struct i2c_adapter *adap) 372 { 373 struct i2c_algo_pca_data *pca_data = adap->algo_data; 374 /* The trick here is to check if there is an indirect register 375 * available. If there is one, we will read the value we first 376 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value 377 * we wrote on I2C_PCA_ADR 378 */ 379 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 380 pca_outw(pca_data, I2C_PCA_IND, 0xAA); 381 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO); 382 pca_outw(pca_data, I2C_PCA_IND, 0x00); 383 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); 384 if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) { 385 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name); 386 pca_data->chip = I2C_PCA_CHIP_9665; 387 } else { 388 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name); 389 pca_data->chip = I2C_PCA_CHIP_9564; 390 } 391 return pca_data->chip; 392 } 393 394 static int pca_init(struct i2c_adapter *adap) 395 { 396 struct i2c_algo_pca_data *pca_data = adap->algo_data; 397 398 adap->algo = &pca_algo; 399 400 if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) { 401 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36}; 402 int clock; 403 404 if (pca_data->i2c_clock > 7) { 405 switch (pca_data->i2c_clock) { 406 case 330000: 407 pca_data->i2c_clock = I2C_PCA_CON_330kHz; 408 break; 409 case 288000: 410 pca_data->i2c_clock = I2C_PCA_CON_288kHz; 411 break; 412 case 217000: 413 pca_data->i2c_clock = I2C_PCA_CON_217kHz; 414 break; 415 case 146000: 416 pca_data->i2c_clock = I2C_PCA_CON_146kHz; 417 break; 418 case 88000: 419 pca_data->i2c_clock = I2C_PCA_CON_88kHz; 420 break; 421 case 59000: 422 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 423 break; 424 case 44000: 425 pca_data->i2c_clock = I2C_PCA_CON_44kHz; 426 break; 427 case 36000: 428 pca_data->i2c_clock = I2C_PCA_CON_36kHz; 429 break; 430 default: 431 printk(KERN_WARNING 432 "%s: Invalid I2C clock speed selected." 433 " Using default 59kHz.\n", adap->name); 434 pca_data->i2c_clock = I2C_PCA_CON_59kHz; 435 } 436 } else { 437 printk(KERN_WARNING "%s: " 438 "Choosing the clock frequency based on " 439 "index is deprecated." 440 " Use the nominal frequency.\n", adap->name); 441 } 442 443 pca_reset(pca_data); 444 445 clock = pca_clock(pca_data); 446 printk(KERN_INFO "%s: Clock frequency is %dkHz\n", 447 adap->name, freqs[clock]); 448 449 pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); 450 } else { 451 int clock; 452 int mode; 453 int tlow, thi; 454 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */ 455 int min_tlow, min_thi; 456 /* These values are the maximum raise and fall values allowed 457 * by the I2C operation mode (Standard, Fast or Fast+) 458 * They are used (added) below to calculate the clock dividers 459 * of PCA9665. Note that they are slightly different of the 460 * real maximum, to allow the change on mode exactly on the 461 * maximum clock rate for each mode 462 */ 463 int raise_fall_time; 464 465 if (pca_data->i2c_clock > 1265800) { 466 printk(KERN_WARNING "%s: I2C clock speed too high." 467 " Using 1265.8kHz.\n", adap->name); 468 pca_data->i2c_clock = 1265800; 469 } 470 471 if (pca_data->i2c_clock < 60300) { 472 printk(KERN_WARNING "%s: I2C clock speed too low." 473 " Using 60.3kHz.\n", adap->name); 474 pca_data->i2c_clock = 60300; 475 } 476 477 /* To avoid integer overflow, use clock/100 for calculations */ 478 clock = pca_clock(pca_data) / 100; 479 480 if (pca_data->i2c_clock > 1000000) { 481 mode = I2C_PCA_MODE_TURBO; 482 min_tlow = 14; 483 min_thi = 5; 484 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 485 } else if (pca_data->i2c_clock > 400000) { 486 mode = I2C_PCA_MODE_FASTP; 487 min_tlow = 17; 488 min_thi = 9; 489 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ 490 } else if (pca_data->i2c_clock > 100000) { 491 mode = I2C_PCA_MODE_FAST; 492 min_tlow = 44; 493 min_thi = 20; 494 raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */ 495 } else { 496 mode = I2C_PCA_MODE_STD; 497 min_tlow = 157; 498 min_thi = 134; 499 raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */ 500 } 501 502 /* The minimum clock that respects the thi/tlow = 134/157 is 503 * 64800 Hz. Below that, we have to fix the tlow to 255 and 504 * calculate the thi factor. 505 */ 506 if (clock < 648) { 507 tlow = 255; 508 thi = 1000000 - clock * raise_fall_time; 509 thi /= (I2C_PCA_OSC_PER * clock) - tlow; 510 } else { 511 tlow = (1000000 - clock * raise_fall_time) * min_tlow; 512 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); 513 thi = tlow * min_thi / min_tlow; 514 } 515 516 pca_reset(pca_data); 517 518 printk(KERN_INFO 519 "%s: Clock frequency is %dHz\n", adap->name, clock * 100); 520 521 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); 522 pca_outw(pca_data, I2C_PCA_IND, mode); 523 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); 524 pca_outw(pca_data, I2C_PCA_IND, tlow); 525 pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); 526 pca_outw(pca_data, I2C_PCA_IND, thi); 527 528 pca_set_con(pca_data, I2C_PCA_CON_ENSIO); 529 } 530 udelay(500); /* 500 us for oscilator to stabilise */ 531 532 return 0; 533 } 534 535 /* 536 * registering functions to load algorithms at runtime 537 */ 538 int i2c_pca_add_bus(struct i2c_adapter *adap) 539 { 540 int rval; 541 542 rval = pca_init(adap); 543 if (rval) 544 return rval; 545 546 return i2c_add_adapter(adap); 547 } 548 EXPORT_SYMBOL(i2c_pca_add_bus); 549 550 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) 551 { 552 int rval; 553 554 rval = pca_init(adap); 555 if (rval) 556 return rval; 557 558 return i2c_add_numbered_adapter(adap); 559 } 560 EXPORT_SYMBOL(i2c_pca_add_numbered_bus); 561 562 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, " 563 "Wolfram Sang <w.sang@pengutronix.de>"); 564 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm"); 565 MODULE_LICENSE("GPL"); 566 567 module_param(i2c_debug, int, 0); 568