1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* LCDC DRM driver, based on da8xx-fb */ 8 9 #include <linux/component.h> 10 #include <linux/mod_devicetable.h> 11 #include <linux/module.h> 12 #include <linux/pinctrl/consumer.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_debugfs.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_fourcc.h> 21 #include <drm/drm_gem_cma_helper.h> 22 #include <drm/drm_gem_framebuffer_helper.h> 23 #include <drm/drm_mm.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 28 #include "tilcdc_drv.h" 29 #include "tilcdc_external.h" 30 #include "tilcdc_panel.h" 31 #include "tilcdc_regs.h" 32 33 static LIST_HEAD(module_list); 34 35 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 36 37 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 38 DRM_FORMAT_BGR888, 39 DRM_FORMAT_XBGR8888 }; 40 41 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 42 DRM_FORMAT_RGB888, 43 DRM_FORMAT_XRGB8888 }; 44 45 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 46 DRM_FORMAT_RGB888, 47 DRM_FORMAT_XRGB8888 }; 48 49 void tilcdc_module_init(struct tilcdc_module *mod, const char *name, 50 const struct tilcdc_module_ops *funcs) 51 { 52 mod->name = name; 53 mod->funcs = funcs; 54 INIT_LIST_HEAD(&mod->list); 55 list_add(&mod->list, &module_list); 56 } 57 58 void tilcdc_module_cleanup(struct tilcdc_module *mod) 59 { 60 list_del(&mod->list); 61 } 62 63 static struct of_device_id tilcdc_of_match[]; 64 65 static int tilcdc_atomic_check(struct drm_device *dev, 66 struct drm_atomic_state *state) 67 { 68 int ret; 69 70 ret = drm_atomic_helper_check_modeset(dev, state); 71 if (ret) 72 return ret; 73 74 ret = drm_atomic_helper_check_planes(dev, state); 75 if (ret) 76 return ret; 77 78 /* 79 * tilcdc ->atomic_check can update ->mode_changed if pixel format 80 * changes, hence will we check modeset changes again. 81 */ 82 ret = drm_atomic_helper_check_modeset(dev, state); 83 if (ret) 84 return ret; 85 86 return ret; 87 } 88 89 static const struct drm_mode_config_funcs mode_config_funcs = { 90 .fb_create = drm_gem_fb_create, 91 .atomic_check = tilcdc_atomic_check, 92 .atomic_commit = drm_atomic_helper_commit, 93 }; 94 95 static void modeset_init(struct drm_device *dev) 96 { 97 struct tilcdc_drm_private *priv = dev->dev_private; 98 struct tilcdc_module *mod; 99 100 list_for_each_entry(mod, &module_list, list) { 101 DBG("loading module: %s", mod->name); 102 mod->funcs->modeset_init(mod, dev); 103 } 104 105 dev->mode_config.min_width = 0; 106 dev->mode_config.min_height = 0; 107 dev->mode_config.max_width = priv->max_width; 108 dev->mode_config.max_height = 2048; 109 dev->mode_config.funcs = &mode_config_funcs; 110 } 111 112 #ifdef CONFIG_CPU_FREQ 113 static int cpufreq_transition(struct notifier_block *nb, 114 unsigned long val, void *data) 115 { 116 struct tilcdc_drm_private *priv = container_of(nb, 117 struct tilcdc_drm_private, freq_transition); 118 119 if (val == CPUFREQ_POSTCHANGE) 120 tilcdc_crtc_update_clk(priv->crtc); 121 122 return 0; 123 } 124 #endif 125 126 static irqreturn_t tilcdc_irq(int irq, void *arg) 127 { 128 struct drm_device *dev = arg; 129 struct tilcdc_drm_private *priv = dev->dev_private; 130 131 return tilcdc_crtc_irq(priv->crtc); 132 } 133 134 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq) 135 { 136 struct tilcdc_drm_private *priv = dev->dev_private; 137 int ret; 138 139 ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev); 140 if (ret) 141 return ret; 142 143 priv->irq_enabled = false; 144 145 return 0; 146 } 147 148 static void tilcdc_irq_uninstall(struct drm_device *dev) 149 { 150 struct tilcdc_drm_private *priv = dev->dev_private; 151 152 if (!priv->irq_enabled) 153 return; 154 155 free_irq(priv->irq, dev); 156 priv->irq_enabled = false; 157 } 158 159 /* 160 * DRM operations: 161 */ 162 163 static void tilcdc_fini(struct drm_device *dev) 164 { 165 struct tilcdc_drm_private *priv = dev->dev_private; 166 167 #ifdef CONFIG_CPU_FREQ 168 if (priv->freq_transition.notifier_call) 169 cpufreq_unregister_notifier(&priv->freq_transition, 170 CPUFREQ_TRANSITION_NOTIFIER); 171 #endif 172 173 if (priv->crtc) 174 tilcdc_crtc_shutdown(priv->crtc); 175 176 if (priv->is_registered) 177 drm_dev_unregister(dev); 178 179 drm_kms_helper_poll_fini(dev); 180 tilcdc_irq_uninstall(dev); 181 drm_mode_config_cleanup(dev); 182 183 if (priv->clk) 184 clk_put(priv->clk); 185 186 if (priv->mmio) 187 iounmap(priv->mmio); 188 189 if (priv->wq) 190 destroy_workqueue(priv->wq); 191 192 dev->dev_private = NULL; 193 194 pm_runtime_disable(dev->dev); 195 196 drm_dev_put(dev); 197 } 198 199 static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev) 200 { 201 struct drm_device *ddev; 202 struct platform_device *pdev = to_platform_device(dev); 203 struct device_node *node = dev->of_node; 204 struct tilcdc_drm_private *priv; 205 struct resource *res; 206 u32 bpp = 0; 207 int ret; 208 209 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 210 if (!priv) 211 return -ENOMEM; 212 213 ddev = drm_dev_alloc(ddrv, dev); 214 if (IS_ERR(ddev)) 215 return PTR_ERR(ddev); 216 217 ddev->dev_private = priv; 218 platform_set_drvdata(pdev, ddev); 219 drm_mode_config_init(ddev); 220 221 priv->is_componentized = 222 tilcdc_get_external_components(dev, NULL) > 0; 223 224 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 225 if (!priv->wq) { 226 ret = -ENOMEM; 227 goto init_failed; 228 } 229 230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 231 if (!res) { 232 dev_err(dev, "failed to get memory resource\n"); 233 ret = -EINVAL; 234 goto init_failed; 235 } 236 237 priv->mmio = ioremap(res->start, resource_size(res)); 238 if (!priv->mmio) { 239 dev_err(dev, "failed to ioremap\n"); 240 ret = -ENOMEM; 241 goto init_failed; 242 } 243 244 priv->clk = clk_get(dev, "fck"); 245 if (IS_ERR(priv->clk)) { 246 dev_err(dev, "failed to get functional clock\n"); 247 ret = -ENODEV; 248 goto init_failed; 249 } 250 251 pm_runtime_enable(dev); 252 253 /* Determine LCD IP Version */ 254 pm_runtime_get_sync(dev); 255 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 256 case 0x4c100102: 257 priv->rev = 1; 258 break; 259 case 0x4f200800: 260 case 0x4f201000: 261 priv->rev = 2; 262 break; 263 default: 264 dev_warn(dev, "Unknown PID Reg value 0x%08x, " 265 "defaulting to LCD revision 1\n", 266 tilcdc_read(ddev, LCDC_PID_REG)); 267 priv->rev = 1; 268 break; 269 } 270 271 pm_runtime_put_sync(dev); 272 273 if (priv->rev == 1) { 274 DBG("Revision 1 LCDC supports only RGB565 format"); 275 priv->pixelformats = tilcdc_rev1_formats; 276 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 277 bpp = 16; 278 } else { 279 const char *str = "\0"; 280 281 of_property_read_string(node, "blue-and-red-wiring", &str); 282 if (0 == strcmp(str, "crossed")) { 283 DBG("Configured for crossed blue and red wires"); 284 priv->pixelformats = tilcdc_crossed_formats; 285 priv->num_pixelformats = 286 ARRAY_SIZE(tilcdc_crossed_formats); 287 bpp = 32; /* Choose bpp with RGB support for fbdef */ 288 } else if (0 == strcmp(str, "straight")) { 289 DBG("Configured for straight blue and red wires"); 290 priv->pixelformats = tilcdc_straight_formats; 291 priv->num_pixelformats = 292 ARRAY_SIZE(tilcdc_straight_formats); 293 bpp = 16; /* Choose bpp with RGB support for fbdef */ 294 } else { 295 DBG("Blue and red wiring '%s' unknown, use legacy mode", 296 str); 297 priv->pixelformats = tilcdc_legacy_formats; 298 priv->num_pixelformats = 299 ARRAY_SIZE(tilcdc_legacy_formats); 300 bpp = 16; /* This is just a guess */ 301 } 302 } 303 304 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 305 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 306 307 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 308 309 if (of_property_read_u32(node, "max-width", &priv->max_width)) { 310 if (priv->rev == 1) 311 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1; 312 else 313 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2; 314 } 315 316 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 317 318 if (of_property_read_u32(node, "max-pixelclock", 319 &priv->max_pixelclock)) 320 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 321 322 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 323 324 ret = tilcdc_crtc_create(ddev); 325 if (ret < 0) { 326 dev_err(dev, "failed to create crtc\n"); 327 goto init_failed; 328 } 329 modeset_init(ddev); 330 331 #ifdef CONFIG_CPU_FREQ 332 priv->freq_transition.notifier_call = cpufreq_transition; 333 ret = cpufreq_register_notifier(&priv->freq_transition, 334 CPUFREQ_TRANSITION_NOTIFIER); 335 if (ret) { 336 dev_err(dev, "failed to register cpufreq notifier\n"); 337 priv->freq_transition.notifier_call = NULL; 338 goto init_failed; 339 } 340 #endif 341 342 if (priv->is_componentized) { 343 ret = component_bind_all(dev, ddev); 344 if (ret < 0) 345 goto init_failed; 346 347 ret = tilcdc_add_component_encoder(ddev); 348 if (ret < 0) 349 goto init_failed; 350 } else { 351 ret = tilcdc_attach_external_device(ddev); 352 if (ret) 353 goto init_failed; 354 } 355 356 if (!priv->external_connector && 357 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { 358 dev_err(dev, "no encoders/connectors found\n"); 359 ret = -EPROBE_DEFER; 360 goto init_failed; 361 } 362 363 ret = drm_vblank_init(ddev, 1); 364 if (ret < 0) { 365 dev_err(dev, "failed to initialize vblank\n"); 366 goto init_failed; 367 } 368 369 ret = platform_get_irq(pdev, 0); 370 if (ret < 0) 371 goto init_failed; 372 priv->irq = ret; 373 374 ret = tilcdc_irq_install(ddev, priv->irq); 375 if (ret < 0) { 376 dev_err(dev, "failed to install IRQ handler\n"); 377 goto init_failed; 378 } 379 380 drm_mode_config_reset(ddev); 381 382 drm_kms_helper_poll_init(ddev); 383 384 ret = drm_dev_register(ddev, 0); 385 if (ret) 386 goto init_failed; 387 priv->is_registered = true; 388 389 drm_fbdev_generic_setup(ddev, bpp); 390 return 0; 391 392 init_failed: 393 tilcdc_fini(ddev); 394 395 return ret; 396 } 397 398 #if defined(CONFIG_DEBUG_FS) 399 static const struct { 400 const char *name; 401 uint8_t rev; 402 uint8_t save; 403 uint32_t reg; 404 } registers[] = { 405 #define REG(rev, save, reg) { #reg, rev, save, reg } 406 /* exists in revision 1: */ 407 REG(1, false, LCDC_PID_REG), 408 REG(1, true, LCDC_CTRL_REG), 409 REG(1, false, LCDC_STAT_REG), 410 REG(1, true, LCDC_RASTER_CTRL_REG), 411 REG(1, true, LCDC_RASTER_TIMING_0_REG), 412 REG(1, true, LCDC_RASTER_TIMING_1_REG), 413 REG(1, true, LCDC_RASTER_TIMING_2_REG), 414 REG(1, true, LCDC_DMA_CTRL_REG), 415 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 416 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 417 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 418 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 419 /* new in revision 2: */ 420 REG(2, false, LCDC_RAW_STAT_REG), 421 REG(2, false, LCDC_MASKED_STAT_REG), 422 REG(2, true, LCDC_INT_ENABLE_SET_REG), 423 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 424 REG(2, false, LCDC_END_OF_INT_IND_REG), 425 REG(2, true, LCDC_CLK_ENABLE_REG), 426 #undef REG 427 }; 428 429 #endif 430 431 #ifdef CONFIG_DEBUG_FS 432 static int tilcdc_regs_show(struct seq_file *m, void *arg) 433 { 434 struct drm_info_node *node = (struct drm_info_node *) m->private; 435 struct drm_device *dev = node->minor->dev; 436 struct tilcdc_drm_private *priv = dev->dev_private; 437 unsigned i; 438 439 pm_runtime_get_sync(dev->dev); 440 441 seq_printf(m, "revision: %d\n", priv->rev); 442 443 for (i = 0; i < ARRAY_SIZE(registers); i++) 444 if (priv->rev >= registers[i].rev) 445 seq_printf(m, "%s:\t %08x\n", registers[i].name, 446 tilcdc_read(dev, registers[i].reg)); 447 448 pm_runtime_put_sync(dev->dev); 449 450 return 0; 451 } 452 453 static int tilcdc_mm_show(struct seq_file *m, void *arg) 454 { 455 struct drm_info_node *node = (struct drm_info_node *) m->private; 456 struct drm_device *dev = node->minor->dev; 457 struct drm_printer p = drm_seq_file_printer(m); 458 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 459 return 0; 460 } 461 462 static struct drm_info_list tilcdc_debugfs_list[] = { 463 { "regs", tilcdc_regs_show, 0, NULL }, 464 { "mm", tilcdc_mm_show, 0, NULL }, 465 }; 466 467 static void tilcdc_debugfs_init(struct drm_minor *minor) 468 { 469 struct tilcdc_module *mod; 470 471 drm_debugfs_create_files(tilcdc_debugfs_list, 472 ARRAY_SIZE(tilcdc_debugfs_list), 473 minor->debugfs_root, minor); 474 475 list_for_each_entry(mod, &module_list, list) 476 if (mod->funcs->debugfs_init) 477 mod->funcs->debugfs_init(mod, minor); 478 } 479 #endif 480 481 DEFINE_DRM_GEM_CMA_FOPS(fops); 482 483 static const struct drm_driver tilcdc_driver = { 484 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 485 DRM_GEM_CMA_DRIVER_OPS, 486 #ifdef CONFIG_DEBUG_FS 487 .debugfs_init = tilcdc_debugfs_init, 488 #endif 489 .fops = &fops, 490 .name = "tilcdc", 491 .desc = "TI LCD Controller DRM", 492 .date = "20121205", 493 .major = 1, 494 .minor = 0, 495 }; 496 497 /* 498 * Power management: 499 */ 500 501 #ifdef CONFIG_PM_SLEEP 502 static int tilcdc_pm_suspend(struct device *dev) 503 { 504 struct drm_device *ddev = dev_get_drvdata(dev); 505 int ret = 0; 506 507 ret = drm_mode_config_helper_suspend(ddev); 508 509 /* Select sleep pin state */ 510 pinctrl_pm_select_sleep_state(dev); 511 512 return ret; 513 } 514 515 static int tilcdc_pm_resume(struct device *dev) 516 { 517 struct drm_device *ddev = dev_get_drvdata(dev); 518 519 /* Select default pin state */ 520 pinctrl_pm_select_default_state(dev); 521 return drm_mode_config_helper_resume(ddev); 522 } 523 #endif 524 525 static const struct dev_pm_ops tilcdc_pm_ops = { 526 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume) 527 }; 528 529 /* 530 * Platform driver: 531 */ 532 static int tilcdc_bind(struct device *dev) 533 { 534 return tilcdc_init(&tilcdc_driver, dev); 535 } 536 537 static void tilcdc_unbind(struct device *dev) 538 { 539 struct drm_device *ddev = dev_get_drvdata(dev); 540 541 /* Check if a subcomponent has already triggered the unloading. */ 542 if (!ddev->dev_private) 543 return; 544 545 tilcdc_fini(dev_get_drvdata(dev)); 546 } 547 548 static const struct component_master_ops tilcdc_comp_ops = { 549 .bind = tilcdc_bind, 550 .unbind = tilcdc_unbind, 551 }; 552 553 static int tilcdc_pdev_probe(struct platform_device *pdev) 554 { 555 struct component_match *match = NULL; 556 int ret; 557 558 /* bail out early if no DT data: */ 559 if (!pdev->dev.of_node) { 560 dev_err(&pdev->dev, "device-tree data is missing\n"); 561 return -ENXIO; 562 } 563 564 ret = tilcdc_get_external_components(&pdev->dev, &match); 565 if (ret < 0) 566 return ret; 567 else if (ret == 0) 568 return tilcdc_init(&tilcdc_driver, &pdev->dev); 569 else 570 return component_master_add_with_match(&pdev->dev, 571 &tilcdc_comp_ops, 572 match); 573 } 574 575 static int tilcdc_pdev_remove(struct platform_device *pdev) 576 { 577 int ret; 578 579 ret = tilcdc_get_external_components(&pdev->dev, NULL); 580 if (ret < 0) 581 return ret; 582 else if (ret == 0) 583 tilcdc_fini(platform_get_drvdata(pdev)); 584 else 585 component_master_del(&pdev->dev, &tilcdc_comp_ops); 586 587 return 0; 588 } 589 590 static struct of_device_id tilcdc_of_match[] = { 591 { .compatible = "ti,am33xx-tilcdc", }, 592 { .compatible = "ti,da850-tilcdc", }, 593 { }, 594 }; 595 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 596 597 static struct platform_driver tilcdc_platform_driver = { 598 .probe = tilcdc_pdev_probe, 599 .remove = tilcdc_pdev_remove, 600 .driver = { 601 .name = "tilcdc", 602 .pm = &tilcdc_pm_ops, 603 .of_match_table = tilcdc_of_match, 604 }, 605 }; 606 607 static int __init tilcdc_drm_init(void) 608 { 609 DBG("init"); 610 tilcdc_panel_init(); 611 return platform_driver_register(&tilcdc_platform_driver); 612 } 613 614 static void __exit tilcdc_drm_fini(void) 615 { 616 DBG("fini"); 617 platform_driver_unregister(&tilcdc_platform_driver); 618 tilcdc_panel_fini(); 619 } 620 621 module_init(tilcdc_drm_init); 622 module_exit(tilcdc_drm_fini); 623 624 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 625 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 626 MODULE_LICENSE("GPL"); 627