1 /* 2 * Copyright (C) 2012 Texas Instruments 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 /* LCDC DRM driver, based on da8xx-fb */ 19 20 #include <linux/component.h> 21 #include <linux/pinctrl/consumer.h> 22 #include <linux/suspend.h> 23 #include <drm/drm_atomic.h> 24 #include <drm/drm_atomic_helper.h> 25 #include <drm/drm_fb_helper.h> 26 #include <drm/drm_gem_framebuffer_helper.h> 27 28 #include "tilcdc_drv.h" 29 #include "tilcdc_regs.h" 30 #include "tilcdc_tfp410.h" 31 #include "tilcdc_panel.h" 32 #include "tilcdc_external.h" 33 34 static LIST_HEAD(module_list); 35 36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 37 38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 39 DRM_FORMAT_BGR888, 40 DRM_FORMAT_XBGR8888 }; 41 42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 43 DRM_FORMAT_RGB888, 44 DRM_FORMAT_XRGB8888 }; 45 46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 47 DRM_FORMAT_RGB888, 48 DRM_FORMAT_XRGB8888 }; 49 50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name, 51 const struct tilcdc_module_ops *funcs) 52 { 53 mod->name = name; 54 mod->funcs = funcs; 55 INIT_LIST_HEAD(&mod->list); 56 list_add(&mod->list, &module_list); 57 } 58 59 void tilcdc_module_cleanup(struct tilcdc_module *mod) 60 { 61 list_del(&mod->list); 62 } 63 64 static struct of_device_id tilcdc_of_match[]; 65 66 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev, 67 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd) 68 { 69 return drm_gem_fb_create(dev, file_priv, mode_cmd); 70 } 71 72 static void tilcdc_fb_output_poll_changed(struct drm_device *dev) 73 { 74 struct tilcdc_drm_private *priv = dev->dev_private; 75 drm_fbdev_cma_hotplug_event(priv->fbdev); 76 } 77 78 static int tilcdc_atomic_check(struct drm_device *dev, 79 struct drm_atomic_state *state) 80 { 81 int ret; 82 83 ret = drm_atomic_helper_check_modeset(dev, state); 84 if (ret) 85 return ret; 86 87 ret = drm_atomic_helper_check_planes(dev, state); 88 if (ret) 89 return ret; 90 91 /* 92 * tilcdc ->atomic_check can update ->mode_changed if pixel format 93 * changes, hence will we check modeset changes again. 94 */ 95 ret = drm_atomic_helper_check_modeset(dev, state); 96 if (ret) 97 return ret; 98 99 return ret; 100 } 101 102 static int tilcdc_commit(struct drm_device *dev, 103 struct drm_atomic_state *state, 104 bool async) 105 { 106 int ret; 107 108 ret = drm_atomic_helper_prepare_planes(dev, state); 109 if (ret) 110 return ret; 111 112 ret = drm_atomic_helper_swap_state(state, true); 113 if (ret) { 114 drm_atomic_helper_cleanup_planes(dev, state); 115 return ret; 116 } 117 118 /* 119 * Everything below can be run asynchronously without the need to grab 120 * any modeset locks at all under one condition: It must be guaranteed 121 * that the asynchronous work has either been cancelled (if the driver 122 * supports it, which at least requires that the framebuffers get 123 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed 124 * before the new state gets committed on the software side with 125 * drm_atomic_helper_swap_state(). 126 * 127 * This scheme allows new atomic state updates to be prepared and 128 * checked in parallel to the asynchronous completion of the previous 129 * update. Which is important since compositors need to figure out the 130 * composition of the next frame right after having submitted the 131 * current layout. 132 */ 133 134 drm_atomic_helper_commit_modeset_disables(dev, state); 135 136 drm_atomic_helper_commit_planes(dev, state, 0); 137 138 drm_atomic_helper_commit_modeset_enables(dev, state); 139 140 drm_atomic_helper_wait_for_vblanks(dev, state); 141 142 drm_atomic_helper_cleanup_planes(dev, state); 143 144 return 0; 145 } 146 147 static const struct drm_mode_config_funcs mode_config_funcs = { 148 .fb_create = tilcdc_fb_create, 149 .output_poll_changed = tilcdc_fb_output_poll_changed, 150 .atomic_check = tilcdc_atomic_check, 151 .atomic_commit = tilcdc_commit, 152 }; 153 154 static void modeset_init(struct drm_device *dev) 155 { 156 struct tilcdc_drm_private *priv = dev->dev_private; 157 struct tilcdc_module *mod; 158 159 list_for_each_entry(mod, &module_list, list) { 160 DBG("loading module: %s", mod->name); 161 mod->funcs->modeset_init(mod, dev); 162 } 163 164 dev->mode_config.min_width = 0; 165 dev->mode_config.min_height = 0; 166 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); 167 dev->mode_config.max_height = 2048; 168 dev->mode_config.funcs = &mode_config_funcs; 169 } 170 171 #ifdef CONFIG_CPU_FREQ 172 static int cpufreq_transition(struct notifier_block *nb, 173 unsigned long val, void *data) 174 { 175 struct tilcdc_drm_private *priv = container_of(nb, 176 struct tilcdc_drm_private, freq_transition); 177 178 if (val == CPUFREQ_POSTCHANGE) 179 tilcdc_crtc_update_clk(priv->crtc); 180 181 return 0; 182 } 183 #endif 184 185 /* 186 * DRM operations: 187 */ 188 189 static void tilcdc_fini(struct drm_device *dev) 190 { 191 struct tilcdc_drm_private *priv = dev->dev_private; 192 193 if (priv->crtc) 194 tilcdc_crtc_shutdown(priv->crtc); 195 196 if (priv->is_registered) 197 drm_dev_unregister(dev); 198 199 drm_kms_helper_poll_fini(dev); 200 201 if (priv->fbdev) 202 drm_fbdev_cma_fini(priv->fbdev); 203 204 drm_irq_uninstall(dev); 205 drm_mode_config_cleanup(dev); 206 tilcdc_remove_external_device(dev); 207 208 #ifdef CONFIG_CPU_FREQ 209 if (priv->freq_transition.notifier_call) 210 cpufreq_unregister_notifier(&priv->freq_transition, 211 CPUFREQ_TRANSITION_NOTIFIER); 212 #endif 213 214 if (priv->clk) 215 clk_put(priv->clk); 216 217 if (priv->mmio) 218 iounmap(priv->mmio); 219 220 if (priv->wq) { 221 flush_workqueue(priv->wq); 222 destroy_workqueue(priv->wq); 223 } 224 225 dev->dev_private = NULL; 226 227 pm_runtime_disable(dev->dev); 228 229 drm_dev_put(dev); 230 } 231 232 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) 233 { 234 struct drm_device *ddev; 235 struct platform_device *pdev = to_platform_device(dev); 236 struct device_node *node = dev->of_node; 237 struct tilcdc_drm_private *priv; 238 struct resource *res; 239 u32 bpp = 0; 240 int ret; 241 242 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 243 if (!priv) { 244 dev_err(dev, "failed to allocate private data\n"); 245 return -ENOMEM; 246 } 247 248 ddev = drm_dev_alloc(ddrv, dev); 249 if (IS_ERR(ddev)) 250 return PTR_ERR(ddev); 251 252 ddev->dev_private = priv; 253 platform_set_drvdata(pdev, ddev); 254 drm_mode_config_init(ddev); 255 256 priv->is_componentized = 257 tilcdc_get_external_components(dev, NULL) > 0; 258 259 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 260 if (!priv->wq) { 261 ret = -ENOMEM; 262 goto init_failed; 263 } 264 265 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 266 if (!res) { 267 dev_err(dev, "failed to get memory resource\n"); 268 ret = -EINVAL; 269 goto init_failed; 270 } 271 272 priv->mmio = ioremap_nocache(res->start, resource_size(res)); 273 if (!priv->mmio) { 274 dev_err(dev, "failed to ioremap\n"); 275 ret = -ENOMEM; 276 goto init_failed; 277 } 278 279 priv->clk = clk_get(dev, "fck"); 280 if (IS_ERR(priv->clk)) { 281 dev_err(dev, "failed to get functional clock\n"); 282 ret = -ENODEV; 283 goto init_failed; 284 } 285 286 #ifdef CONFIG_CPU_FREQ 287 priv->freq_transition.notifier_call = cpufreq_transition; 288 ret = cpufreq_register_notifier(&priv->freq_transition, 289 CPUFREQ_TRANSITION_NOTIFIER); 290 if (ret) { 291 dev_err(dev, "failed to register cpufreq notifier\n"); 292 priv->freq_transition.notifier_call = NULL; 293 goto init_failed; 294 } 295 #endif 296 297 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 298 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 299 300 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 301 302 if (of_property_read_u32(node, "max-width", &priv->max_width)) 303 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH; 304 305 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 306 307 if (of_property_read_u32(node, "max-pixelclock", 308 &priv->max_pixelclock)) 309 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 310 311 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 312 313 pm_runtime_enable(dev); 314 315 /* Determine LCD IP Version */ 316 pm_runtime_get_sync(dev); 317 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 318 case 0x4c100102: 319 priv->rev = 1; 320 break; 321 case 0x4f200800: 322 case 0x4f201000: 323 priv->rev = 2; 324 break; 325 default: 326 dev_warn(dev, "Unknown PID Reg value 0x%08x, " 327 "defaulting to LCD revision 1\n", 328 tilcdc_read(ddev, LCDC_PID_REG)); 329 priv->rev = 1; 330 break; 331 } 332 333 pm_runtime_put_sync(dev); 334 335 if (priv->rev == 1) { 336 DBG("Revision 1 LCDC supports only RGB565 format"); 337 priv->pixelformats = tilcdc_rev1_formats; 338 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 339 bpp = 16; 340 } else { 341 const char *str = "\0"; 342 343 of_property_read_string(node, "blue-and-red-wiring", &str); 344 if (0 == strcmp(str, "crossed")) { 345 DBG("Configured for crossed blue and red wires"); 346 priv->pixelformats = tilcdc_crossed_formats; 347 priv->num_pixelformats = 348 ARRAY_SIZE(tilcdc_crossed_formats); 349 bpp = 32; /* Choose bpp with RGB support for fbdef */ 350 } else if (0 == strcmp(str, "straight")) { 351 DBG("Configured for straight blue and red wires"); 352 priv->pixelformats = tilcdc_straight_formats; 353 priv->num_pixelformats = 354 ARRAY_SIZE(tilcdc_straight_formats); 355 bpp = 16; /* Choose bpp with RGB support for fbdef */ 356 } else { 357 DBG("Blue and red wiring '%s' unknown, use legacy mode", 358 str); 359 priv->pixelformats = tilcdc_legacy_formats; 360 priv->num_pixelformats = 361 ARRAY_SIZE(tilcdc_legacy_formats); 362 bpp = 16; /* This is just a guess */ 363 } 364 } 365 366 ret = tilcdc_crtc_create(ddev); 367 if (ret < 0) { 368 dev_err(dev, "failed to create crtc\n"); 369 goto init_failed; 370 } 371 modeset_init(ddev); 372 373 if (priv->is_componentized) { 374 ret = component_bind_all(dev, ddev); 375 if (ret < 0) 376 goto init_failed; 377 378 ret = tilcdc_add_component_encoder(ddev); 379 if (ret < 0) 380 goto init_failed; 381 } else { 382 ret = tilcdc_attach_external_device(ddev); 383 if (ret) 384 goto init_failed; 385 } 386 387 if (!priv->external_connector && 388 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { 389 dev_err(dev, "no encoders/connectors found\n"); 390 ret = -ENXIO; 391 goto init_failed; 392 } 393 394 ret = drm_vblank_init(ddev, 1); 395 if (ret < 0) { 396 dev_err(dev, "failed to initialize vblank\n"); 397 goto init_failed; 398 } 399 400 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); 401 if (ret < 0) { 402 dev_err(dev, "failed to install IRQ handler\n"); 403 goto init_failed; 404 } 405 406 drm_mode_config_reset(ddev); 407 408 priv->fbdev = drm_fbdev_cma_init(ddev, bpp, 409 ddev->mode_config.num_connector); 410 if (IS_ERR(priv->fbdev)) { 411 ret = PTR_ERR(priv->fbdev); 412 goto init_failed; 413 } 414 415 drm_kms_helper_poll_init(ddev); 416 417 ret = drm_dev_register(ddev, 0); 418 if (ret) 419 goto init_failed; 420 421 priv->is_registered = true; 422 return 0; 423 424 init_failed: 425 tilcdc_fini(ddev); 426 427 return ret; 428 } 429 430 static void tilcdc_lastclose(struct drm_device *dev) 431 { 432 struct tilcdc_drm_private *priv = dev->dev_private; 433 drm_fbdev_cma_restore_mode(priv->fbdev); 434 } 435 436 static irqreturn_t tilcdc_irq(int irq, void *arg) 437 { 438 struct drm_device *dev = arg; 439 struct tilcdc_drm_private *priv = dev->dev_private; 440 return tilcdc_crtc_irq(priv->crtc); 441 } 442 443 #if defined(CONFIG_DEBUG_FS) 444 static const struct { 445 const char *name; 446 uint8_t rev; 447 uint8_t save; 448 uint32_t reg; 449 } registers[] = { 450 #define REG(rev, save, reg) { #reg, rev, save, reg } 451 /* exists in revision 1: */ 452 REG(1, false, LCDC_PID_REG), 453 REG(1, true, LCDC_CTRL_REG), 454 REG(1, false, LCDC_STAT_REG), 455 REG(1, true, LCDC_RASTER_CTRL_REG), 456 REG(1, true, LCDC_RASTER_TIMING_0_REG), 457 REG(1, true, LCDC_RASTER_TIMING_1_REG), 458 REG(1, true, LCDC_RASTER_TIMING_2_REG), 459 REG(1, true, LCDC_DMA_CTRL_REG), 460 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 461 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 462 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 463 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 464 /* new in revision 2: */ 465 REG(2, false, LCDC_RAW_STAT_REG), 466 REG(2, false, LCDC_MASKED_STAT_REG), 467 REG(2, true, LCDC_INT_ENABLE_SET_REG), 468 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 469 REG(2, false, LCDC_END_OF_INT_IND_REG), 470 REG(2, true, LCDC_CLK_ENABLE_REG), 471 #undef REG 472 }; 473 474 #endif 475 476 #ifdef CONFIG_DEBUG_FS 477 static int tilcdc_regs_show(struct seq_file *m, void *arg) 478 { 479 struct drm_info_node *node = (struct drm_info_node *) m->private; 480 struct drm_device *dev = node->minor->dev; 481 struct tilcdc_drm_private *priv = dev->dev_private; 482 unsigned i; 483 484 pm_runtime_get_sync(dev->dev); 485 486 seq_printf(m, "revision: %d\n", priv->rev); 487 488 for (i = 0; i < ARRAY_SIZE(registers); i++) 489 if (priv->rev >= registers[i].rev) 490 seq_printf(m, "%s:\t %08x\n", registers[i].name, 491 tilcdc_read(dev, registers[i].reg)); 492 493 pm_runtime_put_sync(dev->dev); 494 495 return 0; 496 } 497 498 static int tilcdc_mm_show(struct seq_file *m, void *arg) 499 { 500 struct drm_info_node *node = (struct drm_info_node *) m->private; 501 struct drm_device *dev = node->minor->dev; 502 struct drm_printer p = drm_seq_file_printer(m); 503 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 504 return 0; 505 } 506 507 static struct drm_info_list tilcdc_debugfs_list[] = { 508 { "regs", tilcdc_regs_show, 0 }, 509 { "mm", tilcdc_mm_show, 0 }, 510 { "fb", drm_fb_cma_debugfs_show, 0 }, 511 }; 512 513 static int tilcdc_debugfs_init(struct drm_minor *minor) 514 { 515 struct drm_device *dev = minor->dev; 516 struct tilcdc_module *mod; 517 int ret; 518 519 ret = drm_debugfs_create_files(tilcdc_debugfs_list, 520 ARRAY_SIZE(tilcdc_debugfs_list), 521 minor->debugfs_root, minor); 522 523 list_for_each_entry(mod, &module_list, list) 524 if (mod->funcs->debugfs_init) 525 mod->funcs->debugfs_init(mod, minor); 526 527 if (ret) { 528 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n"); 529 return ret; 530 } 531 532 return ret; 533 } 534 #endif 535 536 DEFINE_DRM_GEM_CMA_FOPS(fops); 537 538 static struct drm_driver tilcdc_driver = { 539 .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET | 540 DRIVER_PRIME | DRIVER_ATOMIC), 541 .lastclose = tilcdc_lastclose, 542 .irq_handler = tilcdc_irq, 543 .gem_free_object_unlocked = drm_gem_cma_free_object, 544 .gem_vm_ops = &drm_gem_cma_vm_ops, 545 .dumb_create = drm_gem_cma_dumb_create, 546 547 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 548 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 549 .gem_prime_import = drm_gem_prime_import, 550 .gem_prime_export = drm_gem_prime_export, 551 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 552 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 553 .gem_prime_vmap = drm_gem_cma_prime_vmap, 554 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 555 .gem_prime_mmap = drm_gem_cma_prime_mmap, 556 #ifdef CONFIG_DEBUG_FS 557 .debugfs_init = tilcdc_debugfs_init, 558 #endif 559 .fops = &fops, 560 .name = "tilcdc", 561 .desc = "TI LCD Controller DRM", 562 .date = "20121205", 563 .major = 1, 564 .minor = 0, 565 }; 566 567 /* 568 * Power management: 569 */ 570 571 #ifdef CONFIG_PM_SLEEP 572 static int tilcdc_pm_suspend(struct device *dev) 573 { 574 struct drm_device *ddev = dev_get_drvdata(dev); 575 struct tilcdc_drm_private *priv = ddev->dev_private; 576 577 priv->saved_state = drm_atomic_helper_suspend(ddev); 578 579 /* Select sleep pin state */ 580 pinctrl_pm_select_sleep_state(dev); 581 582 return 0; 583 } 584 585 static int tilcdc_pm_resume(struct device *dev) 586 { 587 struct drm_device *ddev = dev_get_drvdata(dev); 588 struct tilcdc_drm_private *priv = ddev->dev_private; 589 int ret = 0; 590 591 /* Select default pin state */ 592 pinctrl_pm_select_default_state(dev); 593 594 if (priv->saved_state) 595 ret = drm_atomic_helper_resume(ddev, priv->saved_state); 596 597 return ret; 598 } 599 #endif 600 601 static const struct dev_pm_ops tilcdc_pm_ops = { 602 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume) 603 }; 604 605 /* 606 * Platform driver: 607 */ 608 static int tilcdc_bind(struct device *dev) 609 { 610 return tilcdc_init(&tilcdc_driver, dev); 611 } 612 613 static void tilcdc_unbind(struct device *dev) 614 { 615 struct drm_device *ddev = dev_get_drvdata(dev); 616 617 /* Check if a subcomponent has already triggered the unloading. */ 618 if (!ddev->dev_private) 619 return; 620 621 tilcdc_fini(dev_get_drvdata(dev)); 622 } 623 624 static const struct component_master_ops tilcdc_comp_ops = { 625 .bind = tilcdc_bind, 626 .unbind = tilcdc_unbind, 627 }; 628 629 static int tilcdc_pdev_probe(struct platform_device *pdev) 630 { 631 struct component_match *match = NULL; 632 int ret; 633 634 /* bail out early if no DT data: */ 635 if (!pdev->dev.of_node) { 636 dev_err(&pdev->dev, "device-tree data is missing\n"); 637 return -ENXIO; 638 } 639 640 ret = tilcdc_get_external_components(&pdev->dev, &match); 641 if (ret < 0) 642 return ret; 643 else if (ret == 0) 644 return tilcdc_init(&tilcdc_driver, &pdev->dev); 645 else 646 return component_master_add_with_match(&pdev->dev, 647 &tilcdc_comp_ops, 648 match); 649 } 650 651 static int tilcdc_pdev_remove(struct platform_device *pdev) 652 { 653 int ret; 654 655 ret = tilcdc_get_external_components(&pdev->dev, NULL); 656 if (ret < 0) 657 return ret; 658 else if (ret == 0) 659 tilcdc_fini(platform_get_drvdata(pdev)); 660 else 661 component_master_del(&pdev->dev, &tilcdc_comp_ops); 662 663 return 0; 664 } 665 666 static struct of_device_id tilcdc_of_match[] = { 667 { .compatible = "ti,am33xx-tilcdc", }, 668 { .compatible = "ti,da850-tilcdc", }, 669 { }, 670 }; 671 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 672 673 static struct platform_driver tilcdc_platform_driver = { 674 .probe = tilcdc_pdev_probe, 675 .remove = tilcdc_pdev_remove, 676 .driver = { 677 .name = "tilcdc", 678 .pm = &tilcdc_pm_ops, 679 .of_match_table = tilcdc_of_match, 680 }, 681 }; 682 683 static int __init tilcdc_drm_init(void) 684 { 685 DBG("init"); 686 tilcdc_tfp410_init(); 687 tilcdc_panel_init(); 688 return platform_driver_register(&tilcdc_platform_driver); 689 } 690 691 static void __exit tilcdc_drm_fini(void) 692 { 693 DBG("fini"); 694 platform_driver_unregister(&tilcdc_platform_driver); 695 tilcdc_panel_fini(); 696 tilcdc_tfp410_fini(); 697 } 698 699 module_init(tilcdc_drm_init); 700 module_exit(tilcdc_drm_fini); 701 702 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 703 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 704 MODULE_LICENSE("GPL"); 705