1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* LCDC DRM driver, based on da8xx-fb */ 8 9 #include <linux/component.h> 10 #include <linux/mod_devicetable.h> 11 #include <linux/module.h> 12 #include <linux/pinctrl/consumer.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_debugfs.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_fourcc.h> 21 #include <drm/drm_gem_cma_helper.h> 22 #include <drm/drm_gem_framebuffer_helper.h> 23 #include <drm/drm_irq.h> 24 #include <drm/drm_mm.h> 25 #include <drm/drm_probe_helper.h> 26 #include <drm/drm_vblank.h> 27 28 29 #include "tilcdc_drv.h" 30 #include "tilcdc_external.h" 31 #include "tilcdc_panel.h" 32 #include "tilcdc_regs.h" 33 34 static LIST_HEAD(module_list); 35 36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 37 38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 39 DRM_FORMAT_BGR888, 40 DRM_FORMAT_XBGR8888 }; 41 42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 43 DRM_FORMAT_RGB888, 44 DRM_FORMAT_XRGB8888 }; 45 46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 47 DRM_FORMAT_RGB888, 48 DRM_FORMAT_XRGB8888 }; 49 50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name, 51 const struct tilcdc_module_ops *funcs) 52 { 53 mod->name = name; 54 mod->funcs = funcs; 55 INIT_LIST_HEAD(&mod->list); 56 list_add(&mod->list, &module_list); 57 } 58 59 void tilcdc_module_cleanup(struct tilcdc_module *mod) 60 { 61 list_del(&mod->list); 62 } 63 64 static struct of_device_id tilcdc_of_match[]; 65 66 static int tilcdc_atomic_check(struct drm_device *dev, 67 struct drm_atomic_state *state) 68 { 69 int ret; 70 71 ret = drm_atomic_helper_check_modeset(dev, state); 72 if (ret) 73 return ret; 74 75 ret = drm_atomic_helper_check_planes(dev, state); 76 if (ret) 77 return ret; 78 79 /* 80 * tilcdc ->atomic_check can update ->mode_changed if pixel format 81 * changes, hence will we check modeset changes again. 82 */ 83 ret = drm_atomic_helper_check_modeset(dev, state); 84 if (ret) 85 return ret; 86 87 return ret; 88 } 89 90 static const struct drm_mode_config_funcs mode_config_funcs = { 91 .fb_create = drm_gem_fb_create, 92 .atomic_check = tilcdc_atomic_check, 93 .atomic_commit = drm_atomic_helper_commit, 94 }; 95 96 static void modeset_init(struct drm_device *dev) 97 { 98 struct tilcdc_drm_private *priv = dev->dev_private; 99 struct tilcdc_module *mod; 100 101 list_for_each_entry(mod, &module_list, list) { 102 DBG("loading module: %s", mod->name); 103 mod->funcs->modeset_init(mod, dev); 104 } 105 106 dev->mode_config.min_width = 0; 107 dev->mode_config.min_height = 0; 108 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); 109 dev->mode_config.max_height = 2048; 110 dev->mode_config.funcs = &mode_config_funcs; 111 } 112 113 #ifdef CONFIG_CPU_FREQ 114 static int cpufreq_transition(struct notifier_block *nb, 115 unsigned long val, void *data) 116 { 117 struct tilcdc_drm_private *priv = container_of(nb, 118 struct tilcdc_drm_private, freq_transition); 119 120 if (val == CPUFREQ_POSTCHANGE) 121 tilcdc_crtc_update_clk(priv->crtc); 122 123 return 0; 124 } 125 #endif 126 127 /* 128 * DRM operations: 129 */ 130 131 static void tilcdc_fini(struct drm_device *dev) 132 { 133 struct tilcdc_drm_private *priv = dev->dev_private; 134 135 #ifdef CONFIG_CPU_FREQ 136 if (priv->freq_transition.notifier_call) 137 cpufreq_unregister_notifier(&priv->freq_transition, 138 CPUFREQ_TRANSITION_NOTIFIER); 139 #endif 140 141 if (priv->crtc) 142 tilcdc_crtc_shutdown(priv->crtc); 143 144 if (priv->is_registered) 145 drm_dev_unregister(dev); 146 147 drm_kms_helper_poll_fini(dev); 148 drm_irq_uninstall(dev); 149 drm_mode_config_cleanup(dev); 150 151 if (priv->clk) 152 clk_put(priv->clk); 153 154 if (priv->mmio) 155 iounmap(priv->mmio); 156 157 if (priv->wq) { 158 flush_workqueue(priv->wq); 159 destroy_workqueue(priv->wq); 160 } 161 162 dev->dev_private = NULL; 163 164 pm_runtime_disable(dev->dev); 165 166 drm_dev_put(dev); 167 } 168 169 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) 170 { 171 struct drm_device *ddev; 172 struct platform_device *pdev = to_platform_device(dev); 173 struct device_node *node = dev->of_node; 174 struct tilcdc_drm_private *priv; 175 struct resource *res; 176 u32 bpp = 0; 177 int ret; 178 179 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 180 if (!priv) 181 return -ENOMEM; 182 183 ddev = drm_dev_alloc(ddrv, dev); 184 if (IS_ERR(ddev)) 185 return PTR_ERR(ddev); 186 187 ddev->dev_private = priv; 188 platform_set_drvdata(pdev, ddev); 189 drm_mode_config_init(ddev); 190 191 priv->is_componentized = 192 tilcdc_get_external_components(dev, NULL) > 0; 193 194 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 195 if (!priv->wq) { 196 ret = -ENOMEM; 197 goto init_failed; 198 } 199 200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 201 if (!res) { 202 dev_err(dev, "failed to get memory resource\n"); 203 ret = -EINVAL; 204 goto init_failed; 205 } 206 207 priv->mmio = ioremap(res->start, resource_size(res)); 208 if (!priv->mmio) { 209 dev_err(dev, "failed to ioremap\n"); 210 ret = -ENOMEM; 211 goto init_failed; 212 } 213 214 priv->clk = clk_get(dev, "fck"); 215 if (IS_ERR(priv->clk)) { 216 dev_err(dev, "failed to get functional clock\n"); 217 ret = -ENODEV; 218 goto init_failed; 219 } 220 221 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 222 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 223 224 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 225 226 if (of_property_read_u32(node, "max-width", &priv->max_width)) 227 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH; 228 229 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 230 231 if (of_property_read_u32(node, "max-pixelclock", 232 &priv->max_pixelclock)) 233 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 234 235 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 236 237 pm_runtime_enable(dev); 238 239 /* Determine LCD IP Version */ 240 pm_runtime_get_sync(dev); 241 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 242 case 0x4c100102: 243 priv->rev = 1; 244 break; 245 case 0x4f200800: 246 case 0x4f201000: 247 priv->rev = 2; 248 break; 249 default: 250 dev_warn(dev, "Unknown PID Reg value 0x%08x, " 251 "defaulting to LCD revision 1\n", 252 tilcdc_read(ddev, LCDC_PID_REG)); 253 priv->rev = 1; 254 break; 255 } 256 257 pm_runtime_put_sync(dev); 258 259 if (priv->rev == 1) { 260 DBG("Revision 1 LCDC supports only RGB565 format"); 261 priv->pixelformats = tilcdc_rev1_formats; 262 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 263 bpp = 16; 264 } else { 265 const char *str = "\0"; 266 267 of_property_read_string(node, "blue-and-red-wiring", &str); 268 if (0 == strcmp(str, "crossed")) { 269 DBG("Configured for crossed blue and red wires"); 270 priv->pixelformats = tilcdc_crossed_formats; 271 priv->num_pixelformats = 272 ARRAY_SIZE(tilcdc_crossed_formats); 273 bpp = 32; /* Choose bpp with RGB support for fbdef */ 274 } else if (0 == strcmp(str, "straight")) { 275 DBG("Configured for straight blue and red wires"); 276 priv->pixelformats = tilcdc_straight_formats; 277 priv->num_pixelformats = 278 ARRAY_SIZE(tilcdc_straight_formats); 279 bpp = 16; /* Choose bpp with RGB support for fbdef */ 280 } else { 281 DBG("Blue and red wiring '%s' unknown, use legacy mode", 282 str); 283 priv->pixelformats = tilcdc_legacy_formats; 284 priv->num_pixelformats = 285 ARRAY_SIZE(tilcdc_legacy_formats); 286 bpp = 16; /* This is just a guess */ 287 } 288 } 289 290 ret = tilcdc_crtc_create(ddev); 291 if (ret < 0) { 292 dev_err(dev, "failed to create crtc\n"); 293 goto init_failed; 294 } 295 modeset_init(ddev); 296 297 #ifdef CONFIG_CPU_FREQ 298 priv->freq_transition.notifier_call = cpufreq_transition; 299 ret = cpufreq_register_notifier(&priv->freq_transition, 300 CPUFREQ_TRANSITION_NOTIFIER); 301 if (ret) { 302 dev_err(dev, "failed to register cpufreq notifier\n"); 303 priv->freq_transition.notifier_call = NULL; 304 goto init_failed; 305 } 306 #endif 307 308 if (priv->is_componentized) { 309 ret = component_bind_all(dev, ddev); 310 if (ret < 0) 311 goto init_failed; 312 313 ret = tilcdc_add_component_encoder(ddev); 314 if (ret < 0) 315 goto init_failed; 316 } else { 317 ret = tilcdc_attach_external_device(ddev); 318 if (ret) 319 goto init_failed; 320 } 321 322 if (!priv->external_connector && 323 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { 324 dev_err(dev, "no encoders/connectors found\n"); 325 ret = -EPROBE_DEFER; 326 goto init_failed; 327 } 328 329 ret = drm_vblank_init(ddev, 1); 330 if (ret < 0) { 331 dev_err(dev, "failed to initialize vblank\n"); 332 goto init_failed; 333 } 334 335 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); 336 if (ret < 0) { 337 dev_err(dev, "failed to install IRQ handler\n"); 338 goto init_failed; 339 } 340 341 drm_mode_config_reset(ddev); 342 343 drm_kms_helper_poll_init(ddev); 344 345 ret = drm_dev_register(ddev, 0); 346 if (ret) 347 goto init_failed; 348 priv->is_registered = true; 349 350 drm_fbdev_generic_setup(ddev, bpp); 351 return 0; 352 353 init_failed: 354 tilcdc_fini(ddev); 355 356 return ret; 357 } 358 359 static irqreturn_t tilcdc_irq(int irq, void *arg) 360 { 361 struct drm_device *dev = arg; 362 struct tilcdc_drm_private *priv = dev->dev_private; 363 return tilcdc_crtc_irq(priv->crtc); 364 } 365 366 #if defined(CONFIG_DEBUG_FS) 367 static const struct { 368 const char *name; 369 uint8_t rev; 370 uint8_t save; 371 uint32_t reg; 372 } registers[] = { 373 #define REG(rev, save, reg) { #reg, rev, save, reg } 374 /* exists in revision 1: */ 375 REG(1, false, LCDC_PID_REG), 376 REG(1, true, LCDC_CTRL_REG), 377 REG(1, false, LCDC_STAT_REG), 378 REG(1, true, LCDC_RASTER_CTRL_REG), 379 REG(1, true, LCDC_RASTER_TIMING_0_REG), 380 REG(1, true, LCDC_RASTER_TIMING_1_REG), 381 REG(1, true, LCDC_RASTER_TIMING_2_REG), 382 REG(1, true, LCDC_DMA_CTRL_REG), 383 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 384 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 385 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 386 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 387 /* new in revision 2: */ 388 REG(2, false, LCDC_RAW_STAT_REG), 389 REG(2, false, LCDC_MASKED_STAT_REG), 390 REG(2, true, LCDC_INT_ENABLE_SET_REG), 391 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 392 REG(2, false, LCDC_END_OF_INT_IND_REG), 393 REG(2, true, LCDC_CLK_ENABLE_REG), 394 #undef REG 395 }; 396 397 #endif 398 399 #ifdef CONFIG_DEBUG_FS 400 static int tilcdc_regs_show(struct seq_file *m, void *arg) 401 { 402 struct drm_info_node *node = (struct drm_info_node *) m->private; 403 struct drm_device *dev = node->minor->dev; 404 struct tilcdc_drm_private *priv = dev->dev_private; 405 unsigned i; 406 407 pm_runtime_get_sync(dev->dev); 408 409 seq_printf(m, "revision: %d\n", priv->rev); 410 411 for (i = 0; i < ARRAY_SIZE(registers); i++) 412 if (priv->rev >= registers[i].rev) 413 seq_printf(m, "%s:\t %08x\n", registers[i].name, 414 tilcdc_read(dev, registers[i].reg)); 415 416 pm_runtime_put_sync(dev->dev); 417 418 return 0; 419 } 420 421 static int tilcdc_mm_show(struct seq_file *m, void *arg) 422 { 423 struct drm_info_node *node = (struct drm_info_node *) m->private; 424 struct drm_device *dev = node->minor->dev; 425 struct drm_printer p = drm_seq_file_printer(m); 426 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 427 return 0; 428 } 429 430 static struct drm_info_list tilcdc_debugfs_list[] = { 431 { "regs", tilcdc_regs_show, 0 }, 432 { "mm", tilcdc_mm_show, 0 }, 433 }; 434 435 static void tilcdc_debugfs_init(struct drm_minor *minor) 436 { 437 struct tilcdc_module *mod; 438 439 drm_debugfs_create_files(tilcdc_debugfs_list, 440 ARRAY_SIZE(tilcdc_debugfs_list), 441 minor->debugfs_root, minor); 442 443 list_for_each_entry(mod, &module_list, list) 444 if (mod->funcs->debugfs_init) 445 mod->funcs->debugfs_init(mod, minor); 446 } 447 #endif 448 449 DEFINE_DRM_GEM_CMA_FOPS(fops); 450 451 static struct drm_driver tilcdc_driver = { 452 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 453 .irq_handler = tilcdc_irq, 454 DRM_GEM_CMA_DRIVER_OPS, 455 #ifdef CONFIG_DEBUG_FS 456 .debugfs_init = tilcdc_debugfs_init, 457 #endif 458 .fops = &fops, 459 .name = "tilcdc", 460 .desc = "TI LCD Controller DRM", 461 .date = "20121205", 462 .major = 1, 463 .minor = 0, 464 }; 465 466 /* 467 * Power management: 468 */ 469 470 #ifdef CONFIG_PM_SLEEP 471 static int tilcdc_pm_suspend(struct device *dev) 472 { 473 struct drm_device *ddev = dev_get_drvdata(dev); 474 int ret = 0; 475 476 ret = drm_mode_config_helper_suspend(ddev); 477 478 /* Select sleep pin state */ 479 pinctrl_pm_select_sleep_state(dev); 480 481 return ret; 482 } 483 484 static int tilcdc_pm_resume(struct device *dev) 485 { 486 struct drm_device *ddev = dev_get_drvdata(dev); 487 488 /* Select default pin state */ 489 pinctrl_pm_select_default_state(dev); 490 return drm_mode_config_helper_resume(ddev); 491 } 492 #endif 493 494 static const struct dev_pm_ops tilcdc_pm_ops = { 495 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume) 496 }; 497 498 /* 499 * Platform driver: 500 */ 501 static int tilcdc_bind(struct device *dev) 502 { 503 return tilcdc_init(&tilcdc_driver, dev); 504 } 505 506 static void tilcdc_unbind(struct device *dev) 507 { 508 struct drm_device *ddev = dev_get_drvdata(dev); 509 510 /* Check if a subcomponent has already triggered the unloading. */ 511 if (!ddev->dev_private) 512 return; 513 514 tilcdc_fini(dev_get_drvdata(dev)); 515 } 516 517 static const struct component_master_ops tilcdc_comp_ops = { 518 .bind = tilcdc_bind, 519 .unbind = tilcdc_unbind, 520 }; 521 522 static int tilcdc_pdev_probe(struct platform_device *pdev) 523 { 524 struct component_match *match = NULL; 525 int ret; 526 527 /* bail out early if no DT data: */ 528 if (!pdev->dev.of_node) { 529 dev_err(&pdev->dev, "device-tree data is missing\n"); 530 return -ENXIO; 531 } 532 533 ret = tilcdc_get_external_components(&pdev->dev, &match); 534 if (ret < 0) 535 return ret; 536 else if (ret == 0) 537 return tilcdc_init(&tilcdc_driver, &pdev->dev); 538 else 539 return component_master_add_with_match(&pdev->dev, 540 &tilcdc_comp_ops, 541 match); 542 } 543 544 static int tilcdc_pdev_remove(struct platform_device *pdev) 545 { 546 int ret; 547 548 ret = tilcdc_get_external_components(&pdev->dev, NULL); 549 if (ret < 0) 550 return ret; 551 else if (ret == 0) 552 tilcdc_fini(platform_get_drvdata(pdev)); 553 else 554 component_master_del(&pdev->dev, &tilcdc_comp_ops); 555 556 return 0; 557 } 558 559 static struct of_device_id tilcdc_of_match[] = { 560 { .compatible = "ti,am33xx-tilcdc", }, 561 { .compatible = "ti,da850-tilcdc", }, 562 { }, 563 }; 564 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 565 566 static struct platform_driver tilcdc_platform_driver = { 567 .probe = tilcdc_pdev_probe, 568 .remove = tilcdc_pdev_remove, 569 .driver = { 570 .name = "tilcdc", 571 .pm = &tilcdc_pm_ops, 572 .of_match_table = tilcdc_of_match, 573 }, 574 }; 575 576 static int __init tilcdc_drm_init(void) 577 { 578 DBG("init"); 579 tilcdc_panel_init(); 580 return platform_driver_register(&tilcdc_platform_driver); 581 } 582 583 static void __exit tilcdc_drm_fini(void) 584 { 585 DBG("fini"); 586 platform_driver_unregister(&tilcdc_platform_driver); 587 tilcdc_panel_fini(); 588 } 589 590 module_init(tilcdc_drm_init); 591 module_exit(tilcdc_drm_fini); 592 593 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 594 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 595 MODULE_LICENSE("GPL"); 596