1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* LCDC DRM driver, based on da8xx-fb */ 8 9 #include <linux/component.h> 10 #include <linux/mod_devicetable.h> 11 #include <linux/module.h> 12 #include <linux/pinctrl/consumer.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_debugfs.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_fourcc.h> 21 #include <drm/drm_gem_cma_helper.h> 22 #include <drm/drm_gem_framebuffer_helper.h> 23 #include <drm/drm_mm.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 28 #include "tilcdc_drv.h" 29 #include "tilcdc_external.h" 30 #include "tilcdc_panel.h" 31 #include "tilcdc_regs.h" 32 33 static LIST_HEAD(module_list); 34 35 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 36 37 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 38 DRM_FORMAT_BGR888, 39 DRM_FORMAT_XBGR8888 }; 40 41 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 42 DRM_FORMAT_RGB888, 43 DRM_FORMAT_XRGB8888 }; 44 45 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 46 DRM_FORMAT_RGB888, 47 DRM_FORMAT_XRGB8888 }; 48 49 void tilcdc_module_init(struct tilcdc_module *mod, const char *name, 50 const struct tilcdc_module_ops *funcs) 51 { 52 mod->name = name; 53 mod->funcs = funcs; 54 INIT_LIST_HEAD(&mod->list); 55 list_add(&mod->list, &module_list); 56 } 57 58 void tilcdc_module_cleanup(struct tilcdc_module *mod) 59 { 60 list_del(&mod->list); 61 } 62 63 static struct of_device_id tilcdc_of_match[]; 64 65 static int tilcdc_atomic_check(struct drm_device *dev, 66 struct drm_atomic_state *state) 67 { 68 int ret; 69 70 ret = drm_atomic_helper_check_modeset(dev, state); 71 if (ret) 72 return ret; 73 74 ret = drm_atomic_helper_check_planes(dev, state); 75 if (ret) 76 return ret; 77 78 /* 79 * tilcdc ->atomic_check can update ->mode_changed if pixel format 80 * changes, hence will we check modeset changes again. 81 */ 82 ret = drm_atomic_helper_check_modeset(dev, state); 83 if (ret) 84 return ret; 85 86 return ret; 87 } 88 89 static const struct drm_mode_config_funcs mode_config_funcs = { 90 .fb_create = drm_gem_fb_create, 91 .atomic_check = tilcdc_atomic_check, 92 .atomic_commit = drm_atomic_helper_commit, 93 }; 94 95 static void modeset_init(struct drm_device *dev) 96 { 97 struct tilcdc_drm_private *priv = dev->dev_private; 98 struct tilcdc_module *mod; 99 100 list_for_each_entry(mod, &module_list, list) { 101 DBG("loading module: %s", mod->name); 102 mod->funcs->modeset_init(mod, dev); 103 } 104 105 dev->mode_config.min_width = 0; 106 dev->mode_config.min_height = 0; 107 dev->mode_config.max_width = priv->max_width; 108 dev->mode_config.max_height = 2048; 109 dev->mode_config.funcs = &mode_config_funcs; 110 } 111 112 #ifdef CONFIG_CPU_FREQ 113 static int cpufreq_transition(struct notifier_block *nb, 114 unsigned long val, void *data) 115 { 116 struct tilcdc_drm_private *priv = container_of(nb, 117 struct tilcdc_drm_private, freq_transition); 118 119 if (val == CPUFREQ_POSTCHANGE) 120 tilcdc_crtc_update_clk(priv->crtc); 121 122 return 0; 123 } 124 #endif 125 126 static irqreturn_t tilcdc_irq(int irq, void *arg) 127 { 128 struct drm_device *dev = arg; 129 struct tilcdc_drm_private *priv = dev->dev_private; 130 131 return tilcdc_crtc_irq(priv->crtc); 132 } 133 134 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq) 135 { 136 struct tilcdc_drm_private *priv = dev->dev_private; 137 int ret; 138 139 ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev); 140 if (ret) 141 return ret; 142 143 priv->irq_enabled = false; 144 145 return 0; 146 } 147 148 static void tilcdc_irq_uninstall(struct drm_device *dev) 149 { 150 struct tilcdc_drm_private *priv = dev->dev_private; 151 152 if (!priv->irq_enabled) 153 return; 154 155 free_irq(priv->irq, dev); 156 priv->irq_enabled = false; 157 } 158 159 /* 160 * DRM operations: 161 */ 162 163 static void tilcdc_fini(struct drm_device *dev) 164 { 165 struct tilcdc_drm_private *priv = dev->dev_private; 166 167 #ifdef CONFIG_CPU_FREQ 168 if (priv->freq_transition.notifier_call) 169 cpufreq_unregister_notifier(&priv->freq_transition, 170 CPUFREQ_TRANSITION_NOTIFIER); 171 #endif 172 173 if (priv->crtc) 174 tilcdc_crtc_shutdown(priv->crtc); 175 176 if (priv->is_registered) 177 drm_dev_unregister(dev); 178 179 drm_kms_helper_poll_fini(dev); 180 tilcdc_irq_uninstall(dev); 181 drm_mode_config_cleanup(dev); 182 183 if (priv->clk) 184 clk_put(priv->clk); 185 186 if (priv->mmio) 187 iounmap(priv->mmio); 188 189 if (priv->wq) { 190 flush_workqueue(priv->wq); 191 destroy_workqueue(priv->wq); 192 } 193 194 dev->dev_private = NULL; 195 196 pm_runtime_disable(dev->dev); 197 198 drm_dev_put(dev); 199 } 200 201 static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev) 202 { 203 struct drm_device *ddev; 204 struct platform_device *pdev = to_platform_device(dev); 205 struct device_node *node = dev->of_node; 206 struct tilcdc_drm_private *priv; 207 struct resource *res; 208 u32 bpp = 0; 209 int ret; 210 211 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 212 if (!priv) 213 return -ENOMEM; 214 215 ddev = drm_dev_alloc(ddrv, dev); 216 if (IS_ERR(ddev)) 217 return PTR_ERR(ddev); 218 219 ddev->dev_private = priv; 220 platform_set_drvdata(pdev, ddev); 221 drm_mode_config_init(ddev); 222 223 priv->is_componentized = 224 tilcdc_get_external_components(dev, NULL) > 0; 225 226 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 227 if (!priv->wq) { 228 ret = -ENOMEM; 229 goto init_failed; 230 } 231 232 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 233 if (!res) { 234 dev_err(dev, "failed to get memory resource\n"); 235 ret = -EINVAL; 236 goto init_failed; 237 } 238 239 priv->mmio = ioremap(res->start, resource_size(res)); 240 if (!priv->mmio) { 241 dev_err(dev, "failed to ioremap\n"); 242 ret = -ENOMEM; 243 goto init_failed; 244 } 245 246 priv->clk = clk_get(dev, "fck"); 247 if (IS_ERR(priv->clk)) { 248 dev_err(dev, "failed to get functional clock\n"); 249 ret = -ENODEV; 250 goto init_failed; 251 } 252 253 pm_runtime_enable(dev); 254 255 /* Determine LCD IP Version */ 256 pm_runtime_get_sync(dev); 257 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 258 case 0x4c100102: 259 priv->rev = 1; 260 break; 261 case 0x4f200800: 262 case 0x4f201000: 263 priv->rev = 2; 264 break; 265 default: 266 dev_warn(dev, "Unknown PID Reg value 0x%08x, " 267 "defaulting to LCD revision 1\n", 268 tilcdc_read(ddev, LCDC_PID_REG)); 269 priv->rev = 1; 270 break; 271 } 272 273 pm_runtime_put_sync(dev); 274 275 if (priv->rev == 1) { 276 DBG("Revision 1 LCDC supports only RGB565 format"); 277 priv->pixelformats = tilcdc_rev1_formats; 278 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 279 bpp = 16; 280 } else { 281 const char *str = "\0"; 282 283 of_property_read_string(node, "blue-and-red-wiring", &str); 284 if (0 == strcmp(str, "crossed")) { 285 DBG("Configured for crossed blue and red wires"); 286 priv->pixelformats = tilcdc_crossed_formats; 287 priv->num_pixelformats = 288 ARRAY_SIZE(tilcdc_crossed_formats); 289 bpp = 32; /* Choose bpp with RGB support for fbdef */ 290 } else if (0 == strcmp(str, "straight")) { 291 DBG("Configured for straight blue and red wires"); 292 priv->pixelformats = tilcdc_straight_formats; 293 priv->num_pixelformats = 294 ARRAY_SIZE(tilcdc_straight_formats); 295 bpp = 16; /* Choose bpp with RGB support for fbdef */ 296 } else { 297 DBG("Blue and red wiring '%s' unknown, use legacy mode", 298 str); 299 priv->pixelformats = tilcdc_legacy_formats; 300 priv->num_pixelformats = 301 ARRAY_SIZE(tilcdc_legacy_formats); 302 bpp = 16; /* This is just a guess */ 303 } 304 } 305 306 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 307 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 308 309 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 310 311 if (of_property_read_u32(node, "max-width", &priv->max_width)) { 312 if (priv->rev == 1) 313 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1; 314 else 315 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2; 316 } 317 318 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 319 320 if (of_property_read_u32(node, "max-pixelclock", 321 &priv->max_pixelclock)) 322 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 323 324 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 325 326 ret = tilcdc_crtc_create(ddev); 327 if (ret < 0) { 328 dev_err(dev, "failed to create crtc\n"); 329 goto init_failed; 330 } 331 modeset_init(ddev); 332 333 #ifdef CONFIG_CPU_FREQ 334 priv->freq_transition.notifier_call = cpufreq_transition; 335 ret = cpufreq_register_notifier(&priv->freq_transition, 336 CPUFREQ_TRANSITION_NOTIFIER); 337 if (ret) { 338 dev_err(dev, "failed to register cpufreq notifier\n"); 339 priv->freq_transition.notifier_call = NULL; 340 goto init_failed; 341 } 342 #endif 343 344 if (priv->is_componentized) { 345 ret = component_bind_all(dev, ddev); 346 if (ret < 0) 347 goto init_failed; 348 349 ret = tilcdc_add_component_encoder(ddev); 350 if (ret < 0) 351 goto init_failed; 352 } else { 353 ret = tilcdc_attach_external_device(ddev); 354 if (ret) 355 goto init_failed; 356 } 357 358 if (!priv->external_connector && 359 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { 360 dev_err(dev, "no encoders/connectors found\n"); 361 ret = -EPROBE_DEFER; 362 goto init_failed; 363 } 364 365 ret = drm_vblank_init(ddev, 1); 366 if (ret < 0) { 367 dev_err(dev, "failed to initialize vblank\n"); 368 goto init_failed; 369 } 370 371 ret = platform_get_irq(pdev, 0); 372 if (ret < 0) 373 goto init_failed; 374 priv->irq = ret; 375 376 ret = tilcdc_irq_install(ddev, priv->irq); 377 if (ret < 0) { 378 dev_err(dev, "failed to install IRQ handler\n"); 379 goto init_failed; 380 } 381 382 drm_mode_config_reset(ddev); 383 384 drm_kms_helper_poll_init(ddev); 385 386 ret = drm_dev_register(ddev, 0); 387 if (ret) 388 goto init_failed; 389 priv->is_registered = true; 390 391 drm_fbdev_generic_setup(ddev, bpp); 392 return 0; 393 394 init_failed: 395 tilcdc_fini(ddev); 396 397 return ret; 398 } 399 400 #if defined(CONFIG_DEBUG_FS) 401 static const struct { 402 const char *name; 403 uint8_t rev; 404 uint8_t save; 405 uint32_t reg; 406 } registers[] = { 407 #define REG(rev, save, reg) { #reg, rev, save, reg } 408 /* exists in revision 1: */ 409 REG(1, false, LCDC_PID_REG), 410 REG(1, true, LCDC_CTRL_REG), 411 REG(1, false, LCDC_STAT_REG), 412 REG(1, true, LCDC_RASTER_CTRL_REG), 413 REG(1, true, LCDC_RASTER_TIMING_0_REG), 414 REG(1, true, LCDC_RASTER_TIMING_1_REG), 415 REG(1, true, LCDC_RASTER_TIMING_2_REG), 416 REG(1, true, LCDC_DMA_CTRL_REG), 417 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 418 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 419 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 420 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 421 /* new in revision 2: */ 422 REG(2, false, LCDC_RAW_STAT_REG), 423 REG(2, false, LCDC_MASKED_STAT_REG), 424 REG(2, true, LCDC_INT_ENABLE_SET_REG), 425 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 426 REG(2, false, LCDC_END_OF_INT_IND_REG), 427 REG(2, true, LCDC_CLK_ENABLE_REG), 428 #undef REG 429 }; 430 431 #endif 432 433 #ifdef CONFIG_DEBUG_FS 434 static int tilcdc_regs_show(struct seq_file *m, void *arg) 435 { 436 struct drm_info_node *node = (struct drm_info_node *) m->private; 437 struct drm_device *dev = node->minor->dev; 438 struct tilcdc_drm_private *priv = dev->dev_private; 439 unsigned i; 440 441 pm_runtime_get_sync(dev->dev); 442 443 seq_printf(m, "revision: %d\n", priv->rev); 444 445 for (i = 0; i < ARRAY_SIZE(registers); i++) 446 if (priv->rev >= registers[i].rev) 447 seq_printf(m, "%s:\t %08x\n", registers[i].name, 448 tilcdc_read(dev, registers[i].reg)); 449 450 pm_runtime_put_sync(dev->dev); 451 452 return 0; 453 } 454 455 static int tilcdc_mm_show(struct seq_file *m, void *arg) 456 { 457 struct drm_info_node *node = (struct drm_info_node *) m->private; 458 struct drm_device *dev = node->minor->dev; 459 struct drm_printer p = drm_seq_file_printer(m); 460 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 461 return 0; 462 } 463 464 static struct drm_info_list tilcdc_debugfs_list[] = { 465 { "regs", tilcdc_regs_show, 0, NULL }, 466 { "mm", tilcdc_mm_show, 0, NULL }, 467 }; 468 469 static void tilcdc_debugfs_init(struct drm_minor *minor) 470 { 471 struct tilcdc_module *mod; 472 473 drm_debugfs_create_files(tilcdc_debugfs_list, 474 ARRAY_SIZE(tilcdc_debugfs_list), 475 minor->debugfs_root, minor); 476 477 list_for_each_entry(mod, &module_list, list) 478 if (mod->funcs->debugfs_init) 479 mod->funcs->debugfs_init(mod, minor); 480 } 481 #endif 482 483 DEFINE_DRM_GEM_CMA_FOPS(fops); 484 485 static const struct drm_driver tilcdc_driver = { 486 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 487 DRM_GEM_CMA_DRIVER_OPS, 488 #ifdef CONFIG_DEBUG_FS 489 .debugfs_init = tilcdc_debugfs_init, 490 #endif 491 .fops = &fops, 492 .name = "tilcdc", 493 .desc = "TI LCD Controller DRM", 494 .date = "20121205", 495 .major = 1, 496 .minor = 0, 497 }; 498 499 /* 500 * Power management: 501 */ 502 503 #ifdef CONFIG_PM_SLEEP 504 static int tilcdc_pm_suspend(struct device *dev) 505 { 506 struct drm_device *ddev = dev_get_drvdata(dev); 507 int ret = 0; 508 509 ret = drm_mode_config_helper_suspend(ddev); 510 511 /* Select sleep pin state */ 512 pinctrl_pm_select_sleep_state(dev); 513 514 return ret; 515 } 516 517 static int tilcdc_pm_resume(struct device *dev) 518 { 519 struct drm_device *ddev = dev_get_drvdata(dev); 520 521 /* Select default pin state */ 522 pinctrl_pm_select_default_state(dev); 523 return drm_mode_config_helper_resume(ddev); 524 } 525 #endif 526 527 static const struct dev_pm_ops tilcdc_pm_ops = { 528 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume) 529 }; 530 531 /* 532 * Platform driver: 533 */ 534 static int tilcdc_bind(struct device *dev) 535 { 536 return tilcdc_init(&tilcdc_driver, dev); 537 } 538 539 static void tilcdc_unbind(struct device *dev) 540 { 541 struct drm_device *ddev = dev_get_drvdata(dev); 542 543 /* Check if a subcomponent has already triggered the unloading. */ 544 if (!ddev->dev_private) 545 return; 546 547 tilcdc_fini(dev_get_drvdata(dev)); 548 } 549 550 static const struct component_master_ops tilcdc_comp_ops = { 551 .bind = tilcdc_bind, 552 .unbind = tilcdc_unbind, 553 }; 554 555 static int tilcdc_pdev_probe(struct platform_device *pdev) 556 { 557 struct component_match *match = NULL; 558 int ret; 559 560 /* bail out early if no DT data: */ 561 if (!pdev->dev.of_node) { 562 dev_err(&pdev->dev, "device-tree data is missing\n"); 563 return -ENXIO; 564 } 565 566 ret = tilcdc_get_external_components(&pdev->dev, &match); 567 if (ret < 0) 568 return ret; 569 else if (ret == 0) 570 return tilcdc_init(&tilcdc_driver, &pdev->dev); 571 else 572 return component_master_add_with_match(&pdev->dev, 573 &tilcdc_comp_ops, 574 match); 575 } 576 577 static int tilcdc_pdev_remove(struct platform_device *pdev) 578 { 579 int ret; 580 581 ret = tilcdc_get_external_components(&pdev->dev, NULL); 582 if (ret < 0) 583 return ret; 584 else if (ret == 0) 585 tilcdc_fini(platform_get_drvdata(pdev)); 586 else 587 component_master_del(&pdev->dev, &tilcdc_comp_ops); 588 589 return 0; 590 } 591 592 static struct of_device_id tilcdc_of_match[] = { 593 { .compatible = "ti,am33xx-tilcdc", }, 594 { .compatible = "ti,da850-tilcdc", }, 595 { }, 596 }; 597 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 598 599 static struct platform_driver tilcdc_platform_driver = { 600 .probe = tilcdc_pdev_probe, 601 .remove = tilcdc_pdev_remove, 602 .driver = { 603 .name = "tilcdc", 604 .pm = &tilcdc_pm_ops, 605 .of_match_table = tilcdc_of_match, 606 }, 607 }; 608 609 static int __init tilcdc_drm_init(void) 610 { 611 DBG("init"); 612 tilcdc_panel_init(); 613 return platform_driver_register(&tilcdc_platform_driver); 614 } 615 616 static void __exit tilcdc_drm_fini(void) 617 { 618 DBG("fini"); 619 platform_driver_unregister(&tilcdc_platform_driver); 620 tilcdc_panel_fini(); 621 } 622 623 module_init(tilcdc_drm_init); 624 module_exit(tilcdc_drm_fini); 625 626 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 627 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 628 MODULE_LICENSE("GPL"); 629