1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #define gf119_dmaobj(p) container_of((p), struct gf119_dmaobj, base)
25 #include "user.h"
26 
27 #include <core/client.h>
28 #include <core/gpuobj.h>
29 #include <subdev/fb.h>
30 
31 #include <nvif/cl0002.h>
32 #include <nvif/unpack.h>
33 
34 struct gf119_dmaobj {
35 	struct nvkm_dmaobj base;
36 	u32 flags0;
37 };
38 
39 static int
gf119_dmaobj_bind(struct nvkm_dmaobj * base,struct nvkm_gpuobj * parent,int align,struct nvkm_gpuobj ** pgpuobj)40 gf119_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,
41 		  int align, struct nvkm_gpuobj **pgpuobj)
42 {
43 	struct gf119_dmaobj *dmaobj = gf119_dmaobj(base);
44 	struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
45 	int ret;
46 
47 	ret = nvkm_gpuobj_new(device, 24, align, false, parent, pgpuobj);
48 	if (ret == 0) {
49 		nvkm_kmap(*pgpuobj);
50 		nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
51 		nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8);
52 		nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8);
53 		nvkm_wo32(*pgpuobj, 0x0c, 0x00000000);
54 		nvkm_wo32(*pgpuobj, 0x10, 0x00000000);
55 		nvkm_wo32(*pgpuobj, 0x14, 0x00000000);
56 		nvkm_done(*pgpuobj);
57 	}
58 
59 	return ret;
60 }
61 
62 static const struct nvkm_dmaobj_func
63 gf119_dmaobj_func = {
64 	.bind = gf119_dmaobj_bind,
65 };
66 
67 int
gf119_dmaobj_new(struct nvkm_dma * dma,const struct nvkm_oclass * oclass,void * data,u32 size,struct nvkm_dmaobj ** pdmaobj)68 gf119_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass,
69 		 void *data, u32 size, struct nvkm_dmaobj **pdmaobj)
70 {
71 	union {
72 		struct gf119_dma_v0 v0;
73 	} *args;
74 	struct nvkm_object *parent = oclass->parent;
75 	struct gf119_dmaobj *dmaobj;
76 	u32 kind, page;
77 	int ret;
78 
79 	if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
80 		return -ENOMEM;
81 	*pdmaobj = &dmaobj->base;
82 
83 	ret = nvkm_dmaobj_ctor(&gf119_dmaobj_func, dma, oclass,
84 			       &data, &size, &dmaobj->base);
85 	if (ret)
86 		return ret;
87 
88 	ret  = -ENOSYS;
89 	args = data;
90 
91 	nvif_ioctl(parent, "create gf119 dma size %d\n", size);
92 	if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
93 		nvif_ioctl(parent,
94 			   "create gf100 dma vers %d page %d kind %02x\n",
95 			   args->v0.version, args->v0.page, args->v0.kind);
96 		kind = args->v0.kind;
97 		page = args->v0.page;
98 	} else
99 	if (size == 0) {
100 		if (dmaobj->base.target != NV_MEM_TARGET_VM) {
101 			kind = GF119_DMA_V0_KIND_PITCH;
102 			page = GF119_DMA_V0_PAGE_SP;
103 		} else {
104 			kind = GF119_DMA_V0_KIND_VM;
105 			page = GF119_DMA_V0_PAGE_LP;
106 		}
107 	} else
108 		return ret;
109 
110 	if (page > 1)
111 		return -EINVAL;
112 	dmaobj->flags0 = (kind << 20) | (page << 6);
113 
114 	switch (dmaobj->base.target) {
115 	case NV_MEM_TARGET_VRAM:
116 		dmaobj->flags0 |= 0x00000009;
117 		break;
118 	case NV_MEM_TARGET_VM:
119 	case NV_MEM_TARGET_PCI:
120 	case NV_MEM_TARGET_PCI_NOSNOOP:
121 		/* XXX: don't currently know how to construct a real one
122 		 *      of these.  we only use them to represent pushbufs
123 		 *      on these chipsets, and the classes that use them
124 		 *      deal with the target themselves.
125 		 */
126 		break;
127 	default:
128 		return -EINVAL;
129 	}
130 
131 	return 0;
132 }
133