1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef __ADRENO_GPU_H__ 19 #define __ADRENO_GPU_H__ 20 21 #include <linux/firmware.h> 22 23 #include "msm_gpu.h" 24 25 #include "adreno_common.xml.h" 26 #include "adreno_pm4.xml.h" 27 28 struct adreno_rev { 29 uint8_t core; 30 uint8_t major; 31 uint8_t minor; 32 uint8_t patchid; 33 }; 34 35 #define ADRENO_REV(core, major, minor, patchid) \ 36 ((struct adreno_rev){ core, major, minor, patchid }) 37 38 struct adreno_gpu_funcs { 39 struct msm_gpu_funcs base; 40 }; 41 42 struct adreno_info; 43 44 struct adreno_rbmemptrs { 45 volatile uint32_t rptr; 46 volatile uint32_t wptr; 47 volatile uint32_t fence; 48 }; 49 50 struct adreno_gpu { 51 struct msm_gpu base; 52 struct adreno_rev rev; 53 const struct adreno_info *info; 54 uint32_t revn; /* numeric revision name */ 55 const struct adreno_gpu_funcs *funcs; 56 57 /* firmware: */ 58 const struct firmware *pm4, *pfp; 59 60 /* ringbuffer rptr/wptr: */ 61 // TODO should this be in msm_ringbuffer? I think it would be 62 // different for z180.. 63 struct adreno_rbmemptrs *memptrs; 64 struct drm_gem_object *memptrs_bo; 65 uint32_t memptrs_iova; 66 }; 67 #define to_adreno_gpu(x) container_of(x, struct adreno_gpu, base) 68 69 /* platform config data (ie. from DT, or pdata) */ 70 struct adreno_platform_config { 71 struct adreno_rev rev; 72 uint32_t fast_rate, slow_rate, bus_freq; 73 }; 74 75 #define ADRENO_IDLE_TIMEOUT (20 * 1000) 76 77 static inline bool adreno_is_a3xx(struct adreno_gpu *gpu) 78 { 79 return (gpu->revn >= 300) && (gpu->revn < 400); 80 } 81 82 static inline bool adreno_is_a305(struct adreno_gpu *gpu) 83 { 84 return gpu->revn == 305; 85 } 86 87 static inline bool adreno_is_a320(struct adreno_gpu *gpu) 88 { 89 return gpu->revn == 320; 90 } 91 92 static inline bool adreno_is_a330(struct adreno_gpu *gpu) 93 { 94 return gpu->revn == 330; 95 } 96 97 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); 98 int adreno_hw_init(struct msm_gpu *gpu); 99 uint32_t adreno_last_fence(struct msm_gpu *gpu); 100 void adreno_recover(struct msm_gpu *gpu); 101 int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, 102 struct msm_file_private *ctx); 103 void adreno_flush(struct msm_gpu *gpu); 104 void adreno_idle(struct msm_gpu *gpu); 105 #ifdef CONFIG_DEBUG_FS 106 void adreno_show(struct msm_gpu *gpu, struct seq_file *m); 107 #endif 108 void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords); 109 110 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 111 struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs, 112 struct adreno_rev rev); 113 void adreno_gpu_cleanup(struct adreno_gpu *gpu); 114 115 116 /* ringbuffer helpers (the parts that are adreno specific) */ 117 118 static inline void 119 OUT_PKT0(struct msm_ringbuffer *ring, uint16_t regindx, uint16_t cnt) 120 { 121 adreno_wait_ring(ring->gpu, cnt+1); 122 OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF)); 123 } 124 125 /* no-op packet: */ 126 static inline void 127 OUT_PKT2(struct msm_ringbuffer *ring) 128 { 129 adreno_wait_ring(ring->gpu, 1); 130 OUT_RING(ring, CP_TYPE2_PKT); 131 } 132 133 static inline void 134 OUT_PKT3(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt) 135 { 136 adreno_wait_ring(ring->gpu, cnt+1); 137 OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8)); 138 } 139 140 141 #endif /* __ADRENO_GPU_H__ */ 142