1 /* 2 * Copyright © 2012 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Ben Widawsky <ben@bwidawsk.net> 25 * 26 */ 27 28 #include <linux/device.h> 29 #include <linux/module.h> 30 #include <linux/stat.h> 31 #include <linux/sysfs.h> 32 33 #include "gt/intel_rc6.h" 34 #include "gt/intel_rps.h" 35 #include "gt/sysfs_engines.h" 36 37 #include "i915_drv.h" 38 #include "i915_sysfs.h" 39 #include "intel_pm.h" 40 41 static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) 42 { 43 struct drm_minor *minor = dev_get_drvdata(kdev); 44 return to_i915(minor->dev); 45 } 46 47 #ifdef CONFIG_PM 48 static u32 calc_residency(struct drm_i915_private *dev_priv, 49 i915_reg_t reg) 50 { 51 intel_wakeref_t wakeref; 52 u64 res = 0; 53 54 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) 55 res = intel_rc6_residency_us(&to_gt(dev_priv)->rc6, reg); 56 57 return DIV_ROUND_CLOSEST_ULL(res, 1000); 58 } 59 60 static ssize_t rc6_enable_show(struct device *kdev, 61 struct device_attribute *attr, char *buf) 62 { 63 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 64 unsigned int mask; 65 66 mask = 0; 67 if (HAS_RC6(dev_priv)) 68 mask |= BIT(0); 69 if (HAS_RC6p(dev_priv)) 70 mask |= BIT(1); 71 if (HAS_RC6pp(dev_priv)) 72 mask |= BIT(2); 73 74 return sysfs_emit(buf, "%x\n", mask); 75 } 76 77 static ssize_t rc6_residency_ms_show(struct device *kdev, 78 struct device_attribute *attr, char *buf) 79 { 80 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 81 u32 rc6_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6); 82 return sysfs_emit(buf, "%u\n", rc6_residency); 83 } 84 85 static ssize_t rc6p_residency_ms_show(struct device *kdev, 86 struct device_attribute *attr, char *buf) 87 { 88 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 89 u32 rc6p_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6p); 90 return sysfs_emit(buf, "%u\n", rc6p_residency); 91 } 92 93 static ssize_t rc6pp_residency_ms_show(struct device *kdev, 94 struct device_attribute *attr, char *buf) 95 { 96 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 97 u32 rc6pp_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6pp); 98 return sysfs_emit(buf, "%u\n", rc6pp_residency); 99 } 100 101 static ssize_t media_rc6_residency_ms_show(struct device *kdev, 102 struct device_attribute *attr, char *buf) 103 { 104 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 105 u32 rc6_residency = calc_residency(dev_priv, VLV_GT_MEDIA_RC6); 106 return sysfs_emit(buf, "%u\n", rc6_residency); 107 } 108 109 static DEVICE_ATTR_RO(rc6_enable); 110 static DEVICE_ATTR_RO(rc6_residency_ms); 111 static DEVICE_ATTR_RO(rc6p_residency_ms); 112 static DEVICE_ATTR_RO(rc6pp_residency_ms); 113 static DEVICE_ATTR_RO(media_rc6_residency_ms); 114 115 static struct attribute *rc6_attrs[] = { 116 &dev_attr_rc6_enable.attr, 117 &dev_attr_rc6_residency_ms.attr, 118 NULL 119 }; 120 121 static const struct attribute_group rc6_attr_group = { 122 .name = power_group_name, 123 .attrs = rc6_attrs 124 }; 125 126 static struct attribute *rc6p_attrs[] = { 127 &dev_attr_rc6p_residency_ms.attr, 128 &dev_attr_rc6pp_residency_ms.attr, 129 NULL 130 }; 131 132 static const struct attribute_group rc6p_attr_group = { 133 .name = power_group_name, 134 .attrs = rc6p_attrs 135 }; 136 137 static struct attribute *media_rc6_attrs[] = { 138 &dev_attr_media_rc6_residency_ms.attr, 139 NULL 140 }; 141 142 static const struct attribute_group media_rc6_attr_group = { 143 .name = power_group_name, 144 .attrs = media_rc6_attrs 145 }; 146 #endif 147 148 static int l3_access_valid(struct drm_i915_private *i915, loff_t offset) 149 { 150 if (!HAS_L3_DPF(i915)) 151 return -EPERM; 152 153 if (!IS_ALIGNED(offset, sizeof(u32))) 154 return -EINVAL; 155 156 if (offset >= GEN7_L3LOG_SIZE) 157 return -ENXIO; 158 159 return 0; 160 } 161 162 static ssize_t 163 i915_l3_read(struct file *filp, struct kobject *kobj, 164 struct bin_attribute *attr, char *buf, 165 loff_t offset, size_t count) 166 { 167 struct device *kdev = kobj_to_dev(kobj); 168 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 169 int slice = (int)(uintptr_t)attr->private; 170 int ret; 171 172 ret = l3_access_valid(i915, offset); 173 if (ret) 174 return ret; 175 176 count = round_down(count, sizeof(u32)); 177 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count); 178 memset(buf, 0, count); 179 180 spin_lock(&i915->gem.contexts.lock); 181 if (i915->l3_parity.remap_info[slice]) 182 memcpy(buf, 183 i915->l3_parity.remap_info[slice] + offset / sizeof(u32), 184 count); 185 spin_unlock(&i915->gem.contexts.lock); 186 187 return count; 188 } 189 190 static ssize_t 191 i915_l3_write(struct file *filp, struct kobject *kobj, 192 struct bin_attribute *attr, char *buf, 193 loff_t offset, size_t count) 194 { 195 struct device *kdev = kobj_to_dev(kobj); 196 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 197 int slice = (int)(uintptr_t)attr->private; 198 u32 *remap_info, *freeme = NULL; 199 struct i915_gem_context *ctx; 200 int ret; 201 202 ret = l3_access_valid(i915, offset); 203 if (ret) 204 return ret; 205 206 if (count < sizeof(u32)) 207 return -EINVAL; 208 209 remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL); 210 if (!remap_info) 211 return -ENOMEM; 212 213 spin_lock(&i915->gem.contexts.lock); 214 215 if (i915->l3_parity.remap_info[slice]) { 216 freeme = remap_info; 217 remap_info = i915->l3_parity.remap_info[slice]; 218 } else { 219 i915->l3_parity.remap_info[slice] = remap_info; 220 } 221 222 count = round_down(count, sizeof(u32)); 223 memcpy(remap_info + offset / sizeof(u32), buf, count); 224 225 /* NB: We defer the remapping until we switch to the context */ 226 list_for_each_entry(ctx, &i915->gem.contexts.list, link) 227 ctx->remap_slice |= BIT(slice); 228 229 spin_unlock(&i915->gem.contexts.lock); 230 kfree(freeme); 231 232 /* 233 * TODO: Ideally we really want a GPU reset here to make sure errors 234 * aren't propagated. Since I cannot find a stable way to reset the GPU 235 * at this point it is left as a TODO. 236 */ 237 238 return count; 239 } 240 241 static const struct bin_attribute dpf_attrs = { 242 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)}, 243 .size = GEN7_L3LOG_SIZE, 244 .read = i915_l3_read, 245 .write = i915_l3_write, 246 .mmap = NULL, 247 .private = (void *)0 248 }; 249 250 static const struct bin_attribute dpf_attrs_1 = { 251 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)}, 252 .size = GEN7_L3LOG_SIZE, 253 .read = i915_l3_read, 254 .write = i915_l3_write, 255 .mmap = NULL, 256 .private = (void *)1 257 }; 258 259 static ssize_t gt_act_freq_mhz_show(struct device *kdev, 260 struct device_attribute *attr, char *buf) 261 { 262 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 263 struct intel_rps *rps = &to_gt(i915)->rps; 264 265 return sysfs_emit(buf, "%d\n", intel_rps_read_actual_frequency(rps)); 266 } 267 268 static ssize_t gt_cur_freq_mhz_show(struct device *kdev, 269 struct device_attribute *attr, char *buf) 270 { 271 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 272 struct intel_rps *rps = &to_gt(i915)->rps; 273 274 return sysfs_emit(buf, "%d\n", intel_rps_get_requested_frequency(rps)); 275 } 276 277 static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) 278 { 279 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 280 struct intel_rps *rps = &to_gt(i915)->rps; 281 282 return sysfs_emit(buf, "%d\n", intel_rps_get_boost_frequency(rps)); 283 } 284 285 static ssize_t gt_boost_freq_mhz_store(struct device *kdev, 286 struct device_attribute *attr, 287 const char *buf, size_t count) 288 { 289 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 290 struct intel_rps *rps = &to_gt(dev_priv)->rps; 291 ssize_t ret; 292 u32 val; 293 294 ret = kstrtou32(buf, 0, &val); 295 if (ret) 296 return ret; 297 298 ret = intel_rps_set_boost_frequency(rps, val); 299 300 return ret ?: count; 301 } 302 303 static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev, 304 struct device_attribute *attr, char *buf) 305 { 306 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 307 struct intel_rps *rps = &to_gt(dev_priv)->rps; 308 309 return sysfs_emit(buf, "%d\n", intel_gpu_freq(rps, rps->efficient_freq)); 310 } 311 312 static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) 313 { 314 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 315 struct intel_gt *gt = to_gt(dev_priv); 316 struct intel_rps *rps = >->rps; 317 318 return sysfs_emit(buf, "%d\n", intel_rps_get_max_frequency(rps)); 319 } 320 321 static ssize_t gt_max_freq_mhz_store(struct device *kdev, 322 struct device_attribute *attr, 323 const char *buf, size_t count) 324 { 325 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 326 struct intel_gt *gt = to_gt(dev_priv); 327 struct intel_rps *rps = >->rps; 328 ssize_t ret; 329 u32 val; 330 331 ret = kstrtou32(buf, 0, &val); 332 if (ret) 333 return ret; 334 335 ret = intel_rps_set_max_frequency(rps, val); 336 337 return ret ?: count; 338 } 339 340 static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) 341 { 342 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 343 struct intel_gt *gt = to_gt(i915); 344 struct intel_rps *rps = >->rps; 345 346 return sysfs_emit(buf, "%d\n", intel_rps_get_min_frequency(rps)); 347 } 348 349 static ssize_t gt_min_freq_mhz_store(struct device *kdev, 350 struct device_attribute *attr, 351 const char *buf, size_t count) 352 { 353 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 354 struct intel_rps *rps = &to_gt(i915)->rps; 355 ssize_t ret; 356 u32 val; 357 358 ret = kstrtou32(buf, 0, &val); 359 if (ret) 360 return ret; 361 362 ret = intel_rps_set_min_frequency(rps, val); 363 364 return ret ?: count; 365 } 366 367 static DEVICE_ATTR_RO(gt_act_freq_mhz); 368 static DEVICE_ATTR_RO(gt_cur_freq_mhz); 369 static DEVICE_ATTR_RW(gt_boost_freq_mhz); 370 static DEVICE_ATTR_RW(gt_max_freq_mhz); 371 static DEVICE_ATTR_RW(gt_min_freq_mhz); 372 373 static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); 374 375 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf); 376 static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL); 377 static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL); 378 static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL); 379 380 /* For now we have a static number of RP states */ 381 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) 382 { 383 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 384 struct intel_rps *rps = &to_gt(dev_priv)->rps; 385 u32 val; 386 387 if (attr == &dev_attr_gt_RP0_freq_mhz) 388 val = intel_rps_get_rp0_frequency(rps); 389 else if (attr == &dev_attr_gt_RP1_freq_mhz) 390 val = intel_rps_get_rp1_frequency(rps); 391 else if (attr == &dev_attr_gt_RPn_freq_mhz) 392 val = intel_rps_get_rpn_frequency(rps); 393 else 394 BUG(); 395 396 return sysfs_emit(buf, "%d\n", val); 397 } 398 399 static const struct attribute * const gen6_attrs[] = { 400 &dev_attr_gt_act_freq_mhz.attr, 401 &dev_attr_gt_cur_freq_mhz.attr, 402 &dev_attr_gt_boost_freq_mhz.attr, 403 &dev_attr_gt_max_freq_mhz.attr, 404 &dev_attr_gt_min_freq_mhz.attr, 405 &dev_attr_gt_RP0_freq_mhz.attr, 406 &dev_attr_gt_RP1_freq_mhz.attr, 407 &dev_attr_gt_RPn_freq_mhz.attr, 408 NULL, 409 }; 410 411 static const struct attribute * const vlv_attrs[] = { 412 &dev_attr_gt_act_freq_mhz.attr, 413 &dev_attr_gt_cur_freq_mhz.attr, 414 &dev_attr_gt_boost_freq_mhz.attr, 415 &dev_attr_gt_max_freq_mhz.attr, 416 &dev_attr_gt_min_freq_mhz.attr, 417 &dev_attr_gt_RP0_freq_mhz.attr, 418 &dev_attr_gt_RP1_freq_mhz.attr, 419 &dev_attr_gt_RPn_freq_mhz.attr, 420 &dev_attr_vlv_rpe_freq_mhz.attr, 421 NULL, 422 }; 423 424 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) 425 426 static ssize_t error_state_read(struct file *filp, struct kobject *kobj, 427 struct bin_attribute *attr, char *buf, 428 loff_t off, size_t count) 429 { 430 431 struct device *kdev = kobj_to_dev(kobj); 432 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 433 struct i915_gpu_coredump *gpu; 434 ssize_t ret; 435 436 gpu = i915_first_error_state(i915); 437 if (IS_ERR(gpu)) { 438 ret = PTR_ERR(gpu); 439 } else if (gpu) { 440 ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count); 441 i915_gpu_coredump_put(gpu); 442 } else { 443 const char *str = "No error state collected\n"; 444 size_t len = strlen(str); 445 446 ret = min_t(size_t, count, len - off); 447 memcpy(buf, str + off, ret); 448 } 449 450 return ret; 451 } 452 453 static ssize_t error_state_write(struct file *file, struct kobject *kobj, 454 struct bin_attribute *attr, char *buf, 455 loff_t off, size_t count) 456 { 457 struct device *kdev = kobj_to_dev(kobj); 458 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); 459 460 drm_dbg(&dev_priv->drm, "Resetting error state\n"); 461 i915_reset_error_state(dev_priv); 462 463 return count; 464 } 465 466 static const struct bin_attribute error_state_attr = { 467 .attr.name = "error", 468 .attr.mode = S_IRUSR | S_IWUSR, 469 .size = 0, 470 .read = error_state_read, 471 .write = error_state_write, 472 }; 473 474 static void i915_setup_error_capture(struct device *kdev) 475 { 476 if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr)) 477 DRM_ERROR("error_state sysfs setup failed\n"); 478 } 479 480 static void i915_teardown_error_capture(struct device *kdev) 481 { 482 sysfs_remove_bin_file(&kdev->kobj, &error_state_attr); 483 } 484 #else 485 static void i915_setup_error_capture(struct device *kdev) {} 486 static void i915_teardown_error_capture(struct device *kdev) {} 487 #endif 488 489 void i915_setup_sysfs(struct drm_i915_private *dev_priv) 490 { 491 struct device *kdev = dev_priv->drm.primary->kdev; 492 int ret; 493 494 #ifdef CONFIG_PM 495 if (HAS_RC6(dev_priv)) { 496 ret = sysfs_merge_group(&kdev->kobj, 497 &rc6_attr_group); 498 if (ret) 499 drm_err(&dev_priv->drm, 500 "RC6 residency sysfs setup failed\n"); 501 } 502 if (HAS_RC6p(dev_priv)) { 503 ret = sysfs_merge_group(&kdev->kobj, 504 &rc6p_attr_group); 505 if (ret) 506 drm_err(&dev_priv->drm, 507 "RC6p residency sysfs setup failed\n"); 508 } 509 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 510 ret = sysfs_merge_group(&kdev->kobj, 511 &media_rc6_attr_group); 512 if (ret) 513 drm_err(&dev_priv->drm, 514 "Media RC6 residency sysfs setup failed\n"); 515 } 516 #endif 517 if (HAS_L3_DPF(dev_priv)) { 518 ret = device_create_bin_file(kdev, &dpf_attrs); 519 if (ret) 520 drm_err(&dev_priv->drm, 521 "l3 parity sysfs setup failed\n"); 522 523 if (NUM_L3_SLICES(dev_priv) > 1) { 524 ret = device_create_bin_file(kdev, 525 &dpf_attrs_1); 526 if (ret) 527 drm_err(&dev_priv->drm, 528 "l3 parity slice 1 setup failed\n"); 529 } 530 } 531 532 ret = 0; 533 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 534 ret = sysfs_create_files(&kdev->kobj, vlv_attrs); 535 else if (GRAPHICS_VER(dev_priv) >= 6) 536 ret = sysfs_create_files(&kdev->kobj, gen6_attrs); 537 if (ret) 538 drm_err(&dev_priv->drm, "RPS sysfs setup failed\n"); 539 540 i915_setup_error_capture(kdev); 541 542 intel_engines_add_sysfs(dev_priv); 543 } 544 545 void i915_teardown_sysfs(struct drm_i915_private *dev_priv) 546 { 547 struct device *kdev = dev_priv->drm.primary->kdev; 548 549 i915_teardown_error_capture(kdev); 550 551 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 552 sysfs_remove_files(&kdev->kobj, vlv_attrs); 553 else 554 sysfs_remove_files(&kdev->kobj, gen6_attrs); 555 device_remove_bin_file(kdev, &dpf_attrs_1); 556 device_remove_bin_file(kdev, &dpf_attrs); 557 #ifdef CONFIG_PM 558 sysfs_unmerge_group(&kdev->kobj, &rc6_attr_group); 559 sysfs_unmerge_group(&kdev->kobj, &rc6p_attr_group); 560 #endif 561 } 562