1459b2606SSuraj Kandpal // SPDX-License-Identifier: MIT
2459b2606SSuraj Kandpal /*
3459b2606SSuraj Kandpal  * Copyright © 2023 Intel Corporation
4459b2606SSuraj Kandpal  */
5459b2606SSuraj Kandpal 
6e5e1e6d2SAlan Previn #include "gt/intel_context.h"
7459b2606SSuraj Kandpal #include "gt/intel_engine_pm.h"
8459b2606SSuraj Kandpal #include "gt/intel_gpu_commands.h"
9459b2606SSuraj Kandpal #include "gt/intel_gt.h"
10459b2606SSuraj Kandpal #include "gt/intel_ring.h"
11459b2606SSuraj Kandpal #include "intel_gsc_uc_heci_cmd_submit.h"
12459b2606SSuraj Kandpal 
13459b2606SSuraj Kandpal struct gsc_heci_pkt {
14459b2606SSuraj Kandpal 	u64 addr_in;
15459b2606SSuraj Kandpal 	u32 size_in;
16459b2606SSuraj Kandpal 	u64 addr_out;
17459b2606SSuraj Kandpal 	u32 size_out;
18459b2606SSuraj Kandpal };
19459b2606SSuraj Kandpal 
emit_gsc_heci_pkt(struct i915_request * rq,struct gsc_heci_pkt * pkt)20459b2606SSuraj Kandpal static int emit_gsc_heci_pkt(struct i915_request *rq, struct gsc_heci_pkt *pkt)
21459b2606SSuraj Kandpal {
22459b2606SSuraj Kandpal 	u32 *cs;
23459b2606SSuraj Kandpal 
24459b2606SSuraj Kandpal 	cs = intel_ring_begin(rq, 8);
25459b2606SSuraj Kandpal 	if (IS_ERR(cs))
26459b2606SSuraj Kandpal 		return PTR_ERR(cs);
27459b2606SSuraj Kandpal 
28459b2606SSuraj Kandpal 	*cs++ = GSC_HECI_CMD_PKT;
29459b2606SSuraj Kandpal 	*cs++ = lower_32_bits(pkt->addr_in);
30459b2606SSuraj Kandpal 	*cs++ = upper_32_bits(pkt->addr_in);
31459b2606SSuraj Kandpal 	*cs++ = pkt->size_in;
32459b2606SSuraj Kandpal 	*cs++ = lower_32_bits(pkt->addr_out);
33459b2606SSuraj Kandpal 	*cs++ = upper_32_bits(pkt->addr_out);
34459b2606SSuraj Kandpal 	*cs++ = pkt->size_out;
35459b2606SSuraj Kandpal 	*cs++ = 0;
36459b2606SSuraj Kandpal 
37459b2606SSuraj Kandpal 	intel_ring_advance(rq, cs);
38459b2606SSuraj Kandpal 
39459b2606SSuraj Kandpal 	return 0;
40459b2606SSuraj Kandpal }
41459b2606SSuraj Kandpal 
intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc * gsc,u64 addr_in,u32 size_in,u64 addr_out,u32 size_out)42459b2606SSuraj Kandpal int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, u64 addr_in,
43459b2606SSuraj Kandpal 					u32 size_in, u64 addr_out,
44459b2606SSuraj Kandpal 					u32 size_out)
45459b2606SSuraj Kandpal {
46459b2606SSuraj Kandpal 	struct intel_context *ce = gsc->ce;
47459b2606SSuraj Kandpal 	struct i915_request *rq;
48459b2606SSuraj Kandpal 	struct gsc_heci_pkt pkt = {
49459b2606SSuraj Kandpal 	.addr_in = addr_in,
50459b2606SSuraj Kandpal 	.size_in = size_in,
51459b2606SSuraj Kandpal 	.addr_out = addr_out,
52459b2606SSuraj Kandpal 	.size_out = size_out
53459b2606SSuraj Kandpal 	};
54459b2606SSuraj Kandpal 	int err;
55459b2606SSuraj Kandpal 
56459b2606SSuraj Kandpal 	if (!ce)
57459b2606SSuraj Kandpal 		return -ENODEV;
58459b2606SSuraj Kandpal 
59459b2606SSuraj Kandpal 	rq = i915_request_create(ce);
60459b2606SSuraj Kandpal 	if (IS_ERR(rq))
61459b2606SSuraj Kandpal 		return PTR_ERR(rq);
62459b2606SSuraj Kandpal 
63459b2606SSuraj Kandpal 	if (ce->engine->emit_init_breadcrumb) {
64459b2606SSuraj Kandpal 		err = ce->engine->emit_init_breadcrumb(rq);
65459b2606SSuraj Kandpal 		if (err)
66459b2606SSuraj Kandpal 			goto out_rq;
67459b2606SSuraj Kandpal 	}
68459b2606SSuraj Kandpal 
69459b2606SSuraj Kandpal 	err = emit_gsc_heci_pkt(rq, &pkt);
70459b2606SSuraj Kandpal 
71459b2606SSuraj Kandpal 	if (err)
72459b2606SSuraj Kandpal 		goto out_rq;
73459b2606SSuraj Kandpal 
74459b2606SSuraj Kandpal 	err = ce->engine->emit_flush(rq, 0);
75459b2606SSuraj Kandpal 
76459b2606SSuraj Kandpal out_rq:
77459b2606SSuraj Kandpal 	i915_request_get(rq);
78459b2606SSuraj Kandpal 
79459b2606SSuraj Kandpal 	if (unlikely(err))
80459b2606SSuraj Kandpal 		i915_request_set_error_once(rq, err);
81459b2606SSuraj Kandpal 
82459b2606SSuraj Kandpal 	i915_request_add(rq);
83459b2606SSuraj Kandpal 
84459b2606SSuraj Kandpal 	if (!err && i915_request_wait(rq, 0, msecs_to_jiffies(500)) < 0)
85459b2606SSuraj Kandpal 		err = -ETIME;
86459b2606SSuraj Kandpal 
87459b2606SSuraj Kandpal 	i915_request_put(rq);
88459b2606SSuraj Kandpal 
89459b2606SSuraj Kandpal 	if (err)
90459b2606SSuraj Kandpal 		drm_err(&gsc_uc_to_gt(gsc)->i915->drm,
91459b2606SSuraj Kandpal 			"Request submission for GSC heci cmd failed (%d)\n",
92459b2606SSuraj Kandpal 			err);
93459b2606SSuraj Kandpal 
94459b2606SSuraj Kandpal 	return err;
95459b2606SSuraj Kandpal }
9618fd7f8aSSuraj Kandpal 
intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header * header,u8 heci_client_id,u32 message_size,u64 host_session_id)9718fd7f8aSSuraj Kandpal void intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header *header,
9818fd7f8aSSuraj Kandpal 					   u8 heci_client_id, u32 message_size,
9918fd7f8aSSuraj Kandpal 					   u64 host_session_id)
10018fd7f8aSSuraj Kandpal {
10118fd7f8aSSuraj Kandpal 	host_session_id &= ~HOST_SESSION_MASK;
10208872cb1SDaniele Ceraolo Spurio 	if (host_session_id && heci_client_id == HECI_MEADDRESS_PXP)
10318fd7f8aSSuraj Kandpal 		host_session_id |= HOST_SESSION_PXP_SINGLE;
10418fd7f8aSSuraj Kandpal 
10518fd7f8aSSuraj Kandpal 	header->validity_marker = GSC_HECI_VALIDITY_MARKER;
10618fd7f8aSSuraj Kandpal 	header->heci_client_id = heci_client_id;
10718fd7f8aSSuraj Kandpal 	header->host_session_handle = host_session_id;
10818fd7f8aSSuraj Kandpal 	header->header_version = MTL_GSC_HEADER_VERSION;
10918fd7f8aSSuraj Kandpal 	header->message_size = message_size;
11018fd7f8aSSuraj Kandpal }
111e5e1e6d2SAlan Previn 
112e5e1e6d2SAlan Previn static void
emit_gsc_heci_pkt_nonpriv(u32 * cmd,struct intel_gsc_heci_non_priv_pkt * pkt)113e5e1e6d2SAlan Previn emit_gsc_heci_pkt_nonpriv(u32 *cmd, struct intel_gsc_heci_non_priv_pkt *pkt)
114e5e1e6d2SAlan Previn {
115e5e1e6d2SAlan Previn 	*cmd++ = GSC_HECI_CMD_PKT;
116e5e1e6d2SAlan Previn 	*cmd++ = lower_32_bits(pkt->addr_in);
117e5e1e6d2SAlan Previn 	*cmd++ = upper_32_bits(pkt->addr_in);
118e5e1e6d2SAlan Previn 	*cmd++ = pkt->size_in;
119e5e1e6d2SAlan Previn 	*cmd++ = lower_32_bits(pkt->addr_out);
120e5e1e6d2SAlan Previn 	*cmd++ = upper_32_bits(pkt->addr_out);
121e5e1e6d2SAlan Previn 	*cmd++ = pkt->size_out;
122e5e1e6d2SAlan Previn 	*cmd++ = 0;
123e5e1e6d2SAlan Previn 	*cmd++ = MI_BATCH_BUFFER_END;
124e5e1e6d2SAlan Previn }
125e5e1e6d2SAlan Previn 
126e5e1e6d2SAlan Previn int
intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc * gsc,struct intel_context * ce,struct intel_gsc_heci_non_priv_pkt * pkt,u32 * cmd,int timeout_ms)127e5e1e6d2SAlan Previn intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc *gsc,
128e5e1e6d2SAlan Previn 				     struct intel_context *ce,
129e5e1e6d2SAlan Previn 				     struct intel_gsc_heci_non_priv_pkt *pkt,
130e5e1e6d2SAlan Previn 				     u32 *cmd, int timeout_ms)
131e5e1e6d2SAlan Previn {
132e5e1e6d2SAlan Previn 	struct intel_engine_cs *engine;
133e5e1e6d2SAlan Previn 	struct i915_gem_ww_ctx ww;
134e5e1e6d2SAlan Previn 	struct i915_request *rq;
135e5e1e6d2SAlan Previn 	int err, trials = 0;
136e5e1e6d2SAlan Previn 
137e5e1e6d2SAlan Previn 	i915_gem_ww_ctx_init(&ww, false);
138e5e1e6d2SAlan Previn retry:
139e5e1e6d2SAlan Previn 	err = i915_gem_object_lock(pkt->bb_vma->obj, &ww);
140e5e1e6d2SAlan Previn 	if (err)
141e5e1e6d2SAlan Previn 		goto out_ww;
142e5e1e6d2SAlan Previn 	err = i915_gem_object_lock(pkt->heci_pkt_vma->obj, &ww);
143e5e1e6d2SAlan Previn 	if (err)
144e5e1e6d2SAlan Previn 		goto out_ww;
145e5e1e6d2SAlan Previn 	err = intel_context_pin_ww(ce, &ww);
146e5e1e6d2SAlan Previn 	if (err)
147e5e1e6d2SAlan Previn 		goto out_ww;
148e5e1e6d2SAlan Previn 
149e5e1e6d2SAlan Previn 	rq = i915_request_create(ce);
150e5e1e6d2SAlan Previn 	if (IS_ERR(rq)) {
151e5e1e6d2SAlan Previn 		err = PTR_ERR(rq);
152e5e1e6d2SAlan Previn 		goto out_unpin_ce;
153e5e1e6d2SAlan Previn 	}
154e5e1e6d2SAlan Previn 
155e5e1e6d2SAlan Previn 	emit_gsc_heci_pkt_nonpriv(cmd, pkt);
156e5e1e6d2SAlan Previn 
157e5e1e6d2SAlan Previn 	err = i915_vma_move_to_active(pkt->bb_vma, rq, 0);
158e5e1e6d2SAlan Previn 	if (err)
159e5e1e6d2SAlan Previn 		goto out_rq;
160e5e1e6d2SAlan Previn 	err = i915_vma_move_to_active(pkt->heci_pkt_vma, rq, EXEC_OBJECT_WRITE);
161e5e1e6d2SAlan Previn 	if (err)
162e5e1e6d2SAlan Previn 		goto out_rq;
163e5e1e6d2SAlan Previn 
164e5e1e6d2SAlan Previn 	engine = rq->context->engine;
165e5e1e6d2SAlan Previn 	if (engine->emit_init_breadcrumb) {
166e5e1e6d2SAlan Previn 		err = engine->emit_init_breadcrumb(rq);
167e5e1e6d2SAlan Previn 		if (err)
168e5e1e6d2SAlan Previn 			goto out_rq;
169e5e1e6d2SAlan Previn 	}
170e5e1e6d2SAlan Previn 
171e5e1e6d2SAlan Previn 	err = engine->emit_bb_start(rq, i915_vma_offset(pkt->bb_vma), PAGE_SIZE, 0);
172e5e1e6d2SAlan Previn 	if (err)
173e5e1e6d2SAlan Previn 		goto out_rq;
174e5e1e6d2SAlan Previn 
175e5e1e6d2SAlan Previn 	err = ce->engine->emit_flush(rq, 0);
176e5e1e6d2SAlan Previn 	if (err)
177e5e1e6d2SAlan Previn 		drm_err(&gsc_uc_to_gt(gsc)->i915->drm,
178e5e1e6d2SAlan Previn 			"Failed emit-flush for gsc-heci-non-priv-pkterr=%d\n", err);
179e5e1e6d2SAlan Previn 
180e5e1e6d2SAlan Previn out_rq:
181e5e1e6d2SAlan Previn 	i915_request_get(rq);
182e5e1e6d2SAlan Previn 
183e5e1e6d2SAlan Previn 	if (unlikely(err))
184e5e1e6d2SAlan Previn 		i915_request_set_error_once(rq, err);
185e5e1e6d2SAlan Previn 
186e5e1e6d2SAlan Previn 	i915_request_add(rq);
187e5e1e6d2SAlan Previn 
188e5e1e6d2SAlan Previn 	if (!err) {
189e5e1e6d2SAlan Previn 		if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
190e5e1e6d2SAlan Previn 				      msecs_to_jiffies(timeout_ms)) < 0)
191e5e1e6d2SAlan Previn 			err = -ETIME;
192e5e1e6d2SAlan Previn 	}
193e5e1e6d2SAlan Previn 
194e5e1e6d2SAlan Previn 	i915_request_put(rq);
195e5e1e6d2SAlan Previn 
196e5e1e6d2SAlan Previn out_unpin_ce:
197e5e1e6d2SAlan Previn 	intel_context_unpin(ce);
198e5e1e6d2SAlan Previn out_ww:
199e5e1e6d2SAlan Previn 	if (err == -EDEADLK) {
200e5e1e6d2SAlan Previn 		err = i915_gem_ww_ctx_backoff(&ww);
201e5e1e6d2SAlan Previn 		if (!err) {
202e5e1e6d2SAlan Previn 			if (++trials < 10)
203e5e1e6d2SAlan Previn 				goto retry;
204e5e1e6d2SAlan Previn 			else
205*24335848SDan Carpenter 				err = -EAGAIN;
206e5e1e6d2SAlan Previn 		}
207e5e1e6d2SAlan Previn 	}
208e5e1e6d2SAlan Previn 	i915_gem_ww_ctx_fini(&ww);
209e5e1e6d2SAlan Previn 
210e5e1e6d2SAlan Previn 	return err;
211e5e1e6d2SAlan Previn }
212