1*24f90d66SChris Wilson /* SPDX-License-Identifier: MIT */ 2f899f786SChris Wilson /* 3f899f786SChris Wilson * Copyright © 2016 Intel Corporation 4f899f786SChris Wilson */ 5f899f786SChris Wilson 6f899f786SChris Wilson #ifndef __INTEL_GGTT_FENCING_H__ 7f899f786SChris Wilson #define __INTEL_GGTT_FENCING_H__ 8f899f786SChris Wilson 9f899f786SChris Wilson #include <linux/list.h> 10f899f786SChris Wilson #include <linux/types.h> 11f899f786SChris Wilson 1263baf4f3SChris Wilson #include "i915_active.h" 1363baf4f3SChris Wilson 14f899f786SChris Wilson struct drm_i915_gem_object; 15f899f786SChris Wilson struct i915_ggtt; 16f899f786SChris Wilson struct i915_vma; 17f899f786SChris Wilson struct intel_gt; 18f899f786SChris Wilson struct sg_table; 19f899f786SChris Wilson 20f899f786SChris Wilson #define I965_FENCE_PAGE 4096UL 21f899f786SChris Wilson 22f899f786SChris Wilson struct i915_fence_reg { 23f899f786SChris Wilson struct list_head link; 24f899f786SChris Wilson struct i915_ggtt *ggtt; 25f899f786SChris Wilson struct i915_vma *vma; 26f899f786SChris Wilson atomic_t pin_count; 2763baf4f3SChris Wilson struct i915_active active; 28f899f786SChris Wilson int id; 29f899f786SChris Wilson /** 30f899f786SChris Wilson * Whether the tiling parameters for the currently 31f899f786SChris Wilson * associated fence register have changed. Note that 32f899f786SChris Wilson * for the purposes of tracking tiling changes we also 33f899f786SChris Wilson * treat the unfenced register, the register slot that 34f899f786SChris Wilson * the object occupies whilst it executes a fenced 35f899f786SChris Wilson * command (such as BLT on gen2/3), as a "fence". 36f899f786SChris Wilson */ 37f899f786SChris Wilson bool dirty; 38725c9ee7SChris Wilson u32 start; 39725c9ee7SChris Wilson u32 size; 40725c9ee7SChris Wilson u32 tiling; 41725c9ee7SChris Wilson u32 stride; 42f899f786SChris Wilson }; 43f899f786SChris Wilson 44f899f786SChris Wilson struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt); 45f899f786SChris Wilson void i915_unreserve_fence(struct i915_fence_reg *fence); 46f899f786SChris Wilson 47f899f786SChris Wilson void intel_ggtt_restore_fences(struct i915_ggtt *ggtt); 48f899f786SChris Wilson 49f899f786SChris Wilson void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj, 50f899f786SChris Wilson struct sg_table *pages); 51f899f786SChris Wilson void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj, 52f899f786SChris Wilson struct sg_table *pages); 53f899f786SChris Wilson 54f899f786SChris Wilson void intel_ggtt_init_fences(struct i915_ggtt *ggtt); 550b6bc81dSChris Wilson void intel_ggtt_fini_fences(struct i915_ggtt *ggtt); 56f899f786SChris Wilson 57f899f786SChris Wilson void intel_gt_init_swizzling(struct intel_gt *gt); 58f899f786SChris Wilson 59f899f786SChris Wilson #endif 60