1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef __INTEL_HDCP_REGS_H__
7 #define __INTEL_HDCP_REGS_H__
8 
9 #include "intel_display_reg_defs.h"
10 
11 /* HDCP Key Registers */
12 #define HDCP_KEY_CONF			_MMIO(0x66c00)
13 #define  HDCP_AKSV_SEND_TRIGGER		REG_BIT(31)
14 #define  HDCP_CLEAR_KEYS_TRIGGER	REG_BIT(30)
15 #define  HDCP_KEY_LOAD_TRIGGER		REG_BIT(8)
16 #define HDCP_KEY_STATUS			_MMIO(0x66c04)
17 #define  HDCP_FUSE_IN_PROGRESS		REG_BIT(7)
18 #define  HDCP_FUSE_ERROR		REG_BIT(6)
19 #define  HDCP_FUSE_DONE			REG_BIT(5)
20 #define  HDCP_KEY_LOAD_STATUS		REG_BIT(1)
21 #define  HDCP_KEY_LOAD_DONE		REG_BIT(0)
22 #define HDCP_AKSV_LO			_MMIO(0x66c10)
23 #define HDCP_AKSV_HI			_MMIO(0x66c14)
24 
25 /* HDCP Repeater Registers */
26 #define HDCP_REP_CTL			_MMIO(0x66d00)
27 #define  HDCP_TRANSA_REP_PRESENT	REG_BIT(31)
28 #define  HDCP_TRANSB_REP_PRESENT	REG_BIT(30)
29 #define  HDCP_TRANSC_REP_PRESENT	REG_BIT(29)
30 #define  HDCP_TRANSD_REP_PRESENT	REG_BIT(28)
31 #define  HDCP_DDIB_REP_PRESENT		REG_BIT(30)
32 #define  HDCP_DDIA_REP_PRESENT		REG_BIT(29)
33 #define  HDCP_DDIC_REP_PRESENT		REG_BIT(28)
34 #define  HDCP_DDID_REP_PRESENT		REG_BIT(27)
35 #define  HDCP_DDIF_REP_PRESENT		REG_BIT(26)
36 #define  HDCP_DDIE_REP_PRESENT		REG_BIT(25)
37 #define  HDCP_TRANSA_SHA1_M0		(1 << 20)
38 #define  HDCP_TRANSB_SHA1_M0		(2 << 20)
39 #define  HDCP_TRANSC_SHA1_M0		(3 << 20)
40 #define  HDCP_TRANSD_SHA1_M0		(4 << 20)
41 #define  HDCP_DDIB_SHA1_M0		(1 << 20)
42 #define  HDCP_DDIA_SHA1_M0		(2 << 20)
43 #define  HDCP_DDIC_SHA1_M0		(3 << 20)
44 #define  HDCP_DDID_SHA1_M0		(4 << 20)
45 #define  HDCP_DDIF_SHA1_M0		(5 << 20)
46 #define  HDCP_DDIE_SHA1_M0		(6 << 20) /* Bspec says 5? */
47 #define  HDCP_SHA1_BUSY			REG_BIT(16)
48 #define  HDCP_SHA1_READY		REG_BIT(17)
49 #define  HDCP_SHA1_COMPLETE		REG_BIT(18)
50 #define  HDCP_SHA1_V_MATCH		REG_BIT(19)
51 #define  HDCP_SHA1_TEXT_32		(1 << 1)
52 #define  HDCP_SHA1_COMPLETE_HASH	(2 << 1)
53 #define  HDCP_SHA1_TEXT_24		(4 << 1)
54 #define  HDCP_SHA1_TEXT_16		(5 << 1)
55 #define  HDCP_SHA1_TEXT_8		(6 << 1)
56 #define  HDCP_SHA1_TEXT_0		(7 << 1)
57 #define HDCP_SHA_V_PRIME_H0		_MMIO(0x66d04)
58 #define HDCP_SHA_V_PRIME_H1		_MMIO(0x66d08)
59 #define HDCP_SHA_V_PRIME_H2		_MMIO(0x66d0C)
60 #define HDCP_SHA_V_PRIME_H3		_MMIO(0x66d10)
61 #define HDCP_SHA_V_PRIME_H4		_MMIO(0x66d14)
62 #define HDCP_SHA_V_PRIME(h)		_MMIO((0x66d04 + (h) * 4))
63 #define HDCP_SHA_TEXT			_MMIO(0x66d18)
64 
65 /* HDCP Auth Registers */
66 #define _PORTA_HDCP_AUTHENC		0x66800
67 #define _PORTB_HDCP_AUTHENC		0x66500
68 #define _PORTC_HDCP_AUTHENC		0x66600
69 #define _PORTD_HDCP_AUTHENC		0x66700
70 #define _PORTE_HDCP_AUTHENC		0x66A00
71 #define _PORTF_HDCP_AUTHENC		0x66900
72 #define _PORT_HDCP_AUTHENC(port, x)	_MMIO(_PICK(port, \
73 					  _PORTA_HDCP_AUTHENC, \
74 					  _PORTB_HDCP_AUTHENC, \
75 					  _PORTC_HDCP_AUTHENC, \
76 					  _PORTD_HDCP_AUTHENC, \
77 					  _PORTE_HDCP_AUTHENC, \
78 					  _PORTF_HDCP_AUTHENC) + (x))
79 #define PORT_HDCP_CONF(port)		_PORT_HDCP_AUTHENC(port, 0x0)
80 #define _TRANSA_HDCP_CONF		0x66400
81 #define _TRANSB_HDCP_CONF		0x66500
82 #define TRANS_HDCP_CONF(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
83 						    _TRANSB_HDCP_CONF)
84 #define HDCP_CONF(dev_priv, trans, port) \
85 					(GRAPHICS_VER(dev_priv) >= 12 ? \
86 					 TRANS_HDCP_CONF(trans) : \
87 					 PORT_HDCP_CONF(port))
88 
89 #define  HDCP_CONF_CAPTURE_AN		REG_BIT(0)
90 #define  HDCP_CONF_AUTH_AND_ENC		(REG_BIT(1) | REG_BIT(0))
91 #define PORT_HDCP_ANINIT(port)		_PORT_HDCP_AUTHENC(port, 0x4)
92 #define _TRANSA_HDCP_ANINIT		0x66404
93 #define _TRANSB_HDCP_ANINIT		0x66504
94 #define TRANS_HDCP_ANINIT(trans)	_MMIO_TRANS(trans, \
95 						    _TRANSA_HDCP_ANINIT, \
96 						    _TRANSB_HDCP_ANINIT)
97 #define HDCP_ANINIT(dev_priv, trans, port) \
98 					(GRAPHICS_VER(dev_priv) >= 12 ? \
99 					 TRANS_HDCP_ANINIT(trans) : \
100 					 PORT_HDCP_ANINIT(port))
101 
102 #define PORT_HDCP_ANLO(port)		_PORT_HDCP_AUTHENC(port, 0x8)
103 #define _TRANSA_HDCP_ANLO		0x66408
104 #define _TRANSB_HDCP_ANLO		0x66508
105 #define TRANS_HDCP_ANLO(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
106 						    _TRANSB_HDCP_ANLO)
107 #define HDCP_ANLO(dev_priv, trans, port) \
108 					(GRAPHICS_VER(dev_priv) >= 12 ? \
109 					 TRANS_HDCP_ANLO(trans) : \
110 					 PORT_HDCP_ANLO(port))
111 
112 #define PORT_HDCP_ANHI(port)		_PORT_HDCP_AUTHENC(port, 0xC)
113 #define _TRANSA_HDCP_ANHI		0x6640C
114 #define _TRANSB_HDCP_ANHI		0x6650C
115 #define TRANS_HDCP_ANHI(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
116 						    _TRANSB_HDCP_ANHI)
117 #define HDCP_ANHI(dev_priv, trans, port) \
118 					(GRAPHICS_VER(dev_priv) >= 12 ? \
119 					 TRANS_HDCP_ANHI(trans) : \
120 					 PORT_HDCP_ANHI(port))
121 
122 #define PORT_HDCP_BKSVLO(port)		_PORT_HDCP_AUTHENC(port, 0x10)
123 #define _TRANSA_HDCP_BKSVLO		0x66410
124 #define _TRANSB_HDCP_BKSVLO		0x66510
125 #define TRANS_HDCP_BKSVLO(trans)	_MMIO_TRANS(trans, \
126 						    _TRANSA_HDCP_BKSVLO, \
127 						    _TRANSB_HDCP_BKSVLO)
128 #define HDCP_BKSVLO(dev_priv, trans, port) \
129 					(GRAPHICS_VER(dev_priv) >= 12 ? \
130 					 TRANS_HDCP_BKSVLO(trans) : \
131 					 PORT_HDCP_BKSVLO(port))
132 
133 #define PORT_HDCP_BKSVHI(port)		_PORT_HDCP_AUTHENC(port, 0x14)
134 #define _TRANSA_HDCP_BKSVHI		0x66414
135 #define _TRANSB_HDCP_BKSVHI		0x66514
136 #define TRANS_HDCP_BKSVHI(trans)	_MMIO_TRANS(trans, \
137 						    _TRANSA_HDCP_BKSVHI, \
138 						    _TRANSB_HDCP_BKSVHI)
139 #define HDCP_BKSVHI(dev_priv, trans, port) \
140 					(GRAPHICS_VER(dev_priv) >= 12 ? \
141 					 TRANS_HDCP_BKSVHI(trans) : \
142 					 PORT_HDCP_BKSVHI(port))
143 
144 #define PORT_HDCP_RPRIME(port)		_PORT_HDCP_AUTHENC(port, 0x18)
145 #define _TRANSA_HDCP_RPRIME		0x66418
146 #define _TRANSB_HDCP_RPRIME		0x66518
147 #define TRANS_HDCP_RPRIME(trans)	_MMIO_TRANS(trans, \
148 						    _TRANSA_HDCP_RPRIME, \
149 						    _TRANSB_HDCP_RPRIME)
150 #define HDCP_RPRIME(dev_priv, trans, port) \
151 					(GRAPHICS_VER(dev_priv) >= 12 ? \
152 					 TRANS_HDCP_RPRIME(trans) : \
153 					 PORT_HDCP_RPRIME(port))
154 
155 #define PORT_HDCP_STATUS(port)		_PORT_HDCP_AUTHENC(port, 0x1C)
156 #define _TRANSA_HDCP_STATUS		0x6641C
157 #define _TRANSB_HDCP_STATUS		0x6651C
158 #define TRANS_HDCP_STATUS(trans)	_MMIO_TRANS(trans, \
159 						    _TRANSA_HDCP_STATUS, \
160 						    _TRANSB_HDCP_STATUS)
161 #define HDCP_STATUS(dev_priv, trans, port) \
162 					(GRAPHICS_VER(dev_priv) >= 12 ? \
163 					 TRANS_HDCP_STATUS(trans) : \
164 					 PORT_HDCP_STATUS(port))
165 
166 #define  HDCP_STATUS_STREAM_A_ENC	REG_BIT(31)
167 #define  HDCP_STATUS_STREAM_B_ENC	REG_BIT(30)
168 #define  HDCP_STATUS_STREAM_C_ENC	REG_BIT(29)
169 #define  HDCP_STATUS_STREAM_D_ENC	REG_BIT(28)
170 #define  HDCP_STATUS_AUTH		REG_BIT(21)
171 #define  HDCP_STATUS_ENC		REG_BIT(20)
172 #define  HDCP_STATUS_RI_MATCH		REG_BIT(19)
173 #define  HDCP_STATUS_R0_READY		REG_BIT(18)
174 #define  HDCP_STATUS_AN_READY		REG_BIT(17)
175 #define  HDCP_STATUS_CIPHER		REG_BIT(16)
176 #define  HDCP_STATUS_FRAME_CNT(x)	(((x) >> 8) & 0xff)
177 
178 /* HDCP2.2 Registers */
179 #define _PORTA_HDCP2_BASE		0x66800
180 #define _PORTB_HDCP2_BASE		0x66500
181 #define _PORTC_HDCP2_BASE		0x66600
182 #define _PORTD_HDCP2_BASE		0x66700
183 #define _PORTE_HDCP2_BASE		0x66A00
184 #define _PORTF_HDCP2_BASE		0x66900
185 #define _PORT_HDCP2_BASE(port, x)	_MMIO(_PICK((port), \
186 					  _PORTA_HDCP2_BASE, \
187 					  _PORTB_HDCP2_BASE, \
188 					  _PORTC_HDCP2_BASE, \
189 					  _PORTD_HDCP2_BASE, \
190 					  _PORTE_HDCP2_BASE, \
191 					  _PORTF_HDCP2_BASE) + (x))
192 
193 #define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
194 #define _TRANSA_HDCP2_AUTH		0x66498
195 #define _TRANSB_HDCP2_AUTH		0x66598
196 #define TRANS_HDCP2_AUTH(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_AUTH, \
197 						    _TRANSB_HDCP2_AUTH)
198 #define   AUTH_LINK_AUTHENTICATED	REG_BIT(31)
199 #define   AUTH_LINK_TYPE		REG_BIT(30)
200 #define   AUTH_FORCE_CLR_INPUTCTR	REG_BIT(19)
201 #define   AUTH_CLR_KEYS			REG_BIT(18)
202 #define HDCP2_AUTH(dev_priv, trans, port) \
203 					(GRAPHICS_VER(dev_priv) >= 12 ? \
204 					 TRANS_HDCP2_AUTH(trans) : \
205 					 PORT_HDCP2_AUTH(port))
206 
207 #define PORT_HDCP2_CTL(port)		_PORT_HDCP2_BASE(port, 0xB0)
208 #define _TRANSA_HDCP2_CTL		0x664B0
209 #define _TRANSB_HDCP2_CTL		0x665B0
210 #define TRANS_HDCP2_CTL(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_CTL, \
211 						    _TRANSB_HDCP2_CTL)
212 #define   CTL_LINK_ENCRYPTION_REQ	REG_BIT(31)
213 #define HDCP2_CTL(dev_priv, trans, port) \
214 					(GRAPHICS_VER(dev_priv) >= 12 ? \
215 					 TRANS_HDCP2_CTL(trans) : \
216 					 PORT_HDCP2_CTL(port))
217 
218 #define PORT_HDCP2_STATUS(port)		_PORT_HDCP2_BASE(port, 0xB4)
219 #define _TRANSA_HDCP2_STATUS		0x664B4
220 #define _TRANSB_HDCP2_STATUS		0x665B4
221 #define TRANS_HDCP2_STATUS(trans)	_MMIO_TRANS(trans, \
222 						    _TRANSA_HDCP2_STATUS, \
223 						    _TRANSB_HDCP2_STATUS)
224 #define   LINK_TYPE_STATUS		REG_BIT(22)
225 #define   LINK_AUTH_STATUS		REG_BIT(21)
226 #define   LINK_ENCRYPTION_STATUS	REG_BIT(20)
227 #define HDCP2_STATUS(dev_priv, trans, port) \
228 					(GRAPHICS_VER(dev_priv) >= 12 ? \
229 					 TRANS_HDCP2_STATUS(trans) : \
230 					 PORT_HDCP2_STATUS(port))
231 
232 #define _PIPEA_HDCP2_STREAM_STATUS	0x668C0
233 #define _PIPEB_HDCP2_STREAM_STATUS	0x665C0
234 #define _PIPEC_HDCP2_STREAM_STATUS	0x666C0
235 #define _PIPED_HDCP2_STREAM_STATUS	0x667C0
236 #define PIPE_HDCP2_STREAM_STATUS(pipe)		_MMIO(_PICK((pipe), \
237 						      _PIPEA_HDCP2_STREAM_STATUS, \
238 						      _PIPEB_HDCP2_STREAM_STATUS, \
239 						      _PIPEC_HDCP2_STREAM_STATUS, \
240 						      _PIPED_HDCP2_STREAM_STATUS))
241 
242 #define _TRANSA_HDCP2_STREAM_STATUS		0x664C0
243 #define _TRANSB_HDCP2_STREAM_STATUS		0x665C0
244 #define TRANS_HDCP2_STREAM_STATUS(trans)	_MMIO_TRANS(trans, \
245 						    _TRANSA_HDCP2_STREAM_STATUS, \
246 						    _TRANSB_HDCP2_STREAM_STATUS)
247 #define   STREAM_ENCRYPTION_STATUS	REG_BIT(31)
248 #define   STREAM_TYPE_STATUS		REG_BIT(30)
249 #define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
250 					(GRAPHICS_VER(dev_priv) >= 12 ? \
251 					 TRANS_HDCP2_STREAM_STATUS(trans) : \
252 					 PIPE_HDCP2_STREAM_STATUS(port))
253 
254 #define _PORTA_HDCP2_AUTH_STREAM		0x66F00
255 #define _PORTB_HDCP2_AUTH_STREAM		0x66F04
256 #define PORT_HDCP2_AUTH_STREAM(port)	_MMIO_PORT(port, \
257 						   _PORTA_HDCP2_AUTH_STREAM, \
258 						   _PORTB_HDCP2_AUTH_STREAM)
259 #define _TRANSA_HDCP2_AUTH_STREAM		0x66F00
260 #define _TRANSB_HDCP2_AUTH_STREAM		0x66F04
261 #define TRANS_HDCP2_AUTH_STREAM(trans)	_MMIO_TRANS(trans, \
262 						    _TRANSA_HDCP2_AUTH_STREAM, \
263 						    _TRANSB_HDCP2_AUTH_STREAM)
264 #define   AUTH_STREAM_TYPE		REG_BIT(31)
265 #define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
266 					(GRAPHICS_VER(dev_priv) >= 12 ? \
267 					 TRANS_HDCP2_AUTH_STREAM(trans) : \
268 					 PORT_HDCP2_AUTH_STREAM(port))
269 
270 #endif /* __INTEL_HDCP_REGS_H__ */
271