11c248b7dSInki Dae /* exynos_drm_crtc.c
21c248b7dSInki Dae  *
31c248b7dSInki Dae  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
41c248b7dSInki Dae  * Authors:
51c248b7dSInki Dae  *	Inki Dae <inki.dae@samsung.com>
61c248b7dSInki Dae  *	Joonyoung Shim <jy0922.shim@samsung.com>
71c248b7dSInki Dae  *	Seung-Woo Kim <sw0312.kim@samsung.com>
81c248b7dSInki Dae  *
91c248b7dSInki Dae  * Permission is hereby granted, free of charge, to any person obtaining a
101c248b7dSInki Dae  * copy of this software and associated documentation files (the "Software"),
111c248b7dSInki Dae  * to deal in the Software without restriction, including without limitation
121c248b7dSInki Dae  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
131c248b7dSInki Dae  * and/or sell copies of the Software, and to permit persons to whom the
141c248b7dSInki Dae  * Software is furnished to do so, subject to the following conditions:
151c248b7dSInki Dae  *
161c248b7dSInki Dae  * The above copyright notice and this permission notice (including the next
171c248b7dSInki Dae  * paragraph) shall be included in all copies or substantial portions of the
181c248b7dSInki Dae  * Software.
191c248b7dSInki Dae  *
201c248b7dSInki Dae  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
211c248b7dSInki Dae  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
221c248b7dSInki Dae  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
231c248b7dSInki Dae  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
241c248b7dSInki Dae  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
251c248b7dSInki Dae  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
261c248b7dSInki Dae  * OTHER DEALINGS IN THE SOFTWARE.
271c248b7dSInki Dae  */
281c248b7dSInki Dae 
291c248b7dSInki Dae #include "drmP.h"
301c248b7dSInki Dae #include "drm_crtc_helper.h"
311c248b7dSInki Dae 
322c871127SInki Dae #include "exynos_drm_crtc.h"
331c248b7dSInki Dae #include "exynos_drm_drv.h"
341c248b7dSInki Dae #include "exynos_drm_fb.h"
351c248b7dSInki Dae #include "exynos_drm_encoder.h"
362c871127SInki Dae #include "exynos_drm_gem.h"
371c248b7dSInki Dae 
381c248b7dSInki Dae #define to_exynos_crtc(x)	container_of(x, struct exynos_drm_crtc,\
391c248b7dSInki Dae 				drm_crtc)
401c248b7dSInki Dae 
411c248b7dSInki Dae /*
421c248b7dSInki Dae  * Exynos specific crtc structure.
431c248b7dSInki Dae  *
441c248b7dSInki Dae  * @drm_crtc: crtc object.
451c248b7dSInki Dae  * @overlay: contain information common to display controller and hdmi and
461c248b7dSInki Dae  *	contents of this overlay object would be copied to sub driver size.
471c248b7dSInki Dae  * @pipe: a crtc index created at load() with a new crtc object creation
481c248b7dSInki Dae  *	and the crtc object would be set to private->crtc array
491c248b7dSInki Dae  *	to get a crtc object corresponding to this pipe from private->crtc
501c248b7dSInki Dae  *	array when irq interrupt occured. the reason of using this pipe is that
511c248b7dSInki Dae  *	drm framework doesn't support multiple irq yet.
521c248b7dSInki Dae  *	we can refer to the crtc to current hardware interrupt occured through
531c248b7dSInki Dae  *	this pipe value.
54ec05da95SInki Dae  * @dpms: store the crtc dpms value
551c248b7dSInki Dae  */
561c248b7dSInki Dae struct exynos_drm_crtc {
571c248b7dSInki Dae 	struct drm_crtc			drm_crtc;
581c248b7dSInki Dae 	struct exynos_drm_overlay	overlay;
591c248b7dSInki Dae 	unsigned int			pipe;
60ec05da95SInki Dae 	unsigned int			dpms;
611c248b7dSInki Dae };
621c248b7dSInki Dae 
638e9cc6a1SInki Dae static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
641c248b7dSInki Dae {
651c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
661c248b7dSInki Dae 	struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
671c248b7dSInki Dae 
681c248b7dSInki Dae 	exynos_drm_fn_encoder(crtc, overlay,
691c248b7dSInki Dae 			exynos_drm_encoder_crtc_mode_set);
70d2716c89SJoonyoung Shim 	exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
71d2716c89SJoonyoung Shim 			exynos_drm_encoder_crtc_commit);
721c248b7dSInki Dae }
731c248b7dSInki Dae 
742c871127SInki Dae int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
751c248b7dSInki Dae 			      struct drm_framebuffer *fb,
761c248b7dSInki Dae 			      struct drm_display_mode *mode,
771c248b7dSInki Dae 			      struct exynos_drm_crtc_pos *pos)
781c248b7dSInki Dae {
792c871127SInki Dae 	struct exynos_drm_gem_buf *buffer;
8019c8b834SInki Dae 	unsigned int actual_w;
8119c8b834SInki Dae 	unsigned int actual_h;
82229d3534SSeung-Woo Kim 	int nr = exynos_drm_format_num_buffers(fb->pixel_format);
83229d3534SSeung-Woo Kim 	int i;
841c248b7dSInki Dae 
85229d3534SSeung-Woo Kim 	for (i = 0; i < nr; i++) {
86229d3534SSeung-Woo Kim 		buffer = exynos_drm_fb_buffer(fb, i);
872c871127SInki Dae 		if (!buffer) {
88229d3534SSeung-Woo Kim 			DRM_LOG_KMS("buffer is null\n");
8919c8b834SInki Dae 			return -EFAULT;
9019c8b834SInki Dae 		}
911c248b7dSInki Dae 
92229d3534SSeung-Woo Kim 		overlay->dma_addr[i] = buffer->dma_addr;
93229d3534SSeung-Woo Kim 		overlay->vaddr[i] = buffer->kvaddr;
941c248b7dSInki Dae 
95229d3534SSeung-Woo Kim 		DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
96229d3534SSeung-Woo Kim 				i, (unsigned long)overlay->vaddr[i],
97229d3534SSeung-Woo Kim 				(unsigned long)overlay->dma_addr[i]);
98229d3534SSeung-Woo Kim 	}
991c248b7dSInki Dae 
10019c8b834SInki Dae 	actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
10119c8b834SInki Dae 	actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
10219c8b834SInki Dae 
10319c8b834SInki Dae 	/* set drm framebuffer data. */
10419c8b834SInki Dae 	overlay->fb_x = pos->fb_x;
10519c8b834SInki Dae 	overlay->fb_y = pos->fb_y;
10619c8b834SInki Dae 	overlay->fb_width = fb->width;
10719c8b834SInki Dae 	overlay->fb_height = fb->height;
1080d8071eeSSeung-Woo Kim 	overlay->src_width = pos->src_w;
1090d8071eeSSeung-Woo Kim 	overlay->src_height = pos->src_h;
1101c248b7dSInki Dae 	overlay->bpp = fb->bits_per_pixel;
11101f2c773SVille Syrjälä 	overlay->pitch = fb->pitches[0];
112229d3534SSeung-Woo Kim 	overlay->pixel_format = fb->pixel_format;
11319c8b834SInki Dae 
11419c8b834SInki Dae 	/* set overlay range to be displayed. */
11519c8b834SInki Dae 	overlay->crtc_x = pos->crtc_x;
11619c8b834SInki Dae 	overlay->crtc_y = pos->crtc_y;
11719c8b834SInki Dae 	overlay->crtc_width = actual_w;
11819c8b834SInki Dae 	overlay->crtc_height = actual_h;
11919c8b834SInki Dae 
12019c8b834SInki Dae 	/* set drm mode data. */
12119c8b834SInki Dae 	overlay->mode_width = mode->hdisplay;
12219c8b834SInki Dae 	overlay->mode_height = mode->vdisplay;
12319c8b834SInki Dae 	overlay->refresh = mode->vrefresh;
12419c8b834SInki Dae 	overlay->scan_flag = mode->flags;
1251c248b7dSInki Dae 
1261c248b7dSInki Dae 	DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
12719c8b834SInki Dae 			overlay->crtc_x, overlay->crtc_y,
12819c8b834SInki Dae 			overlay->crtc_width, overlay->crtc_height);
1291c248b7dSInki Dae 
13019c8b834SInki Dae 	return 0;
1311c248b7dSInki Dae }
1321c248b7dSInki Dae 
1331c248b7dSInki Dae static int exynos_drm_crtc_update(struct drm_crtc *crtc)
1341c248b7dSInki Dae {
1351c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc;
1361c248b7dSInki Dae 	struct exynos_drm_overlay *overlay;
1371c248b7dSInki Dae 	struct exynos_drm_crtc_pos pos;
1381c248b7dSInki Dae 	struct drm_display_mode *mode = &crtc->mode;
1391c248b7dSInki Dae 	struct drm_framebuffer *fb = crtc->fb;
1401c248b7dSInki Dae 
1411c248b7dSInki Dae 	if (!mode || !fb)
1421c248b7dSInki Dae 		return -EINVAL;
1431c248b7dSInki Dae 
1441c248b7dSInki Dae 	exynos_crtc = to_exynos_crtc(crtc);
1451c248b7dSInki Dae 	overlay = &exynos_crtc->overlay;
1461c248b7dSInki Dae 
1471c248b7dSInki Dae 	memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
14819c8b834SInki Dae 
14919c8b834SInki Dae 	/* it means the offset of framebuffer to be displayed. */
1501c248b7dSInki Dae 	pos.fb_x = crtc->x;
1511c248b7dSInki Dae 	pos.fb_y = crtc->y;
15219c8b834SInki Dae 
15319c8b834SInki Dae 	/* OSD position to be displayed. */
15419c8b834SInki Dae 	pos.crtc_x = 0;
15519c8b834SInki Dae 	pos.crtc_y = 0;
1561c248b7dSInki Dae 	pos.crtc_w = fb->width - crtc->x;
1571c248b7dSInki Dae 	pos.crtc_h = fb->height - crtc->y;
1580d8071eeSSeung-Woo Kim 	pos.src_w = pos.crtc_w;
1590d8071eeSSeung-Woo Kim 	pos.src_h = pos.crtc_h;
1601c248b7dSInki Dae 
16119c8b834SInki Dae 	return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
1621c248b7dSInki Dae }
1631c248b7dSInki Dae 
1641c248b7dSInki Dae static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
1651c248b7dSInki Dae {
166ec05da95SInki Dae 	struct drm_device *dev = crtc->dev;
167d2716c89SJoonyoung Shim 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
1681c248b7dSInki Dae 
169d2716c89SJoonyoung Shim 	DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
170d2716c89SJoonyoung Shim 
171ec05da95SInki Dae 	if (exynos_crtc->dpms == mode) {
172ec05da95SInki Dae 		DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
173ec05da95SInki Dae 		return;
174ec05da95SInki Dae 	}
175ec05da95SInki Dae 
176ec05da95SInki Dae 	mutex_lock(&dev->struct_mutex);
177ec05da95SInki Dae 
178d2716c89SJoonyoung Shim 	switch (mode) {
179d2716c89SJoonyoung Shim 	case DRM_MODE_DPMS_ON:
180ec05da95SInki Dae 		exynos_drm_fn_encoder(crtc, &mode,
181ec05da95SInki Dae 				exynos_drm_encoder_crtc_dpms);
182ec05da95SInki Dae 		exynos_crtc->dpms = mode;
183d2716c89SJoonyoung Shim 		break;
184d2716c89SJoonyoung Shim 	case DRM_MODE_DPMS_STANDBY:
185d2716c89SJoonyoung Shim 	case DRM_MODE_DPMS_SUSPEND:
186d2716c89SJoonyoung Shim 	case DRM_MODE_DPMS_OFF:
187ec05da95SInki Dae 		exynos_drm_fn_encoder(crtc, &mode,
188ec05da95SInki Dae 				exynos_drm_encoder_crtc_dpms);
189ec05da95SInki Dae 		exynos_crtc->dpms = mode;
190d2716c89SJoonyoung Shim 		break;
191d2716c89SJoonyoung Shim 	default:
192ec05da95SInki Dae 		DRM_ERROR("unspecified mode %d\n", mode);
193d2716c89SJoonyoung Shim 		break;
194d2716c89SJoonyoung Shim 	}
195ec05da95SInki Dae 
196ec05da95SInki Dae 	mutex_unlock(&dev->struct_mutex);
1971c248b7dSInki Dae }
1981c248b7dSInki Dae 
1991c248b7dSInki Dae static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
2001c248b7dSInki Dae {
2011c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2021c248b7dSInki Dae 
2031c248b7dSInki Dae 	/* drm framework doesn't check NULL. */
2041c248b7dSInki Dae }
2051c248b7dSInki Dae 
2061c248b7dSInki Dae static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
2071c248b7dSInki Dae {
208d2716c89SJoonyoung Shim 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
209d2716c89SJoonyoung Shim 
2101c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2111c248b7dSInki Dae 
212ec05da95SInki Dae 	/*
213ec05da95SInki Dae 	 * when set_crtc is requested from user or at booting time,
214ec05da95SInki Dae 	 * crtc->commit would be called without dpms call so if dpms is
215ec05da95SInki Dae 	 * no power on then crtc->dpms should be called
216ec05da95SInki Dae 	 * with DRM_MODE_DPMS_ON for the hardware power to be on.
217ec05da95SInki Dae 	 */
218ec05da95SInki Dae 	if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
219ec05da95SInki Dae 		int mode = DRM_MODE_DPMS_ON;
220ec05da95SInki Dae 
221ec05da95SInki Dae 		/*
222ec05da95SInki Dae 		 * enable hardware(power on) to all encoders hdmi connected
223ec05da95SInki Dae 		 * to current crtc.
224ec05da95SInki Dae 		 */
225ec05da95SInki Dae 		exynos_drm_crtc_dpms(crtc, mode);
226ec05da95SInki Dae 		/*
227ec05da95SInki Dae 		 * enable dma to all encoders connected to current crtc and
228ec05da95SInki Dae 		 * lcd panel.
229ec05da95SInki Dae 		 */
230ec05da95SInki Dae 		exynos_drm_fn_encoder(crtc, &mode,
231ec05da95SInki Dae 					exynos_drm_encoder_dpms_from_crtc);
232ec05da95SInki Dae 	}
233ec05da95SInki Dae 
234d2716c89SJoonyoung Shim 	exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
235d2716c89SJoonyoung Shim 			exynos_drm_encoder_crtc_commit);
2361c248b7dSInki Dae }
2371c248b7dSInki Dae 
2381c248b7dSInki Dae static bool
2391c248b7dSInki Dae exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
240e811f5aeSLaurent Pinchart 			    const struct drm_display_mode *mode,
2411c248b7dSInki Dae 			    struct drm_display_mode *adjusted_mode)
2421c248b7dSInki Dae {
2431c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2441c248b7dSInki Dae 
2451c248b7dSInki Dae 	/* drm framework doesn't check NULL */
2461c248b7dSInki Dae 	return true;
2471c248b7dSInki Dae }
2481c248b7dSInki Dae 
2491c248b7dSInki Dae static int
2501c248b7dSInki Dae exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
2511c248b7dSInki Dae 			  struct drm_display_mode *adjusted_mode, int x, int y,
2521c248b7dSInki Dae 			  struct drm_framebuffer *old_fb)
2531c248b7dSInki Dae {
254aeb29224SJoonyoung Shim 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
255aeb29224SJoonyoung Shim 	struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
256aeb29224SJoonyoung Shim 	int ret;
257aeb29224SJoonyoung Shim 
2581c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2591c248b7dSInki Dae 
2601de425b0SInki Dae 	/*
2611de425b0SInki Dae 	 * copy the mode data adjusted by mode_fixup() into crtc->mode
2621de425b0SInki Dae 	 * so that hardware can be seet to proper mode.
2631de425b0SInki Dae 	 */
2641de425b0SInki Dae 	memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
2651c248b7dSInki Dae 
266aeb29224SJoonyoung Shim 	ret = exynos_drm_crtc_update(crtc);
267aeb29224SJoonyoung Shim 	if (ret)
268aeb29224SJoonyoung Shim 		return ret;
269aeb29224SJoonyoung Shim 
270aeb29224SJoonyoung Shim 	exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_crtc_mode_set);
271aeb29224SJoonyoung Shim 
272aeb29224SJoonyoung Shim 	return 0;
2731c248b7dSInki Dae }
2741c248b7dSInki Dae 
2751c248b7dSInki Dae static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
2761c248b7dSInki Dae 					  struct drm_framebuffer *old_fb)
2771c248b7dSInki Dae {
2781c248b7dSInki Dae 	int ret;
2791c248b7dSInki Dae 
2801c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2811c248b7dSInki Dae 
2821c248b7dSInki Dae 	ret = exynos_drm_crtc_update(crtc);
2831c248b7dSInki Dae 	if (ret)
2841c248b7dSInki Dae 		return ret;
2851c248b7dSInki Dae 
2861c248b7dSInki Dae 	exynos_drm_crtc_apply(crtc);
2871c248b7dSInki Dae 
2881c248b7dSInki Dae 	return ret;
2891c248b7dSInki Dae }
2901c248b7dSInki Dae 
2911c248b7dSInki Dae static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
2921c248b7dSInki Dae {
2931c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
2941c248b7dSInki Dae 	/* drm framework doesn't check NULL */
2951c248b7dSInki Dae }
2961c248b7dSInki Dae 
2971c248b7dSInki Dae static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
2981c248b7dSInki Dae 	.dpms		= exynos_drm_crtc_dpms,
2991c248b7dSInki Dae 	.prepare	= exynos_drm_crtc_prepare,
3001c248b7dSInki Dae 	.commit		= exynos_drm_crtc_commit,
3011c248b7dSInki Dae 	.mode_fixup	= exynos_drm_crtc_mode_fixup,
3021c248b7dSInki Dae 	.mode_set	= exynos_drm_crtc_mode_set,
3031c248b7dSInki Dae 	.mode_set_base	= exynos_drm_crtc_mode_set_base,
3041c248b7dSInki Dae 	.load_lut	= exynos_drm_crtc_load_lut,
3051c248b7dSInki Dae };
3061c248b7dSInki Dae 
3071c248b7dSInki Dae static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
3081c248b7dSInki Dae 				      struct drm_framebuffer *fb,
3091c248b7dSInki Dae 				      struct drm_pending_vblank_event *event)
3101c248b7dSInki Dae {
3111c248b7dSInki Dae 	struct drm_device *dev = crtc->dev;
3121c248b7dSInki Dae 	struct exynos_drm_private *dev_priv = dev->dev_private;
3131c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
3141c248b7dSInki Dae 	struct drm_framebuffer *old_fb = crtc->fb;
3151c248b7dSInki Dae 	int ret = -EINVAL;
3161c248b7dSInki Dae 
3171c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
3181c248b7dSInki Dae 
3191c248b7dSInki Dae 	mutex_lock(&dev->struct_mutex);
3201c248b7dSInki Dae 
321ccf4d883SInki Dae 	if (event) {
322ccf4d883SInki Dae 		/*
323ccf4d883SInki Dae 		 * the pipe from user always is 0 so we can set pipe number
324ccf4d883SInki Dae 		 * of current owner to event.
325ccf4d883SInki Dae 		 */
326ccf4d883SInki Dae 		event->pipe = exynos_crtc->pipe;
327ccf4d883SInki Dae 
3281c248b7dSInki Dae 		ret = drm_vblank_get(dev, exynos_crtc->pipe);
3291c248b7dSInki Dae 		if (ret) {
3301c248b7dSInki Dae 			DRM_DEBUG("failed to acquire vblank counter\n");
331ccf4d883SInki Dae 			list_del(&event->base.link);
332ccf4d883SInki Dae 
3331c248b7dSInki Dae 			goto out;
3341c248b7dSInki Dae 		}
3351c248b7dSInki Dae 
336c5614ae3SInki Dae 		list_add_tail(&event->base.link,
337c5614ae3SInki Dae 				&dev_priv->pageflip_event_list);
338c5614ae3SInki Dae 
3391c248b7dSInki Dae 		crtc->fb = fb;
3401c248b7dSInki Dae 		ret = exynos_drm_crtc_update(crtc);
3411c248b7dSInki Dae 		if (ret) {
3421c248b7dSInki Dae 			crtc->fb = old_fb;
3431c248b7dSInki Dae 			drm_vblank_put(dev, exynos_crtc->pipe);
344ccf4d883SInki Dae 			list_del(&event->base.link);
3451c248b7dSInki Dae 
3461c248b7dSInki Dae 			goto out;
3471c248b7dSInki Dae 		}
3481c248b7dSInki Dae 
349f6b98252SInki Dae 		/*
350f6b98252SInki Dae 		 * the values related to a buffer of the drm framebuffer
351f6b98252SInki Dae 		 * to be applied should be set at here. because these values
352ccf4d883SInki Dae 		 * first, are set to shadow registers and then to
353f6b98252SInki Dae 		 * real registers at vsync front porch period.
354f6b98252SInki Dae 		 */
3558e9cc6a1SInki Dae 		exynos_drm_crtc_apply(crtc);
3561c248b7dSInki Dae 	}
3571c248b7dSInki Dae out:
3581c248b7dSInki Dae 	mutex_unlock(&dev->struct_mutex);
3591c248b7dSInki Dae 	return ret;
3601c248b7dSInki Dae }
3611c248b7dSInki Dae 
3621c248b7dSInki Dae static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
3631c248b7dSInki Dae {
3641c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
3651c248b7dSInki Dae 	struct exynos_drm_private *private = crtc->dev->dev_private;
3661c248b7dSInki Dae 
3671c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
3681c248b7dSInki Dae 
3691c248b7dSInki Dae 	private->crtc[exynos_crtc->pipe] = NULL;
3701c248b7dSInki Dae 
3711c248b7dSInki Dae 	drm_crtc_cleanup(crtc);
3721c248b7dSInki Dae 	kfree(exynos_crtc);
3731c248b7dSInki Dae }
3741c248b7dSInki Dae 
3751c248b7dSInki Dae static struct drm_crtc_funcs exynos_crtc_funcs = {
3761c248b7dSInki Dae 	.set_config	= drm_crtc_helper_set_config,
3771c248b7dSInki Dae 	.page_flip	= exynos_drm_crtc_page_flip,
3781c248b7dSInki Dae 	.destroy	= exynos_drm_crtc_destroy,
3791c248b7dSInki Dae };
3801c248b7dSInki Dae 
3811c248b7dSInki Dae struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
3821c248b7dSInki Dae 		struct drm_crtc *crtc)
3831c248b7dSInki Dae {
3841c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
3851c248b7dSInki Dae 
3861c248b7dSInki Dae 	return &exynos_crtc->overlay;
3871c248b7dSInki Dae }
3881c248b7dSInki Dae 
3891c248b7dSInki Dae int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
3901c248b7dSInki Dae {
3911c248b7dSInki Dae 	struct exynos_drm_crtc *exynos_crtc;
3921c248b7dSInki Dae 	struct exynos_drm_private *private = dev->dev_private;
3931c248b7dSInki Dae 	struct drm_crtc *crtc;
3941c248b7dSInki Dae 
3951c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
3961c248b7dSInki Dae 
3971c248b7dSInki Dae 	exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
3981c248b7dSInki Dae 	if (!exynos_crtc) {
3991c248b7dSInki Dae 		DRM_ERROR("failed to allocate exynos crtc\n");
4001c248b7dSInki Dae 		return -ENOMEM;
4011c248b7dSInki Dae 	}
4021c248b7dSInki Dae 
4031c248b7dSInki Dae 	exynos_crtc->pipe = nr;
404ec05da95SInki Dae 	exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
405864ee9e6SJoonyoung Shim 	exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
4061c248b7dSInki Dae 	crtc = &exynos_crtc->drm_crtc;
4071c248b7dSInki Dae 
4081c248b7dSInki Dae 	private->crtc[nr] = crtc;
4091c248b7dSInki Dae 
4101c248b7dSInki Dae 	drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
4111c248b7dSInki Dae 	drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
4121c248b7dSInki Dae 
4131c248b7dSInki Dae 	return 0;
4141c248b7dSInki Dae }
4151c248b7dSInki Dae 
4161c248b7dSInki Dae int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
4171c248b7dSInki Dae {
4181c248b7dSInki Dae 	struct exynos_drm_private *private = dev->dev_private;
419ec05da95SInki Dae 	struct exynos_drm_crtc *exynos_crtc =
420ec05da95SInki Dae 		to_exynos_crtc(private->crtc[crtc]);
4211c248b7dSInki Dae 
4221c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
4231c248b7dSInki Dae 
424ec05da95SInki Dae 	if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
425ec05da95SInki Dae 		return -EPERM;
426ec05da95SInki Dae 
4271c248b7dSInki Dae 	exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
4281c248b7dSInki Dae 			exynos_drm_enable_vblank);
4291c248b7dSInki Dae 
4301c248b7dSInki Dae 	return 0;
4311c248b7dSInki Dae }
4321c248b7dSInki Dae 
4331c248b7dSInki Dae void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
4341c248b7dSInki Dae {
4351c248b7dSInki Dae 	struct exynos_drm_private *private = dev->dev_private;
436ec05da95SInki Dae 	struct exynos_drm_crtc *exynos_crtc =
437ec05da95SInki Dae 		to_exynos_crtc(private->crtc[crtc]);
4381c248b7dSInki Dae 
4391c248b7dSInki Dae 	DRM_DEBUG_KMS("%s\n", __FILE__);
4401c248b7dSInki Dae 
441ec05da95SInki Dae 	if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
442ec05da95SInki Dae 		return;
443ec05da95SInki Dae 
4441c248b7dSInki Dae 	exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
4451c248b7dSInki Dae 			exynos_drm_disable_vblank);
4461c248b7dSInki Dae }
447