1 /* 2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders 3 * 4 * Copyright (C) 2007 David Brownell 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #include <linux/gpio/driver.h> 22 #include <linux/i2c.h> 23 #include <linux/platform_data/pcf857x.h> 24 #include <linux/interrupt.h> 25 #include <linux/irq.h> 26 #include <linux/irqdomain.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/of.h> 30 #include <linux/of_device.h> 31 #include <linux/slab.h> 32 #include <linux/spinlock.h> 33 34 35 static const struct i2c_device_id pcf857x_id[] = { 36 { "pcf8574", 8 }, 37 { "pcf8574a", 8 }, 38 { "pca8574", 8 }, 39 { "pca9670", 8 }, 40 { "pca9672", 8 }, 41 { "pca9674", 8 }, 42 { "pcf8575", 16 }, 43 { "pca8575", 16 }, 44 { "pca9671", 16 }, 45 { "pca9673", 16 }, 46 { "pca9675", 16 }, 47 { "max7328", 8 }, 48 { "max7329", 8 }, 49 { } 50 }; 51 MODULE_DEVICE_TABLE(i2c, pcf857x_id); 52 53 #ifdef CONFIG_OF 54 static const struct of_device_id pcf857x_of_table[] = { 55 { .compatible = "nxp,pcf8574" }, 56 { .compatible = "nxp,pcf8574a" }, 57 { .compatible = "nxp,pca8574" }, 58 { .compatible = "nxp,pca9670" }, 59 { .compatible = "nxp,pca9672" }, 60 { .compatible = "nxp,pca9674" }, 61 { .compatible = "nxp,pcf8575" }, 62 { .compatible = "nxp,pca8575" }, 63 { .compatible = "nxp,pca9671" }, 64 { .compatible = "nxp,pca9673" }, 65 { .compatible = "nxp,pca9675" }, 66 { .compatible = "maxim,max7328" }, 67 { .compatible = "maxim,max7329" }, 68 { } 69 }; 70 MODULE_DEVICE_TABLE(of, pcf857x_of_table); 71 #endif 72 73 /* 74 * The pcf857x, pca857x, and pca967x chips only expose one read and one 75 * write register. Writing a "one" bit (to match the reset state) lets 76 * that pin be used as an input; it's not an open-drain model, but acts 77 * a bit like one. This is described as "quasi-bidirectional"; read the 78 * chip documentation for details. 79 * 80 * Many other I2C GPIO expander chips (like the pca953x models) have 81 * more complex register models and more conventional circuitry using 82 * push/pull drivers. They often use the same 0x20..0x27 addresses as 83 * pcf857x parts, making the "legacy" I2C driver model problematic. 84 */ 85 struct pcf857x { 86 struct gpio_chip chip; 87 struct i2c_client *client; 88 struct mutex lock; /* protect 'out' */ 89 unsigned out; /* software latch */ 90 unsigned status; /* current status */ 91 unsigned int irq_parent; 92 unsigned irq_enabled; /* enabled irqs */ 93 94 int (*write)(struct i2c_client *client, unsigned data); 95 int (*read)(struct i2c_client *client); 96 }; 97 98 /*-------------------------------------------------------------------------*/ 99 100 /* Talk to 8-bit I/O expander */ 101 102 static int i2c_write_le8(struct i2c_client *client, unsigned data) 103 { 104 return i2c_smbus_write_byte(client, data); 105 } 106 107 static int i2c_read_le8(struct i2c_client *client) 108 { 109 return (int)i2c_smbus_read_byte(client); 110 } 111 112 /* Talk to 16-bit I/O expander */ 113 114 static int i2c_write_le16(struct i2c_client *client, unsigned word) 115 { 116 u8 buf[2] = { word & 0xff, word >> 8, }; 117 int status; 118 119 status = i2c_master_send(client, buf, 2); 120 return (status < 0) ? status : 0; 121 } 122 123 static int i2c_read_le16(struct i2c_client *client) 124 { 125 u8 buf[2]; 126 int status; 127 128 status = i2c_master_recv(client, buf, 2); 129 if (status < 0) 130 return status; 131 return (buf[1] << 8) | buf[0]; 132 } 133 134 /*-------------------------------------------------------------------------*/ 135 136 static int pcf857x_input(struct gpio_chip *chip, unsigned offset) 137 { 138 struct pcf857x *gpio = gpiochip_get_data(chip); 139 int status; 140 141 mutex_lock(&gpio->lock); 142 gpio->out |= (1 << offset); 143 status = gpio->write(gpio->client, gpio->out); 144 mutex_unlock(&gpio->lock); 145 146 return status; 147 } 148 149 static int pcf857x_get(struct gpio_chip *chip, unsigned offset) 150 { 151 struct pcf857x *gpio = gpiochip_get_data(chip); 152 int value; 153 154 value = gpio->read(gpio->client); 155 return (value < 0) ? value : !!(value & (1 << offset)); 156 } 157 158 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) 159 { 160 struct pcf857x *gpio = gpiochip_get_data(chip); 161 unsigned bit = 1 << offset; 162 int status; 163 164 mutex_lock(&gpio->lock); 165 if (value) 166 gpio->out |= bit; 167 else 168 gpio->out &= ~bit; 169 status = gpio->write(gpio->client, gpio->out); 170 mutex_unlock(&gpio->lock); 171 172 return status; 173 } 174 175 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value) 176 { 177 pcf857x_output(chip, offset, value); 178 } 179 180 /*-------------------------------------------------------------------------*/ 181 182 static irqreturn_t pcf857x_irq(int irq, void *data) 183 { 184 struct pcf857x *gpio = data; 185 unsigned long change, i, status; 186 187 status = gpio->read(gpio->client); 188 189 /* 190 * call the interrupt handler iff gpio is used as 191 * interrupt source, just to avoid bad irqs 192 */ 193 mutex_lock(&gpio->lock); 194 change = (gpio->status ^ status) & gpio->irq_enabled; 195 gpio->status = status; 196 mutex_unlock(&gpio->lock); 197 198 for_each_set_bit(i, &change, gpio->chip.ngpio) 199 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i)); 200 201 return IRQ_HANDLED; 202 } 203 204 /* 205 * NOP functions 206 */ 207 static void noop(struct irq_data *data) { } 208 209 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 210 { 211 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 212 213 int error = 0; 214 215 if (gpio->irq_parent) { 216 error = irq_set_irq_wake(gpio->irq_parent, on); 217 if (error) { 218 dev_dbg(&gpio->client->dev, 219 "irq %u doesn't support irq_set_wake\n", 220 gpio->irq_parent); 221 gpio->irq_parent = 0; 222 } 223 } 224 return error; 225 } 226 227 static void pcf857x_irq_enable(struct irq_data *data) 228 { 229 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 230 231 gpio->irq_enabled |= (1 << data->hwirq); 232 } 233 234 static void pcf857x_irq_disable(struct irq_data *data) 235 { 236 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 237 238 gpio->irq_enabled &= ~(1 << data->hwirq); 239 } 240 241 static void pcf857x_irq_bus_lock(struct irq_data *data) 242 { 243 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 244 245 mutex_lock(&gpio->lock); 246 } 247 248 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) 249 { 250 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 251 252 mutex_unlock(&gpio->lock); 253 } 254 255 static struct irq_chip pcf857x_irq_chip = { 256 .name = "pcf857x", 257 .irq_enable = pcf857x_irq_enable, 258 .irq_disable = pcf857x_irq_disable, 259 .irq_ack = noop, 260 .irq_mask = noop, 261 .irq_unmask = noop, 262 .irq_set_wake = pcf857x_irq_set_wake, 263 .irq_bus_lock = pcf857x_irq_bus_lock, 264 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock, 265 }; 266 267 /*-------------------------------------------------------------------------*/ 268 269 static int pcf857x_probe(struct i2c_client *client, 270 const struct i2c_device_id *id) 271 { 272 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 273 struct device_node *np = client->dev.of_node; 274 struct pcf857x *gpio; 275 unsigned int n_latch = 0; 276 int status; 277 278 if (IS_ENABLED(CONFIG_OF) && np) 279 of_property_read_u32(np, "lines-initial-states", &n_latch); 280 else if (pdata) 281 n_latch = pdata->n_latch; 282 else 283 dev_dbg(&client->dev, "no platform data\n"); 284 285 /* Allocate, initialize, and register this gpio_chip. */ 286 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 287 if (!gpio) 288 return -ENOMEM; 289 290 mutex_init(&gpio->lock); 291 292 gpio->chip.base = pdata ? pdata->gpio_base : -1; 293 gpio->chip.can_sleep = true; 294 gpio->chip.parent = &client->dev; 295 gpio->chip.owner = THIS_MODULE; 296 gpio->chip.get = pcf857x_get; 297 gpio->chip.set = pcf857x_set; 298 gpio->chip.direction_input = pcf857x_input; 299 gpio->chip.direction_output = pcf857x_output; 300 gpio->chip.ngpio = id->driver_data; 301 302 /* NOTE: the OnSemi jlc1562b is also largely compatible with 303 * these parts, notably for output. It has a low-resolution 304 * DAC instead of pin change IRQs; and its inputs can be the 305 * result of comparators. 306 */ 307 308 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 309 * 9670, 9672, 9764, and 9764a use quite a variety. 310 * 311 * NOTE: we don't distinguish here between *4 and *4a parts. 312 */ 313 if (gpio->chip.ngpio == 8) { 314 gpio->write = i2c_write_le8; 315 gpio->read = i2c_read_le8; 316 317 if (!i2c_check_functionality(client->adapter, 318 I2C_FUNC_SMBUS_BYTE)) 319 status = -EIO; 320 321 /* fail if there's no chip present */ 322 else 323 status = i2c_smbus_read_byte(client); 324 325 /* '75/'75c addresses are 0x20..0x27, just like the '74; 326 * the '75c doesn't have a current source pulling high. 327 * 9671, 9673, and 9765 use quite a variety of addresses. 328 * 329 * NOTE: we don't distinguish here between '75 and '75c parts. 330 */ 331 } else if (gpio->chip.ngpio == 16) { 332 gpio->write = i2c_write_le16; 333 gpio->read = i2c_read_le16; 334 335 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 336 status = -EIO; 337 338 /* fail if there's no chip present */ 339 else 340 status = i2c_read_le16(client); 341 342 } else { 343 dev_dbg(&client->dev, "unsupported number of gpios\n"); 344 status = -EINVAL; 345 } 346 347 if (status < 0) 348 goto fail; 349 350 gpio->chip.label = client->name; 351 352 gpio->client = client; 353 i2c_set_clientdata(client, gpio); 354 355 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 356 * We can't actually know whether a pin is configured (a) as output 357 * and driving the signal low, or (b) as input and reporting a low 358 * value ... without knowing the last value written since the chip 359 * came out of reset (if any). We can't read the latched output. 360 * 361 * In short, the only reliable solution for setting up pin direction 362 * is to do it explicitly. The setup() method can do that, but it 363 * may cause transient glitching since it can't know the last value 364 * written (some pins may need to be driven low). 365 * 366 * Using n_latch avoids that trouble. When left initialized to zero, 367 * our software copy of the "latch" then matches the chip's all-ones 368 * reset state. Otherwise it flags pins to be driven low. 369 */ 370 gpio->out = ~n_latch; 371 gpio->status = gpio->out; 372 373 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio); 374 if (status < 0) 375 goto fail; 376 377 /* Enable irqchip if we have an interrupt */ 378 if (client->irq) { 379 status = gpiochip_irqchip_add_nested(&gpio->chip, 380 &pcf857x_irq_chip, 381 0, handle_level_irq, 382 IRQ_TYPE_NONE); 383 if (status) { 384 dev_err(&client->dev, "cannot add irqchip\n"); 385 goto fail; 386 } 387 388 status = devm_request_threaded_irq(&client->dev, client->irq, 389 NULL, pcf857x_irq, IRQF_ONESHOT | 390 IRQF_TRIGGER_FALLING | IRQF_SHARED, 391 dev_name(&client->dev), gpio); 392 if (status) 393 goto fail; 394 395 gpiochip_set_nested_irqchip(&gpio->chip, &pcf857x_irq_chip, 396 client->irq); 397 gpio->irq_parent = client->irq; 398 } 399 400 /* Let platform code set up the GPIOs and their users. 401 * Now is the first time anyone could use them. 402 */ 403 if (pdata && pdata->setup) { 404 status = pdata->setup(client, 405 gpio->chip.base, gpio->chip.ngpio, 406 pdata->context); 407 if (status < 0) 408 dev_warn(&client->dev, "setup --> %d\n", status); 409 } 410 411 dev_info(&client->dev, "probed\n"); 412 413 return 0; 414 415 fail: 416 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 417 client->name); 418 419 return status; 420 } 421 422 static int pcf857x_remove(struct i2c_client *client) 423 { 424 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 425 struct pcf857x *gpio = i2c_get_clientdata(client); 426 int status = 0; 427 428 if (pdata && pdata->teardown) { 429 status = pdata->teardown(client, 430 gpio->chip.base, gpio->chip.ngpio, 431 pdata->context); 432 if (status < 0) { 433 dev_err(&client->dev, "%s --> %d\n", 434 "teardown", status); 435 return status; 436 } 437 } 438 439 return status; 440 } 441 442 static void pcf857x_shutdown(struct i2c_client *client) 443 { 444 struct pcf857x *gpio = i2c_get_clientdata(client); 445 446 /* Drive all the I/O lines high */ 447 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1); 448 } 449 450 static struct i2c_driver pcf857x_driver = { 451 .driver = { 452 .name = "pcf857x", 453 .of_match_table = of_match_ptr(pcf857x_of_table), 454 }, 455 .probe = pcf857x_probe, 456 .remove = pcf857x_remove, 457 .shutdown = pcf857x_shutdown, 458 .id_table = pcf857x_id, 459 }; 460 461 static int __init pcf857x_init(void) 462 { 463 return i2c_add_driver(&pcf857x_driver); 464 } 465 /* register after i2c postcore initcall and before 466 * subsys initcalls that may rely on these GPIOs 467 */ 468 subsys_initcall(pcf857x_init); 469 470 static void __exit pcf857x_exit(void) 471 { 472 i2c_del_driver(&pcf857x_driver); 473 } 474 module_exit(pcf857x_exit); 475 476 MODULE_LICENSE("GPL"); 477 MODULE_AUTHOR("David Brownell"); 478