1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders 4 * 5 * Copyright (C) 2007 David Brownell 6 */ 7 8 #include <linux/gpio/driver.h> 9 #include <linux/i2c.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/irqdomain.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/slab.h> 18 #include <linux/spinlock.h> 19 20 static const struct i2c_device_id pcf857x_id[] = { 21 { "pcf8574", 8 }, 22 { "pcf8574a", 8 }, 23 { "pca8574", 8 }, 24 { "pca9670", 8 }, 25 { "pca9672", 8 }, 26 { "pca9674", 8 }, 27 { "pcf8575", 16 }, 28 { "pca8575", 16 }, 29 { "pca9671", 16 }, 30 { "pca9673", 16 }, 31 { "pca9675", 16 }, 32 { "max7328", 8 }, 33 { "max7329", 8 }, 34 { } 35 }; 36 MODULE_DEVICE_TABLE(i2c, pcf857x_id); 37 38 #ifdef CONFIG_OF 39 static const struct of_device_id pcf857x_of_table[] = { 40 { .compatible = "nxp,pcf8574" }, 41 { .compatible = "nxp,pcf8574a" }, 42 { .compatible = "nxp,pca8574" }, 43 { .compatible = "nxp,pca9670" }, 44 { .compatible = "nxp,pca9672" }, 45 { .compatible = "nxp,pca9674" }, 46 { .compatible = "nxp,pcf8575" }, 47 { .compatible = "nxp,pca8575" }, 48 { .compatible = "nxp,pca9671" }, 49 { .compatible = "nxp,pca9673" }, 50 { .compatible = "nxp,pca9675" }, 51 { .compatible = "maxim,max7328" }, 52 { .compatible = "maxim,max7329" }, 53 { } 54 }; 55 MODULE_DEVICE_TABLE(of, pcf857x_of_table); 56 #endif 57 58 /* 59 * The pcf857x, pca857x, and pca967x chips only expose one read and one 60 * write register. Writing a "one" bit (to match the reset state) lets 61 * that pin be used as an input; it's not an open-drain model, but acts 62 * a bit like one. This is described as "quasi-bidirectional"; read the 63 * chip documentation for details. 64 * 65 * Many other I2C GPIO expander chips (like the pca953x models) have 66 * more complex register models and more conventional circuitry using 67 * push/pull drivers. They often use the same 0x20..0x27 addresses as 68 * pcf857x parts, making the "legacy" I2C driver model problematic. 69 */ 70 struct pcf857x { 71 struct gpio_chip chip; 72 struct i2c_client *client; 73 struct mutex lock; /* protect 'out' */ 74 unsigned int out; /* software latch */ 75 unsigned int status; /* current status */ 76 unsigned int irq_enabled; /* enabled irqs */ 77 78 int (*write)(struct i2c_client *client, unsigned int data); 79 int (*read)(struct i2c_client *client); 80 }; 81 82 /*-------------------------------------------------------------------------*/ 83 84 /* Talk to 8-bit I/O expander */ 85 86 static int i2c_write_le8(struct i2c_client *client, unsigned int data) 87 { 88 return i2c_smbus_write_byte(client, data); 89 } 90 91 static int i2c_read_le8(struct i2c_client *client) 92 { 93 return (int)i2c_smbus_read_byte(client); 94 } 95 96 /* Talk to 16-bit I/O expander */ 97 98 static int i2c_write_le16(struct i2c_client *client, unsigned int word) 99 { 100 u8 buf[2] = { word & 0xff, word >> 8, }; 101 int status; 102 103 status = i2c_master_send(client, buf, 2); 104 return (status < 0) ? status : 0; 105 } 106 107 static int i2c_read_le16(struct i2c_client *client) 108 { 109 u8 buf[2]; 110 int status; 111 112 status = i2c_master_recv(client, buf, 2); 113 if (status < 0) 114 return status; 115 return (buf[1] << 8) | buf[0]; 116 } 117 118 /*-------------------------------------------------------------------------*/ 119 120 static int pcf857x_input(struct gpio_chip *chip, unsigned int offset) 121 { 122 struct pcf857x *gpio = gpiochip_get_data(chip); 123 int status; 124 125 mutex_lock(&gpio->lock); 126 gpio->out |= (1 << offset); 127 status = gpio->write(gpio->client, gpio->out); 128 mutex_unlock(&gpio->lock); 129 130 return status; 131 } 132 133 static int pcf857x_get(struct gpio_chip *chip, unsigned int offset) 134 { 135 struct pcf857x *gpio = gpiochip_get_data(chip); 136 int value; 137 138 value = gpio->read(gpio->client); 139 return (value < 0) ? value : !!(value & (1 << offset)); 140 } 141 142 static int pcf857x_get_multiple(struct gpio_chip *chip, unsigned long *mask, 143 unsigned long *bits) 144 { 145 struct pcf857x *gpio = gpiochip_get_data(chip); 146 int value = gpio->read(gpio->client); 147 148 if (value < 0) 149 return value; 150 151 *bits &= ~*mask; 152 *bits |= value & *mask; 153 154 return 0; 155 } 156 157 static int pcf857x_output(struct gpio_chip *chip, unsigned int offset, int value) 158 { 159 struct pcf857x *gpio = gpiochip_get_data(chip); 160 unsigned int bit = 1 << offset; 161 int status; 162 163 mutex_lock(&gpio->lock); 164 if (value) 165 gpio->out |= bit; 166 else 167 gpio->out &= ~bit; 168 status = gpio->write(gpio->client, gpio->out); 169 mutex_unlock(&gpio->lock); 170 171 return status; 172 } 173 174 static void pcf857x_set(struct gpio_chip *chip, unsigned int offset, int value) 175 { 176 pcf857x_output(chip, offset, value); 177 } 178 179 static void pcf857x_set_multiple(struct gpio_chip *chip, unsigned long *mask, 180 unsigned long *bits) 181 { 182 struct pcf857x *gpio = gpiochip_get_data(chip); 183 184 mutex_lock(&gpio->lock); 185 gpio->out &= ~*mask; 186 gpio->out |= *bits & *mask; 187 gpio->write(gpio->client, gpio->out); 188 mutex_unlock(&gpio->lock); 189 } 190 191 /*-------------------------------------------------------------------------*/ 192 193 static irqreturn_t pcf857x_irq(int irq, void *data) 194 { 195 struct pcf857x *gpio = data; 196 unsigned long change, i, status; 197 198 status = gpio->read(gpio->client); 199 200 /* 201 * call the interrupt handler iff gpio is used as 202 * interrupt source, just to avoid bad irqs 203 */ 204 mutex_lock(&gpio->lock); 205 change = (gpio->status ^ status) & gpio->irq_enabled; 206 gpio->status = status; 207 mutex_unlock(&gpio->lock); 208 209 for_each_set_bit(i, &change, gpio->chip.ngpio) 210 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i)); 211 212 return IRQ_HANDLED; 213 } 214 215 /* 216 * NOP functions 217 */ 218 static void noop(struct irq_data *data) { } 219 220 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 221 { 222 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 223 224 return irq_set_irq_wake(gpio->client->irq, on); 225 } 226 227 static void pcf857x_irq_enable(struct irq_data *data) 228 { 229 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 230 irq_hw_number_t hwirq = irqd_to_hwirq(data); 231 232 gpiochip_enable_irq(&gpio->chip, hwirq); 233 gpio->irq_enabled |= (1 << hwirq); 234 } 235 236 static void pcf857x_irq_disable(struct irq_data *data) 237 { 238 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 239 irq_hw_number_t hwirq = irqd_to_hwirq(data); 240 241 gpio->irq_enabled &= ~(1 << hwirq); 242 gpiochip_disable_irq(&gpio->chip, hwirq); 243 } 244 245 static void pcf857x_irq_bus_lock(struct irq_data *data) 246 { 247 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 248 249 mutex_lock(&gpio->lock); 250 } 251 252 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) 253 { 254 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 255 256 mutex_unlock(&gpio->lock); 257 } 258 259 static const struct irq_chip pcf857x_irq_chip = { 260 .name = "pcf857x", 261 .irq_enable = pcf857x_irq_enable, 262 .irq_disable = pcf857x_irq_disable, 263 .irq_ack = noop, 264 .irq_mask = noop, 265 .irq_unmask = noop, 266 .irq_set_wake = pcf857x_irq_set_wake, 267 .irq_bus_lock = pcf857x_irq_bus_lock, 268 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock, 269 .flags = IRQCHIP_IMMUTABLE, 270 GPIOCHIP_IRQ_RESOURCE_HELPERS, 271 }; 272 273 /*-------------------------------------------------------------------------*/ 274 275 static int pcf857x_probe(struct i2c_client *client) 276 { 277 const struct i2c_device_id *id = i2c_client_get_device_id(client); 278 struct device_node *np = client->dev.of_node; 279 struct pcf857x *gpio; 280 unsigned int n_latch = 0; 281 int status; 282 283 of_property_read_u32(np, "lines-initial-states", &n_latch); 284 285 /* Allocate, initialize, and register this gpio_chip. */ 286 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 287 if (!gpio) 288 return -ENOMEM; 289 290 mutex_init(&gpio->lock); 291 292 gpio->chip.base = -1; 293 gpio->chip.can_sleep = true; 294 gpio->chip.parent = &client->dev; 295 gpio->chip.owner = THIS_MODULE; 296 gpio->chip.get = pcf857x_get; 297 gpio->chip.get_multiple = pcf857x_get_multiple; 298 gpio->chip.set = pcf857x_set; 299 gpio->chip.set_multiple = pcf857x_set_multiple; 300 gpio->chip.direction_input = pcf857x_input; 301 gpio->chip.direction_output = pcf857x_output; 302 gpio->chip.ngpio = id->driver_data; 303 304 /* NOTE: the OnSemi jlc1562b is also largely compatible with 305 * these parts, notably for output. It has a low-resolution 306 * DAC instead of pin change IRQs; and its inputs can be the 307 * result of comparators. 308 */ 309 310 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 311 * 9670, 9672, 9764, and 9764a use quite a variety. 312 * 313 * NOTE: we don't distinguish here between *4 and *4a parts. 314 */ 315 if (gpio->chip.ngpio == 8) { 316 gpio->write = i2c_write_le8; 317 gpio->read = i2c_read_le8; 318 319 if (!i2c_check_functionality(client->adapter, 320 I2C_FUNC_SMBUS_BYTE)) 321 status = -EIO; 322 323 /* fail if there's no chip present */ 324 else 325 status = i2c_smbus_read_byte(client); 326 327 /* '75/'75c addresses are 0x20..0x27, just like the '74; 328 * the '75c doesn't have a current source pulling high. 329 * 9671, 9673, and 9765 use quite a variety of addresses. 330 * 331 * NOTE: we don't distinguish here between '75 and '75c parts. 332 */ 333 } else if (gpio->chip.ngpio == 16) { 334 gpio->write = i2c_write_le16; 335 gpio->read = i2c_read_le16; 336 337 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 338 status = -EIO; 339 340 /* fail if there's no chip present */ 341 else 342 status = i2c_read_le16(client); 343 344 } else { 345 dev_dbg(&client->dev, "unsupported number of gpios\n"); 346 status = -EINVAL; 347 } 348 349 if (status < 0) 350 goto fail; 351 352 gpio->chip.label = client->name; 353 354 gpio->client = client; 355 i2c_set_clientdata(client, gpio); 356 357 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 358 * We can't actually know whether a pin is configured (a) as output 359 * and driving the signal low, or (b) as input and reporting a low 360 * value ... without knowing the last value written since the chip 361 * came out of reset (if any). We can't read the latched output. 362 * 363 * In short, the only reliable solution for setting up pin direction 364 * is to do it explicitly. The setup() method can do that, but it 365 * may cause transient glitching since it can't know the last value 366 * written (some pins may need to be driven low). 367 * 368 * Using n_latch avoids that trouble. When left initialized to zero, 369 * our software copy of the "latch" then matches the chip's all-ones 370 * reset state. Otherwise it flags pins to be driven low. 371 */ 372 gpio->out = ~n_latch; 373 gpio->status = gpio->read(gpio->client); 374 375 /* Enable irqchip if we have an interrupt */ 376 if (client->irq) { 377 struct gpio_irq_chip *girq; 378 379 status = devm_request_threaded_irq(&client->dev, client->irq, 380 NULL, pcf857x_irq, IRQF_ONESHOT | 381 IRQF_TRIGGER_FALLING | IRQF_SHARED, 382 dev_name(&client->dev), gpio); 383 if (status) 384 goto fail; 385 386 girq = &gpio->chip.irq; 387 gpio_irq_chip_set_chip(girq, &pcf857x_irq_chip); 388 /* This will let us handle the parent IRQ in the driver */ 389 girq->parent_handler = NULL; 390 girq->num_parents = 0; 391 girq->parents = NULL; 392 girq->default_type = IRQ_TYPE_NONE; 393 girq->handler = handle_level_irq; 394 girq->threaded = true; 395 } 396 397 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio); 398 if (status < 0) 399 goto fail; 400 401 dev_info(&client->dev, "probed\n"); 402 403 return 0; 404 405 fail: 406 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 407 client->name); 408 409 return status; 410 } 411 412 static void pcf857x_shutdown(struct i2c_client *client) 413 { 414 struct pcf857x *gpio = i2c_get_clientdata(client); 415 416 /* Drive all the I/O lines high */ 417 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1); 418 } 419 420 static struct i2c_driver pcf857x_driver = { 421 .driver = { 422 .name = "pcf857x", 423 .of_match_table = of_match_ptr(pcf857x_of_table), 424 }, 425 .probe_new = pcf857x_probe, 426 .shutdown = pcf857x_shutdown, 427 .id_table = pcf857x_id, 428 }; 429 430 static int __init pcf857x_init(void) 431 { 432 return i2c_add_driver(&pcf857x_driver); 433 } 434 /* register after i2c postcore initcall and before 435 * subsys initcalls that may rely on these GPIOs 436 */ 437 subsys_initcall(pcf857x_init); 438 439 static void __exit pcf857x_exit(void) 440 { 441 i2c_del_driver(&pcf857x_driver); 442 } 443 module_exit(pcf857x_exit); 444 445 MODULE_LICENSE("GPL"); 446 MODULE_AUTHOR("David Brownell"); 447