1 /* 2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders 3 * 4 * Copyright (C) 2007 David Brownell 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #include <linux/gpio/driver.h> 22 #include <linux/i2c.h> 23 #include <linux/platform_data/pcf857x.h> 24 #include <linux/interrupt.h> 25 #include <linux/irq.h> 26 #include <linux/irqdomain.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/of.h> 30 #include <linux/of_device.h> 31 #include <linux/slab.h> 32 #include <linux/spinlock.h> 33 34 35 static const struct i2c_device_id pcf857x_id[] = { 36 { "pcf8574", 8 }, 37 { "pcf8574a", 8 }, 38 { "pca8574", 8 }, 39 { "pca9670", 8 }, 40 { "pca9672", 8 }, 41 { "pca9674", 8 }, 42 { "pcf8575", 16 }, 43 { "pca8575", 16 }, 44 { "pca9671", 16 }, 45 { "pca9673", 16 }, 46 { "pca9675", 16 }, 47 { "max7328", 8 }, 48 { "max7329", 8 }, 49 { } 50 }; 51 MODULE_DEVICE_TABLE(i2c, pcf857x_id); 52 53 #ifdef CONFIG_OF 54 static const struct of_device_id pcf857x_of_table[] = { 55 { .compatible = "nxp,pcf8574" }, 56 { .compatible = "nxp,pcf8574a" }, 57 { .compatible = "nxp,pca8574" }, 58 { .compatible = "nxp,pca9670" }, 59 { .compatible = "nxp,pca9672" }, 60 { .compatible = "nxp,pca9674" }, 61 { .compatible = "nxp,pcf8575" }, 62 { .compatible = "nxp,pca8575" }, 63 { .compatible = "nxp,pca9671" }, 64 { .compatible = "nxp,pca9673" }, 65 { .compatible = "nxp,pca9675" }, 66 { .compatible = "maxim,max7328" }, 67 { .compatible = "maxim,max7329" }, 68 { } 69 }; 70 MODULE_DEVICE_TABLE(of, pcf857x_of_table); 71 #endif 72 73 /* 74 * The pcf857x, pca857x, and pca967x chips only expose one read and one 75 * write register. Writing a "one" bit (to match the reset state) lets 76 * that pin be used as an input; it's not an open-drain model, but acts 77 * a bit like one. This is described as "quasi-bidirectional"; read the 78 * chip documentation for details. 79 * 80 * Many other I2C GPIO expander chips (like the pca953x models) have 81 * more complex register models and more conventional circuitry using 82 * push/pull drivers. They often use the same 0x20..0x27 addresses as 83 * pcf857x parts, making the "legacy" I2C driver model problematic. 84 */ 85 struct pcf857x { 86 struct gpio_chip chip; 87 struct irq_chip irqchip; 88 struct i2c_client *client; 89 struct mutex lock; /* protect 'out' */ 90 unsigned out; /* software latch */ 91 unsigned status; /* current status */ 92 unsigned irq_enabled; /* enabled irqs */ 93 94 int (*write)(struct i2c_client *client, unsigned data); 95 int (*read)(struct i2c_client *client); 96 }; 97 98 /*-------------------------------------------------------------------------*/ 99 100 /* Talk to 8-bit I/O expander */ 101 102 static int i2c_write_le8(struct i2c_client *client, unsigned data) 103 { 104 return i2c_smbus_write_byte(client, data); 105 } 106 107 static int i2c_read_le8(struct i2c_client *client) 108 { 109 return (int)i2c_smbus_read_byte(client); 110 } 111 112 /* Talk to 16-bit I/O expander */ 113 114 static int i2c_write_le16(struct i2c_client *client, unsigned word) 115 { 116 u8 buf[2] = { word & 0xff, word >> 8, }; 117 int status; 118 119 status = i2c_master_send(client, buf, 2); 120 return (status < 0) ? status : 0; 121 } 122 123 static int i2c_read_le16(struct i2c_client *client) 124 { 125 u8 buf[2]; 126 int status; 127 128 status = i2c_master_recv(client, buf, 2); 129 if (status < 0) 130 return status; 131 return (buf[1] << 8) | buf[0]; 132 } 133 134 /*-------------------------------------------------------------------------*/ 135 136 static int pcf857x_input(struct gpio_chip *chip, unsigned offset) 137 { 138 struct pcf857x *gpio = gpiochip_get_data(chip); 139 int status; 140 141 mutex_lock(&gpio->lock); 142 gpio->out |= (1 << offset); 143 status = gpio->write(gpio->client, gpio->out); 144 mutex_unlock(&gpio->lock); 145 146 return status; 147 } 148 149 static int pcf857x_get(struct gpio_chip *chip, unsigned offset) 150 { 151 struct pcf857x *gpio = gpiochip_get_data(chip); 152 int value; 153 154 value = gpio->read(gpio->client); 155 return (value < 0) ? value : !!(value & (1 << offset)); 156 } 157 158 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) 159 { 160 struct pcf857x *gpio = gpiochip_get_data(chip); 161 unsigned bit = 1 << offset; 162 int status; 163 164 mutex_lock(&gpio->lock); 165 if (value) 166 gpio->out |= bit; 167 else 168 gpio->out &= ~bit; 169 status = gpio->write(gpio->client, gpio->out); 170 mutex_unlock(&gpio->lock); 171 172 return status; 173 } 174 175 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value) 176 { 177 pcf857x_output(chip, offset, value); 178 } 179 180 /*-------------------------------------------------------------------------*/ 181 182 static irqreturn_t pcf857x_irq(int irq, void *data) 183 { 184 struct pcf857x *gpio = data; 185 unsigned long change, i, status; 186 187 status = gpio->read(gpio->client); 188 189 /* 190 * call the interrupt handler iff gpio is used as 191 * interrupt source, just to avoid bad irqs 192 */ 193 mutex_lock(&gpio->lock); 194 change = (gpio->status ^ status) & gpio->irq_enabled; 195 gpio->status = status; 196 mutex_unlock(&gpio->lock); 197 198 for_each_set_bit(i, &change, gpio->chip.ngpio) 199 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i)); 200 201 return IRQ_HANDLED; 202 } 203 204 /* 205 * NOP functions 206 */ 207 static void noop(struct irq_data *data) { } 208 209 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 210 { 211 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 212 213 return irq_set_irq_wake(gpio->client->irq, on); 214 } 215 216 static void pcf857x_irq_enable(struct irq_data *data) 217 { 218 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 219 220 gpio->irq_enabled |= (1 << data->hwirq); 221 } 222 223 static void pcf857x_irq_disable(struct irq_data *data) 224 { 225 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 226 227 gpio->irq_enabled &= ~(1 << data->hwirq); 228 } 229 230 static void pcf857x_irq_bus_lock(struct irq_data *data) 231 { 232 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 233 234 mutex_lock(&gpio->lock); 235 } 236 237 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) 238 { 239 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 240 241 mutex_unlock(&gpio->lock); 242 } 243 244 /*-------------------------------------------------------------------------*/ 245 246 static int pcf857x_probe(struct i2c_client *client, 247 const struct i2c_device_id *id) 248 { 249 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 250 struct device_node *np = client->dev.of_node; 251 struct pcf857x *gpio; 252 unsigned int n_latch = 0; 253 int status; 254 255 if (IS_ENABLED(CONFIG_OF) && np) 256 of_property_read_u32(np, "lines-initial-states", &n_latch); 257 else if (pdata) 258 n_latch = pdata->n_latch; 259 else 260 dev_dbg(&client->dev, "no platform data\n"); 261 262 /* Allocate, initialize, and register this gpio_chip. */ 263 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 264 if (!gpio) 265 return -ENOMEM; 266 267 mutex_init(&gpio->lock); 268 269 gpio->chip.base = pdata ? pdata->gpio_base : -1; 270 gpio->chip.can_sleep = true; 271 gpio->chip.parent = &client->dev; 272 gpio->chip.owner = THIS_MODULE; 273 gpio->chip.get = pcf857x_get; 274 gpio->chip.set = pcf857x_set; 275 gpio->chip.direction_input = pcf857x_input; 276 gpio->chip.direction_output = pcf857x_output; 277 gpio->chip.ngpio = id->driver_data; 278 279 /* NOTE: the OnSemi jlc1562b is also largely compatible with 280 * these parts, notably for output. It has a low-resolution 281 * DAC instead of pin change IRQs; and its inputs can be the 282 * result of comparators. 283 */ 284 285 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 286 * 9670, 9672, 9764, and 9764a use quite a variety. 287 * 288 * NOTE: we don't distinguish here between *4 and *4a parts. 289 */ 290 if (gpio->chip.ngpio == 8) { 291 gpio->write = i2c_write_le8; 292 gpio->read = i2c_read_le8; 293 294 if (!i2c_check_functionality(client->adapter, 295 I2C_FUNC_SMBUS_BYTE)) 296 status = -EIO; 297 298 /* fail if there's no chip present */ 299 else 300 status = i2c_smbus_read_byte(client); 301 302 /* '75/'75c addresses are 0x20..0x27, just like the '74; 303 * the '75c doesn't have a current source pulling high. 304 * 9671, 9673, and 9765 use quite a variety of addresses. 305 * 306 * NOTE: we don't distinguish here between '75 and '75c parts. 307 */ 308 } else if (gpio->chip.ngpio == 16) { 309 gpio->write = i2c_write_le16; 310 gpio->read = i2c_read_le16; 311 312 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 313 status = -EIO; 314 315 /* fail if there's no chip present */ 316 else 317 status = i2c_read_le16(client); 318 319 } else { 320 dev_dbg(&client->dev, "unsupported number of gpios\n"); 321 status = -EINVAL; 322 } 323 324 if (status < 0) 325 goto fail; 326 327 gpio->chip.label = client->name; 328 329 gpio->client = client; 330 i2c_set_clientdata(client, gpio); 331 332 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 333 * We can't actually know whether a pin is configured (a) as output 334 * and driving the signal low, or (b) as input and reporting a low 335 * value ... without knowing the last value written since the chip 336 * came out of reset (if any). We can't read the latched output. 337 * 338 * In short, the only reliable solution for setting up pin direction 339 * is to do it explicitly. The setup() method can do that, but it 340 * may cause transient glitching since it can't know the last value 341 * written (some pins may need to be driven low). 342 * 343 * Using n_latch avoids that trouble. When left initialized to zero, 344 * our software copy of the "latch" then matches the chip's all-ones 345 * reset state. Otherwise it flags pins to be driven low. 346 */ 347 gpio->out = ~n_latch; 348 gpio->status = gpio->out; 349 350 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio); 351 if (status < 0) 352 goto fail; 353 354 /* Enable irqchip if we have an interrupt */ 355 if (client->irq) { 356 gpio->irqchip.name = "pcf857x", 357 gpio->irqchip.irq_enable = pcf857x_irq_enable, 358 gpio->irqchip.irq_disable = pcf857x_irq_disable, 359 gpio->irqchip.irq_ack = noop, 360 gpio->irqchip.irq_mask = noop, 361 gpio->irqchip.irq_unmask = noop, 362 gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake, 363 gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock, 364 gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock, 365 status = gpiochip_irqchip_add_nested(&gpio->chip, 366 &gpio->irqchip, 367 0, handle_level_irq, 368 IRQ_TYPE_NONE); 369 if (status) { 370 dev_err(&client->dev, "cannot add irqchip\n"); 371 goto fail; 372 } 373 374 status = devm_request_threaded_irq(&client->dev, client->irq, 375 NULL, pcf857x_irq, IRQF_ONESHOT | 376 IRQF_TRIGGER_FALLING | IRQF_SHARED, 377 dev_name(&client->dev), gpio); 378 if (status) 379 goto fail; 380 381 gpiochip_set_nested_irqchip(&gpio->chip, &gpio->irqchip, 382 client->irq); 383 } 384 385 /* Let platform code set up the GPIOs and their users. 386 * Now is the first time anyone could use them. 387 */ 388 if (pdata && pdata->setup) { 389 status = pdata->setup(client, 390 gpio->chip.base, gpio->chip.ngpio, 391 pdata->context); 392 if (status < 0) 393 dev_warn(&client->dev, "setup --> %d\n", status); 394 } 395 396 dev_info(&client->dev, "probed\n"); 397 398 return 0; 399 400 fail: 401 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 402 client->name); 403 404 return status; 405 } 406 407 static int pcf857x_remove(struct i2c_client *client) 408 { 409 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 410 struct pcf857x *gpio = i2c_get_clientdata(client); 411 int status = 0; 412 413 if (pdata && pdata->teardown) { 414 status = pdata->teardown(client, 415 gpio->chip.base, gpio->chip.ngpio, 416 pdata->context); 417 if (status < 0) { 418 dev_err(&client->dev, "%s --> %d\n", 419 "teardown", status); 420 return status; 421 } 422 } 423 424 return status; 425 } 426 427 static void pcf857x_shutdown(struct i2c_client *client) 428 { 429 struct pcf857x *gpio = i2c_get_clientdata(client); 430 431 /* Drive all the I/O lines high */ 432 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1); 433 } 434 435 static struct i2c_driver pcf857x_driver = { 436 .driver = { 437 .name = "pcf857x", 438 .of_match_table = of_match_ptr(pcf857x_of_table), 439 }, 440 .probe = pcf857x_probe, 441 .remove = pcf857x_remove, 442 .shutdown = pcf857x_shutdown, 443 .id_table = pcf857x_id, 444 }; 445 446 static int __init pcf857x_init(void) 447 { 448 return i2c_add_driver(&pcf857x_driver); 449 } 450 /* register after i2c postcore initcall and before 451 * subsys initcalls that may rely on these GPIOs 452 */ 453 subsys_initcall(pcf857x_init); 454 455 static void __exit pcf857x_exit(void) 456 { 457 i2c_del_driver(&pcf857x_driver); 458 } 459 module_exit(pcf857x_exit); 460 461 MODULE_LICENSE("GPL"); 462 MODULE_AUTHOR("David Brownell"); 463