1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders 4 * 5 * Copyright (C) 2007 David Brownell 6 */ 7 8 #include <linux/gpio/driver.h> 9 #include <linux/i2c.h> 10 #include <linux/platform_data/pcf857x.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/irqdomain.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/of_device.h> 18 #include <linux/slab.h> 19 #include <linux/spinlock.h> 20 21 22 static const struct i2c_device_id pcf857x_id[] = { 23 { "pcf8574", 8 }, 24 { "pcf8574a", 8 }, 25 { "pca8574", 8 }, 26 { "pca9670", 8 }, 27 { "pca9672", 8 }, 28 { "pca9674", 8 }, 29 { "pcf8575", 16 }, 30 { "pca8575", 16 }, 31 { "pca9671", 16 }, 32 { "pca9673", 16 }, 33 { "pca9675", 16 }, 34 { "max7328", 8 }, 35 { "max7329", 8 }, 36 { } 37 }; 38 MODULE_DEVICE_TABLE(i2c, pcf857x_id); 39 40 #ifdef CONFIG_OF 41 static const struct of_device_id pcf857x_of_table[] = { 42 { .compatible = "nxp,pcf8574" }, 43 { .compatible = "nxp,pcf8574a" }, 44 { .compatible = "nxp,pca8574" }, 45 { .compatible = "nxp,pca9670" }, 46 { .compatible = "nxp,pca9672" }, 47 { .compatible = "nxp,pca9674" }, 48 { .compatible = "nxp,pcf8575" }, 49 { .compatible = "nxp,pca8575" }, 50 { .compatible = "nxp,pca9671" }, 51 { .compatible = "nxp,pca9673" }, 52 { .compatible = "nxp,pca9675" }, 53 { .compatible = "maxim,max7328" }, 54 { .compatible = "maxim,max7329" }, 55 { } 56 }; 57 MODULE_DEVICE_TABLE(of, pcf857x_of_table); 58 #endif 59 60 /* 61 * The pcf857x, pca857x, and pca967x chips only expose one read and one 62 * write register. Writing a "one" bit (to match the reset state) lets 63 * that pin be used as an input; it's not an open-drain model, but acts 64 * a bit like one. This is described as "quasi-bidirectional"; read the 65 * chip documentation for details. 66 * 67 * Many other I2C GPIO expander chips (like the pca953x models) have 68 * more complex register models and more conventional circuitry using 69 * push/pull drivers. They often use the same 0x20..0x27 addresses as 70 * pcf857x parts, making the "legacy" I2C driver model problematic. 71 */ 72 struct pcf857x { 73 struct gpio_chip chip; 74 struct i2c_client *client; 75 struct mutex lock; /* protect 'out' */ 76 unsigned out; /* software latch */ 77 unsigned status; /* current status */ 78 unsigned irq_enabled; /* enabled irqs */ 79 80 int (*write)(struct i2c_client *client, unsigned data); 81 int (*read)(struct i2c_client *client); 82 }; 83 84 /*-------------------------------------------------------------------------*/ 85 86 /* Talk to 8-bit I/O expander */ 87 88 static int i2c_write_le8(struct i2c_client *client, unsigned data) 89 { 90 return i2c_smbus_write_byte(client, data); 91 } 92 93 static int i2c_read_le8(struct i2c_client *client) 94 { 95 return (int)i2c_smbus_read_byte(client); 96 } 97 98 /* Talk to 16-bit I/O expander */ 99 100 static int i2c_write_le16(struct i2c_client *client, unsigned word) 101 { 102 u8 buf[2] = { word & 0xff, word >> 8, }; 103 int status; 104 105 status = i2c_master_send(client, buf, 2); 106 return (status < 0) ? status : 0; 107 } 108 109 static int i2c_read_le16(struct i2c_client *client) 110 { 111 u8 buf[2]; 112 int status; 113 114 status = i2c_master_recv(client, buf, 2); 115 if (status < 0) 116 return status; 117 return (buf[1] << 8) | buf[0]; 118 } 119 120 /*-------------------------------------------------------------------------*/ 121 122 static int pcf857x_input(struct gpio_chip *chip, unsigned offset) 123 { 124 struct pcf857x *gpio = gpiochip_get_data(chip); 125 int status; 126 127 mutex_lock(&gpio->lock); 128 gpio->out |= (1 << offset); 129 status = gpio->write(gpio->client, gpio->out); 130 mutex_unlock(&gpio->lock); 131 132 return status; 133 } 134 135 static int pcf857x_get(struct gpio_chip *chip, unsigned offset) 136 { 137 struct pcf857x *gpio = gpiochip_get_data(chip); 138 int value; 139 140 value = gpio->read(gpio->client); 141 return (value < 0) ? value : !!(value & (1 << offset)); 142 } 143 144 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) 145 { 146 struct pcf857x *gpio = gpiochip_get_data(chip); 147 unsigned bit = 1 << offset; 148 int status; 149 150 mutex_lock(&gpio->lock); 151 if (value) 152 gpio->out |= bit; 153 else 154 gpio->out &= ~bit; 155 status = gpio->write(gpio->client, gpio->out); 156 mutex_unlock(&gpio->lock); 157 158 return status; 159 } 160 161 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value) 162 { 163 pcf857x_output(chip, offset, value); 164 } 165 166 /*-------------------------------------------------------------------------*/ 167 168 static irqreturn_t pcf857x_irq(int irq, void *data) 169 { 170 struct pcf857x *gpio = data; 171 unsigned long change, i, status; 172 173 status = gpio->read(gpio->client); 174 175 /* 176 * call the interrupt handler iff gpio is used as 177 * interrupt source, just to avoid bad irqs 178 */ 179 mutex_lock(&gpio->lock); 180 change = (gpio->status ^ status) & gpio->irq_enabled; 181 gpio->status = status; 182 mutex_unlock(&gpio->lock); 183 184 for_each_set_bit(i, &change, gpio->chip.ngpio) 185 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i)); 186 187 return IRQ_HANDLED; 188 } 189 190 /* 191 * NOP functions 192 */ 193 static void noop(struct irq_data *data) { } 194 195 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 196 { 197 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 198 199 return irq_set_irq_wake(gpio->client->irq, on); 200 } 201 202 static void pcf857x_irq_enable(struct irq_data *data) 203 { 204 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 205 irq_hw_number_t hwirq = irqd_to_hwirq(data); 206 207 gpiochip_enable_irq(&gpio->chip, hwirq); 208 gpio->irq_enabled |= (1 << hwirq); 209 } 210 211 static void pcf857x_irq_disable(struct irq_data *data) 212 { 213 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 214 irq_hw_number_t hwirq = irqd_to_hwirq(data); 215 216 gpio->irq_enabled &= ~(1 << hwirq); 217 gpiochip_disable_irq(&gpio->chip, hwirq); 218 } 219 220 static void pcf857x_irq_bus_lock(struct irq_data *data) 221 { 222 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 223 224 mutex_lock(&gpio->lock); 225 } 226 227 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) 228 { 229 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 230 231 mutex_unlock(&gpio->lock); 232 } 233 234 static const struct irq_chip pcf857x_irq_chip = { 235 .name = "pcf857x", 236 .irq_enable = pcf857x_irq_enable, 237 .irq_disable = pcf857x_irq_disable, 238 .irq_ack = noop, 239 .irq_mask = noop, 240 .irq_unmask = noop, 241 .irq_set_wake = pcf857x_irq_set_wake, 242 .irq_bus_lock = pcf857x_irq_bus_lock, 243 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock, 244 .flags = IRQCHIP_IMMUTABLE, 245 GPIOCHIP_IRQ_RESOURCE_HELPERS, 246 }; 247 248 /*-------------------------------------------------------------------------*/ 249 250 static int pcf857x_probe(struct i2c_client *client, 251 const struct i2c_device_id *id) 252 { 253 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 254 struct device_node *np = client->dev.of_node; 255 struct pcf857x *gpio; 256 unsigned int n_latch = 0; 257 int status; 258 259 if (IS_ENABLED(CONFIG_OF) && np) 260 of_property_read_u32(np, "lines-initial-states", &n_latch); 261 else if (pdata) 262 n_latch = pdata->n_latch; 263 else 264 dev_dbg(&client->dev, "no platform data\n"); 265 266 /* Allocate, initialize, and register this gpio_chip. */ 267 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 268 if (!gpio) 269 return -ENOMEM; 270 271 mutex_init(&gpio->lock); 272 273 gpio->chip.base = pdata ? pdata->gpio_base : -1; 274 gpio->chip.can_sleep = true; 275 gpio->chip.parent = &client->dev; 276 gpio->chip.owner = THIS_MODULE; 277 gpio->chip.get = pcf857x_get; 278 gpio->chip.set = pcf857x_set; 279 gpio->chip.direction_input = pcf857x_input; 280 gpio->chip.direction_output = pcf857x_output; 281 gpio->chip.ngpio = id->driver_data; 282 283 /* NOTE: the OnSemi jlc1562b is also largely compatible with 284 * these parts, notably for output. It has a low-resolution 285 * DAC instead of pin change IRQs; and its inputs can be the 286 * result of comparators. 287 */ 288 289 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 290 * 9670, 9672, 9764, and 9764a use quite a variety. 291 * 292 * NOTE: we don't distinguish here between *4 and *4a parts. 293 */ 294 if (gpio->chip.ngpio == 8) { 295 gpio->write = i2c_write_le8; 296 gpio->read = i2c_read_le8; 297 298 if (!i2c_check_functionality(client->adapter, 299 I2C_FUNC_SMBUS_BYTE)) 300 status = -EIO; 301 302 /* fail if there's no chip present */ 303 else 304 status = i2c_smbus_read_byte(client); 305 306 /* '75/'75c addresses are 0x20..0x27, just like the '74; 307 * the '75c doesn't have a current source pulling high. 308 * 9671, 9673, and 9765 use quite a variety of addresses. 309 * 310 * NOTE: we don't distinguish here between '75 and '75c parts. 311 */ 312 } else if (gpio->chip.ngpio == 16) { 313 gpio->write = i2c_write_le16; 314 gpio->read = i2c_read_le16; 315 316 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 317 status = -EIO; 318 319 /* fail if there's no chip present */ 320 else 321 status = i2c_read_le16(client); 322 323 } else { 324 dev_dbg(&client->dev, "unsupported number of gpios\n"); 325 status = -EINVAL; 326 } 327 328 if (status < 0) 329 goto fail; 330 331 gpio->chip.label = client->name; 332 333 gpio->client = client; 334 i2c_set_clientdata(client, gpio); 335 336 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 337 * We can't actually know whether a pin is configured (a) as output 338 * and driving the signal low, or (b) as input and reporting a low 339 * value ... without knowing the last value written since the chip 340 * came out of reset (if any). We can't read the latched output. 341 * 342 * In short, the only reliable solution for setting up pin direction 343 * is to do it explicitly. The setup() method can do that, but it 344 * may cause transient glitching since it can't know the last value 345 * written (some pins may need to be driven low). 346 * 347 * Using n_latch avoids that trouble. When left initialized to zero, 348 * our software copy of the "latch" then matches the chip's all-ones 349 * reset state. Otherwise it flags pins to be driven low. 350 */ 351 gpio->out = ~n_latch; 352 gpio->status = gpio->read(gpio->client); 353 354 /* Enable irqchip if we have an interrupt */ 355 if (client->irq) { 356 struct gpio_irq_chip *girq; 357 358 status = devm_request_threaded_irq(&client->dev, client->irq, 359 NULL, pcf857x_irq, IRQF_ONESHOT | 360 IRQF_TRIGGER_FALLING | IRQF_SHARED, 361 dev_name(&client->dev), gpio); 362 if (status) 363 goto fail; 364 365 girq = &gpio->chip.irq; 366 gpio_irq_chip_set_chip(girq, &pcf857x_irq_chip); 367 /* This will let us handle the parent IRQ in the driver */ 368 girq->parent_handler = NULL; 369 girq->num_parents = 0; 370 girq->parents = NULL; 371 girq->default_type = IRQ_TYPE_NONE; 372 girq->handler = handle_level_irq; 373 girq->threaded = true; 374 } 375 376 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio); 377 if (status < 0) 378 goto fail; 379 380 /* Let platform code set up the GPIOs and their users. 381 * Now is the first time anyone could use them. 382 */ 383 if (pdata && pdata->setup) { 384 status = pdata->setup(client, 385 gpio->chip.base, gpio->chip.ngpio, 386 pdata->context); 387 if (status < 0) 388 dev_warn(&client->dev, "setup --> %d\n", status); 389 } 390 391 dev_info(&client->dev, "probed\n"); 392 393 return 0; 394 395 fail: 396 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 397 client->name); 398 399 return status; 400 } 401 402 static int pcf857x_remove(struct i2c_client *client) 403 { 404 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 405 struct pcf857x *gpio = i2c_get_clientdata(client); 406 407 if (pdata && pdata->teardown) 408 pdata->teardown(client, gpio->chip.base, gpio->chip.ngpio, 409 pdata->context); 410 411 return 0; 412 } 413 414 static void pcf857x_shutdown(struct i2c_client *client) 415 { 416 struct pcf857x *gpio = i2c_get_clientdata(client); 417 418 /* Drive all the I/O lines high */ 419 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1); 420 } 421 422 static struct i2c_driver pcf857x_driver = { 423 .driver = { 424 .name = "pcf857x", 425 .of_match_table = of_match_ptr(pcf857x_of_table), 426 }, 427 .probe = pcf857x_probe, 428 .remove = pcf857x_remove, 429 .shutdown = pcf857x_shutdown, 430 .id_table = pcf857x_id, 431 }; 432 433 static int __init pcf857x_init(void) 434 { 435 return i2c_add_driver(&pcf857x_driver); 436 } 437 /* register after i2c postcore initcall and before 438 * subsys initcalls that may rely on these GPIOs 439 */ 440 subsys_initcall(pcf857x_init); 441 442 static void __exit pcf857x_exit(void) 443 { 444 i2c_del_driver(&pcf857x_driver); 445 } 446 module_exit(pcf857x_exit); 447 448 MODULE_LICENSE("GPL"); 449 MODULE_AUTHOR("David Brownell"); 450