1 /* 2 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver 3 * 4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> 5 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/gpio/consumer.h> 13 #include <linux/init.h> 14 #include <linux/mutex.h> 15 #include <linux/spi/spi.h> 16 #include <linux/gpio.h> 17 #include <linux/of_gpio.h> 18 #include <linux/slab.h> 19 #include <linux/module.h> 20 21 #define GEN_74X164_NUMBER_GPIOS 8 22 23 struct gen_74x164_chip { 24 struct gpio_chip gpio_chip; 25 struct mutex lock; 26 u32 registers; 27 /* 28 * Since the registers are chained, every byte sent will make 29 * the previous byte shift to the next register in the 30 * chain. Thus, the first byte sent will end up in the last 31 * register at the end of the transfer. So, to have a logical 32 * numbering, store the bytes in reverse order. 33 */ 34 u8 buffer[0]; 35 struct gpio_desc *gpiod_oe; 36 }; 37 38 static int __gen_74x164_write_config(struct gen_74x164_chip *chip) 39 { 40 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, 41 chip->registers); 42 } 43 44 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) 45 { 46 struct gen_74x164_chip *chip = gpiochip_get_data(gc); 47 u8 bank = chip->registers - 1 - offset / 8; 48 u8 pin = offset % 8; 49 int ret; 50 51 mutex_lock(&chip->lock); 52 ret = (chip->buffer[bank] >> pin) & 0x1; 53 mutex_unlock(&chip->lock); 54 55 return ret; 56 } 57 58 static void gen_74x164_set_value(struct gpio_chip *gc, 59 unsigned offset, int val) 60 { 61 struct gen_74x164_chip *chip = gpiochip_get_data(gc); 62 u8 bank = chip->registers - 1 - offset / 8; 63 u8 pin = offset % 8; 64 65 mutex_lock(&chip->lock); 66 if (val) 67 chip->buffer[bank] |= (1 << pin); 68 else 69 chip->buffer[bank] &= ~(1 << pin); 70 71 __gen_74x164_write_config(chip); 72 mutex_unlock(&chip->lock); 73 } 74 75 static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask, 76 unsigned long *bits) 77 { 78 struct gen_74x164_chip *chip = gpiochip_get_data(gc); 79 unsigned int i, idx, shift; 80 u8 bank, bankmask; 81 82 mutex_lock(&chip->lock); 83 for (i = 0, bank = chip->registers - 1; i < chip->registers; 84 i++, bank--) { 85 idx = i / sizeof(*mask); 86 shift = i % sizeof(*mask) * BITS_PER_BYTE; 87 bankmask = mask[idx] >> shift; 88 if (!bankmask) 89 continue; 90 91 chip->buffer[bank] &= ~bankmask; 92 chip->buffer[bank] |= bankmask & (bits[idx] >> shift); 93 } 94 __gen_74x164_write_config(chip); 95 mutex_unlock(&chip->lock); 96 } 97 98 static int gen_74x164_direction_output(struct gpio_chip *gc, 99 unsigned offset, int val) 100 { 101 gen_74x164_set_value(gc, offset, val); 102 return 0; 103 } 104 105 static int gen_74x164_probe(struct spi_device *spi) 106 { 107 struct gen_74x164_chip *chip; 108 u32 nregs; 109 int ret; 110 111 /* 112 * bits_per_word cannot be configured in platform data 113 */ 114 spi->bits_per_word = 8; 115 116 ret = spi_setup(spi); 117 if (ret < 0) 118 return ret; 119 120 if (of_property_read_u32(spi->dev.of_node, "registers-number", 121 &nregs)) { 122 dev_err(&spi->dev, 123 "Missing registers-number property in the DT.\n"); 124 return -EINVAL; 125 } 126 127 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL); 128 if (!chip) 129 return -ENOMEM; 130 131 chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable", 132 GPIOD_OUT_LOW); 133 if (IS_ERR(chip->gpiod_oe)) 134 return PTR_ERR(chip->gpiod_oe); 135 136 gpiod_set_value_cansleep(chip->gpiod_oe, 1); 137 138 spi_set_drvdata(spi, chip); 139 140 chip->gpio_chip.label = spi->modalias; 141 chip->gpio_chip.direction_output = gen_74x164_direction_output; 142 chip->gpio_chip.get = gen_74x164_get_value; 143 chip->gpio_chip.set = gen_74x164_set_value; 144 chip->gpio_chip.set_multiple = gen_74x164_set_multiple; 145 chip->gpio_chip.base = -1; 146 147 chip->registers = nregs; 148 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; 149 150 chip->gpio_chip.can_sleep = true; 151 chip->gpio_chip.parent = &spi->dev; 152 chip->gpio_chip.owner = THIS_MODULE; 153 154 mutex_init(&chip->lock); 155 156 ret = __gen_74x164_write_config(chip); 157 if (ret) { 158 dev_err(&spi->dev, "Failed writing: %d\n", ret); 159 goto exit_destroy; 160 } 161 162 ret = gpiochip_add_data(&chip->gpio_chip, chip); 163 if (!ret) 164 return 0; 165 166 exit_destroy: 167 mutex_destroy(&chip->lock); 168 169 return ret; 170 } 171 172 static int gen_74x164_remove(struct spi_device *spi) 173 { 174 struct gen_74x164_chip *chip = spi_get_drvdata(spi); 175 176 gpiod_set_value_cansleep(chip->gpiod_oe, 0); 177 gpiochip_remove(&chip->gpio_chip); 178 mutex_destroy(&chip->lock); 179 180 return 0; 181 } 182 183 static const struct of_device_id gen_74x164_dt_ids[] = { 184 { .compatible = "fairchild,74hc595" }, 185 { .compatible = "nxp,74lvc594" }, 186 {}, 187 }; 188 MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); 189 190 static struct spi_driver gen_74x164_driver = { 191 .driver = { 192 .name = "74x164", 193 .of_match_table = gen_74x164_dt_ids, 194 }, 195 .probe = gen_74x164_probe, 196 .remove = gen_74x164_remove, 197 }; 198 module_spi_driver(gen_74x164_driver); 199 200 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); 201 MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>"); 202 MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register"); 203 MODULE_LICENSE("GPL v2"); 204