1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
4 *
5 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/gpio/driver.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/property.h>
15 #include <linux/slab.h>
16 #include <linux/spi/spi.h>
17
18 #define GEN_74X164_NUMBER_GPIOS 8
19
20 struct gen_74x164_chip {
21 struct gpio_chip gpio_chip;
22 struct mutex lock;
23 struct gpio_desc *gpiod_oe;
24 u32 registers;
25 /*
26 * Since the registers are chained, every byte sent will make
27 * the previous byte shift to the next register in the
28 * chain. Thus, the first byte sent will end up in the last
29 * register at the end of the transfer. So, to have a logical
30 * numbering, store the bytes in reverse order.
31 */
32 u8 buffer[];
33 };
34
__gen_74x164_write_config(struct gen_74x164_chip * chip)35 static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
36 {
37 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
38 chip->registers);
39 }
40
gen_74x164_get_value(struct gpio_chip * gc,unsigned offset)41 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
42 {
43 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
44 u8 bank = chip->registers - 1 - offset / 8;
45 u8 pin = offset % 8;
46 int ret;
47
48 mutex_lock(&chip->lock);
49 ret = (chip->buffer[bank] >> pin) & 0x1;
50 mutex_unlock(&chip->lock);
51
52 return ret;
53 }
54
gen_74x164_set_value(struct gpio_chip * gc,unsigned offset,int val)55 static void gen_74x164_set_value(struct gpio_chip *gc,
56 unsigned offset, int val)
57 {
58 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
59 u8 bank = chip->registers - 1 - offset / 8;
60 u8 pin = offset % 8;
61
62 mutex_lock(&chip->lock);
63 if (val)
64 chip->buffer[bank] |= (1 << pin);
65 else
66 chip->buffer[bank] &= ~(1 << pin);
67
68 __gen_74x164_write_config(chip);
69 mutex_unlock(&chip->lock);
70 }
71
gen_74x164_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)72 static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
73 unsigned long *bits)
74 {
75 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
76 unsigned long offset;
77 unsigned long bankmask;
78 size_t bank;
79 unsigned long bitmask;
80
81 mutex_lock(&chip->lock);
82 for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
83 bank = chip->registers - 1 - offset / 8;
84 bitmask = bitmap_get_value8(bits, offset) & bankmask;
85
86 chip->buffer[bank] &= ~bankmask;
87 chip->buffer[bank] |= bitmask;
88 }
89 __gen_74x164_write_config(chip);
90 mutex_unlock(&chip->lock);
91 }
92
gen_74x164_direction_output(struct gpio_chip * gc,unsigned offset,int val)93 static int gen_74x164_direction_output(struct gpio_chip *gc,
94 unsigned offset, int val)
95 {
96 gen_74x164_set_value(gc, offset, val);
97 return 0;
98 }
99
gen_74x164_probe(struct spi_device * spi)100 static int gen_74x164_probe(struct spi_device *spi)
101 {
102 struct gen_74x164_chip *chip;
103 u32 nregs;
104 int ret;
105
106 /*
107 * bits_per_word cannot be configured in platform data
108 */
109 spi->bits_per_word = 8;
110
111 ret = spi_setup(spi);
112 if (ret < 0)
113 return ret;
114
115 ret = device_property_read_u32(&spi->dev, "registers-number", &nregs);
116 if (ret) {
117 dev_err(&spi->dev, "Missing 'registers-number' property.\n");
118 return -EINVAL;
119 }
120
121 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
122 if (!chip)
123 return -ENOMEM;
124
125 chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
126 GPIOD_OUT_LOW);
127 if (IS_ERR(chip->gpiod_oe))
128 return PTR_ERR(chip->gpiod_oe);
129
130 spi_set_drvdata(spi, chip);
131
132 chip->gpio_chip.label = spi->modalias;
133 chip->gpio_chip.direction_output = gen_74x164_direction_output;
134 chip->gpio_chip.get = gen_74x164_get_value;
135 chip->gpio_chip.set = gen_74x164_set_value;
136 chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
137 chip->gpio_chip.base = -1;
138
139 chip->registers = nregs;
140 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
141
142 chip->gpio_chip.can_sleep = true;
143 chip->gpio_chip.parent = &spi->dev;
144 chip->gpio_chip.owner = THIS_MODULE;
145
146 mutex_init(&chip->lock);
147
148 ret = __gen_74x164_write_config(chip);
149 if (ret) {
150 dev_err(&spi->dev, "Failed writing: %d\n", ret);
151 goto exit_destroy;
152 }
153
154 gpiod_set_value_cansleep(chip->gpiod_oe, 1);
155
156 ret = gpiochip_add_data(&chip->gpio_chip, chip);
157 if (!ret)
158 return 0;
159
160 exit_destroy:
161 mutex_destroy(&chip->lock);
162
163 return ret;
164 }
165
gen_74x164_remove(struct spi_device * spi)166 static void gen_74x164_remove(struct spi_device *spi)
167 {
168 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
169
170 gpiod_set_value_cansleep(chip->gpiod_oe, 0);
171 gpiochip_remove(&chip->gpio_chip);
172 mutex_destroy(&chip->lock);
173 }
174
175 static const struct spi_device_id gen_74x164_spi_ids[] = {
176 { .name = "74hc595" },
177 { .name = "74lvc594" },
178 {},
179 };
180 MODULE_DEVICE_TABLE(spi, gen_74x164_spi_ids);
181
182 static const struct of_device_id gen_74x164_dt_ids[] = {
183 { .compatible = "fairchild,74hc595" },
184 { .compatible = "nxp,74lvc594" },
185 {},
186 };
187 MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
188
189 static struct spi_driver gen_74x164_driver = {
190 .driver = {
191 .name = "74x164",
192 .of_match_table = gen_74x164_dt_ids,
193 },
194 .probe = gen_74x164_probe,
195 .remove = gen_74x164_remove,
196 .id_table = gen_74x164_spi_ids,
197 };
198 module_spi_driver(gen_74x164_driver);
199
200 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
201 MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
202 MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
203 MODULE_LICENSE("GPL v2");
204