xref: /openbmc/linux/drivers/gpio/gpio-74x164.c (revision bc5aa3a0)
1 /*
2  *  74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
3  *
4  *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License version 2 as
9  *  published by the Free Software Foundation.
10  */
11 
12 #include <linux/init.h>
13 #include <linux/mutex.h>
14 #include <linux/spi/spi.h>
15 #include <linux/gpio.h>
16 #include <linux/of_gpio.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 
20 #define GEN_74X164_NUMBER_GPIOS	8
21 
22 struct gen_74x164_chip {
23 	struct gpio_chip	gpio_chip;
24 	struct mutex		lock;
25 	u32			registers;
26 	/*
27 	 * Since the registers are chained, every byte sent will make
28 	 * the previous byte shift to the next register in the
29 	 * chain. Thus, the first byte sent will end up in the last
30 	 * register at the end of the transfer. So, to have a logical
31 	 * numbering, store the bytes in reverse order.
32 	 */
33 	u8			buffer[0];
34 };
35 
36 static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
37 {
38 	return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
39 			 chip->registers);
40 }
41 
42 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
43 {
44 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
45 	u8 bank = chip->registers - 1 - offset / 8;
46 	u8 pin = offset % 8;
47 	int ret;
48 
49 	mutex_lock(&chip->lock);
50 	ret = (chip->buffer[bank] >> pin) & 0x1;
51 	mutex_unlock(&chip->lock);
52 
53 	return ret;
54 }
55 
56 static void gen_74x164_set_value(struct gpio_chip *gc,
57 		unsigned offset, int val)
58 {
59 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
60 	u8 bank = chip->registers - 1 - offset / 8;
61 	u8 pin = offset % 8;
62 
63 	mutex_lock(&chip->lock);
64 	if (val)
65 		chip->buffer[bank] |= (1 << pin);
66 	else
67 		chip->buffer[bank] &= ~(1 << pin);
68 
69 	__gen_74x164_write_config(chip);
70 	mutex_unlock(&chip->lock);
71 }
72 
73 static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
74 				    unsigned long *bits)
75 {
76 	struct gen_74x164_chip *chip = gpiochip_get_data(gc);
77 	unsigned int i, idx, shift;
78 	u8 bank, bankmask;
79 
80 	mutex_lock(&chip->lock);
81 	for (i = 0, bank = chip->registers - 1; i < chip->registers;
82 	     i++, bank--) {
83 		idx = i / sizeof(*mask);
84 		shift = i % sizeof(*mask) * BITS_PER_BYTE;
85 		bankmask = mask[idx] >> shift;
86 		if (!bankmask)
87 			continue;
88 
89 		chip->buffer[bank] &= ~bankmask;
90 		chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
91 	}
92 	__gen_74x164_write_config(chip);
93 	mutex_unlock(&chip->lock);
94 }
95 
96 static int gen_74x164_direction_output(struct gpio_chip *gc,
97 		unsigned offset, int val)
98 {
99 	gen_74x164_set_value(gc, offset, val);
100 	return 0;
101 }
102 
103 static int gen_74x164_probe(struct spi_device *spi)
104 {
105 	struct gen_74x164_chip *chip;
106 	u32 nregs;
107 	int ret;
108 
109 	/*
110 	 * bits_per_word cannot be configured in platform data
111 	 */
112 	spi->bits_per_word = 8;
113 
114 	ret = spi_setup(spi);
115 	if (ret < 0)
116 		return ret;
117 
118 	if (of_property_read_u32(spi->dev.of_node, "registers-number",
119 				 &nregs)) {
120 		dev_err(&spi->dev,
121 			"Missing registers-number property in the DT.\n");
122 		return -EINVAL;
123 	}
124 
125 	chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
126 	if (!chip)
127 		return -ENOMEM;
128 
129 	spi_set_drvdata(spi, chip);
130 
131 	chip->gpio_chip.label = spi->modalias;
132 	chip->gpio_chip.direction_output = gen_74x164_direction_output;
133 	chip->gpio_chip.get = gen_74x164_get_value;
134 	chip->gpio_chip.set = gen_74x164_set_value;
135 	chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
136 	chip->gpio_chip.base = -1;
137 
138 	chip->registers = nregs;
139 	chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
140 
141 	chip->gpio_chip.can_sleep = true;
142 	chip->gpio_chip.parent = &spi->dev;
143 	chip->gpio_chip.owner = THIS_MODULE;
144 
145 	mutex_init(&chip->lock);
146 
147 	ret = __gen_74x164_write_config(chip);
148 	if (ret) {
149 		dev_err(&spi->dev, "Failed writing: %d\n", ret);
150 		goto exit_destroy;
151 	}
152 
153 	ret = gpiochip_add_data(&chip->gpio_chip, chip);
154 	if (!ret)
155 		return 0;
156 
157 exit_destroy:
158 	mutex_destroy(&chip->lock);
159 
160 	return ret;
161 }
162 
163 static int gen_74x164_remove(struct spi_device *spi)
164 {
165 	struct gen_74x164_chip *chip = spi_get_drvdata(spi);
166 
167 	gpiochip_remove(&chip->gpio_chip);
168 	mutex_destroy(&chip->lock);
169 
170 	return 0;
171 }
172 
173 static const struct of_device_id gen_74x164_dt_ids[] = {
174 	{ .compatible = "fairchild,74hc595" },
175 	{ .compatible = "nxp,74lvc594" },
176 	{},
177 };
178 MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
179 
180 static struct spi_driver gen_74x164_driver = {
181 	.driver = {
182 		.name		= "74x164",
183 		.of_match_table	= gen_74x164_dt_ids,
184 	},
185 	.probe		= gen_74x164_probe,
186 	.remove		= gen_74x164_remove,
187 };
188 module_spi_driver(gen_74x164_driver);
189 
190 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
191 MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
192 MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
193 MODULE_LICENSE("GPL v2");
194