xref: /openbmc/linux/drivers/clk/ti/composite.c (revision e2f1cf25)
1 /*
2  * TI composite clock support
3  *
4  * Copyright (C) 2013 Texas Instruments, Inc.
5  *
6  * Tero Kristo <t-kristo@ti.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13  * kind, whether express or implied; without even the implied warranty
14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 
18 #include <linux/clk-provider.h>
19 #include <linux/slab.h>
20 #include <linux/io.h>
21 #include <linux/of.h>
22 #include <linux/of_address.h>
23 #include <linux/clk/ti.h>
24 #include <linux/list.h>
25 
26 #include "clock.h"
27 
28 #undef pr_fmt
29 #define pr_fmt(fmt) "%s: " fmt, __func__
30 
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 
33 static unsigned long ti_composite_recalc_rate(struct clk_hw *hw,
34 					      unsigned long parent_rate)
35 {
36 	return ti_clk_divider_ops.recalc_rate(hw, parent_rate);
37 }
38 
39 static long ti_composite_round_rate(struct clk_hw *hw, unsigned long rate,
40 				    unsigned long *prate)
41 {
42 	return -EINVAL;
43 }
44 
45 static int ti_composite_set_rate(struct clk_hw *hw, unsigned long rate,
46 				 unsigned long parent_rate)
47 {
48 	return -EINVAL;
49 }
50 
51 static const struct clk_ops ti_composite_divider_ops = {
52 	.recalc_rate	= &ti_composite_recalc_rate,
53 	.round_rate	= &ti_composite_round_rate,
54 	.set_rate	= &ti_composite_set_rate,
55 };
56 
57 static const struct clk_ops ti_composite_gate_ops = {
58 	.enable		= &omap2_dflt_clk_enable,
59 	.disable	= &omap2_dflt_clk_disable,
60 	.is_enabled	= &omap2_dflt_clk_is_enabled,
61 };
62 
63 struct component_clk {
64 	int num_parents;
65 	const char **parent_names;
66 	struct device_node *node;
67 	int type;
68 	struct clk_hw *hw;
69 	struct list_head link;
70 };
71 
72 static const char * const component_clk_types[] __initconst = {
73 	"gate", "divider", "mux"
74 };
75 
76 static LIST_HEAD(component_clks);
77 
78 static struct device_node *_get_component_node(struct device_node *node, int i)
79 {
80 	int rc;
81 	struct of_phandle_args clkspec;
82 
83 	rc = of_parse_phandle_with_args(node, "clocks", "#clock-cells", i,
84 					&clkspec);
85 	if (rc)
86 		return NULL;
87 
88 	return clkspec.np;
89 }
90 
91 static struct component_clk *_lookup_component(struct device_node *node)
92 {
93 	struct component_clk *comp;
94 
95 	list_for_each_entry(comp, &component_clks, link) {
96 		if (comp->node == node)
97 			return comp;
98 	}
99 	return NULL;
100 }
101 
102 struct clk_hw_omap_comp {
103 	struct clk_hw hw;
104 	struct device_node *comp_nodes[CLK_COMPONENT_TYPE_MAX];
105 	struct component_clk *comp_clks[CLK_COMPONENT_TYPE_MAX];
106 };
107 
108 static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
109 {
110 	if (!clk)
111 		return NULL;
112 
113 	if (!clk->comp_clks[idx])
114 		return NULL;
115 
116 	return clk->comp_clks[idx]->hw;
117 }
118 
119 #define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw)
120 
121 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
122 struct clk *ti_clk_register_composite(struct ti_clk *setup)
123 {
124 	struct ti_clk_composite *comp;
125 	struct clk_hw *gate;
126 	struct clk_hw *mux;
127 	struct clk_hw *div;
128 	int num_parents = 1;
129 	const char **parent_names = NULL;
130 	struct clk *clk;
131 
132 	comp = setup->data;
133 
134 	div = ti_clk_build_component_div(comp->divider);
135 	gate = ti_clk_build_component_gate(comp->gate);
136 	mux = ti_clk_build_component_mux(comp->mux);
137 
138 	if (div)
139 		parent_names = &comp->divider->parent;
140 
141 	if (gate)
142 		parent_names = &comp->gate->parent;
143 
144 	if (mux) {
145 		num_parents = comp->mux->num_parents;
146 		parent_names = comp->mux->parents;
147 	}
148 
149 	clk = clk_register_composite(NULL, setup->name,
150 				     parent_names, num_parents, mux,
151 				     &ti_clk_mux_ops, div,
152 				     &ti_composite_divider_ops, gate,
153 				     &ti_composite_gate_ops, 0);
154 
155 	return clk;
156 }
157 #endif
158 
159 static void __init _register_composite(struct clk_hw *hw,
160 				       struct device_node *node)
161 {
162 	struct clk *clk;
163 	struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
164 	struct component_clk *comp;
165 	int num_parents = 0;
166 	const char **parent_names = NULL;
167 	int i;
168 
169 	/* Check for presence of each component clock */
170 	for (i = 0; i < CLK_COMPONENT_TYPE_MAX; i++) {
171 		if (!cclk->comp_nodes[i])
172 			continue;
173 
174 		comp = _lookup_component(cclk->comp_nodes[i]);
175 		if (!comp) {
176 			pr_debug("component %s not ready for %s, retry\n",
177 				 cclk->comp_nodes[i]->name, node->name);
178 			if (!ti_clk_retry_init(node, hw,
179 					       _register_composite))
180 				return;
181 
182 			goto cleanup;
183 		}
184 		if (cclk->comp_clks[comp->type] != NULL) {
185 			pr_err("duplicate component types for %s (%s)!\n",
186 			       node->name, component_clk_types[comp->type]);
187 			goto cleanup;
188 		}
189 
190 		cclk->comp_clks[comp->type] = comp;
191 
192 		/* Mark this node as found */
193 		cclk->comp_nodes[i] = NULL;
194 	}
195 
196 	/* All components exists, proceed with registration */
197 	for (i = CLK_COMPONENT_TYPE_MAX - 1; i >= 0; i--) {
198 		comp = cclk->comp_clks[i];
199 		if (!comp)
200 			continue;
201 		if (comp->num_parents) {
202 			num_parents = comp->num_parents;
203 			parent_names = comp->parent_names;
204 			break;
205 		}
206 	}
207 
208 	if (!num_parents) {
209 		pr_err("%s: no parents found for %s!\n", __func__, node->name);
210 		goto cleanup;
211 	}
212 
213 	clk = clk_register_composite(NULL, node->name,
214 				     parent_names, num_parents,
215 				     _get_hw(cclk, CLK_COMPONENT_TYPE_MUX),
216 				     &ti_clk_mux_ops,
217 				     _get_hw(cclk, CLK_COMPONENT_TYPE_DIVIDER),
218 				     &ti_composite_divider_ops,
219 				     _get_hw(cclk, CLK_COMPONENT_TYPE_GATE),
220 				     &ti_composite_gate_ops, 0);
221 
222 	if (!IS_ERR(clk))
223 		of_clk_add_provider(node, of_clk_src_simple_get, clk);
224 
225 cleanup:
226 	/* Free component clock list entries */
227 	for (i = 0; i < CLK_COMPONENT_TYPE_MAX; i++) {
228 		if (!cclk->comp_clks[i])
229 			continue;
230 		list_del(&cclk->comp_clks[i]->link);
231 		kfree(cclk->comp_clks[i]);
232 	}
233 
234 	kfree(cclk);
235 }
236 
237 static void __init of_ti_composite_clk_setup(struct device_node *node)
238 {
239 	int num_clks;
240 	int i;
241 	struct clk_hw_omap_comp *cclk;
242 
243 	/* Number of component clocks to be put inside this clock */
244 	num_clks = of_clk_get_parent_count(node);
245 
246 	if (num_clks < 1) {
247 		pr_err("composite clk %s must have component(s)\n", node->name);
248 		return;
249 	}
250 
251 	cclk = kzalloc(sizeof(*cclk), GFP_KERNEL);
252 	if (!cclk)
253 		return;
254 
255 	/* Get device node pointers for each component clock */
256 	for (i = 0; i < num_clks; i++)
257 		cclk->comp_nodes[i] = _get_component_node(node, i);
258 
259 	_register_composite(&cclk->hw, node);
260 }
261 CLK_OF_DECLARE(ti_composite_clock, "ti,composite-clock",
262 	       of_ti_composite_clk_setup);
263 
264 /**
265  * ti_clk_add_component - add a component clock to the pool
266  * @node: device node of the component clock
267  * @hw: hardware clock definition for the component clock
268  * @type: type of the component clock
269  *
270  * Adds a component clock to the list of available components, so that
271  * it can be registered by a composite clock.
272  */
273 int __init ti_clk_add_component(struct device_node *node, struct clk_hw *hw,
274 				int type)
275 {
276 	int num_parents;
277 	const char **parent_names;
278 	struct component_clk *clk;
279 	int i;
280 
281 	num_parents = of_clk_get_parent_count(node);
282 
283 	if (num_parents < 1) {
284 		pr_err("component-clock %s must have parent(s)\n", node->name);
285 		return -EINVAL;
286 	}
287 
288 	parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL);
289 	if (!parent_names)
290 		return -ENOMEM;
291 
292 	for (i = 0; i < num_parents; i++)
293 		parent_names[i] = of_clk_get_parent_name(node, i);
294 
295 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);
296 	if (!clk) {
297 		kfree(parent_names);
298 		return -ENOMEM;
299 	}
300 
301 	clk->num_parents = num_parents;
302 	clk->parent_names = parent_names;
303 	clk->hw = hw;
304 	clk->node = node;
305 	clk->type = type;
306 	list_add(&clk->link, &component_clks);
307 
308 	return 0;
309 }
310