1 /*
2  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
3  * Author: Tomasz Figa <t.figa@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * Clock driver for Exynos clock output
10  */
11 
12 #include <linux/slab.h>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/of.h>
16 #include <linux/of_address.h>
17 #include <linux/syscore_ops.h>
18 
19 #define EXYNOS_CLKOUT_NR_CLKS		1
20 #define EXYNOS_CLKOUT_PARENTS		32
21 
22 #define EXYNOS_PMU_DEBUG_REG		0xa00
23 #define EXYNOS_CLKOUT_DISABLE_SHIFT	0
24 #define EXYNOS_CLKOUT_MUX_SHIFT		8
25 #define EXYNOS4_CLKOUT_MUX_MASK		0xf
26 #define EXYNOS5_CLKOUT_MUX_MASK		0x1f
27 
28 struct exynos_clkout {
29 	struct clk_gate gate;
30 	struct clk_mux mux;
31 	spinlock_t slock;
32 	void __iomem *reg;
33 	u32 pmu_debug_save;
34 	struct clk_hw_onecell_data data;
35 };
36 
37 static struct exynos_clkout *clkout;
38 
39 static int exynos_clkout_suspend(void)
40 {
41 	clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
42 
43 	return 0;
44 }
45 
46 static void exynos_clkout_resume(void)
47 {
48 	writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
49 }
50 
51 static struct syscore_ops exynos_clkout_syscore_ops = {
52 	.suspend = exynos_clkout_suspend,
53 	.resume = exynos_clkout_resume,
54 };
55 
56 static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
57 {
58 	const char *parent_names[EXYNOS_CLKOUT_PARENTS];
59 	struct clk *parents[EXYNOS_CLKOUT_PARENTS];
60 	int parent_count;
61 	int ret;
62 	int i;
63 
64 	clkout = kzalloc(struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS),
65 			 GFP_KERNEL);
66 	if (!clkout)
67 		return;
68 
69 	spin_lock_init(&clkout->slock);
70 
71 	parent_count = 0;
72 	for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
73 		char name[] = "clkoutXX";
74 
75 		snprintf(name, sizeof(name), "clkout%d", i);
76 		parents[i] = of_clk_get_by_name(node, name);
77 		if (IS_ERR(parents[i])) {
78 			parent_names[i] = "none";
79 			continue;
80 		}
81 
82 		parent_names[i] = __clk_get_name(parents[i]);
83 		parent_count = i + 1;
84 	}
85 
86 	if (!parent_count)
87 		goto free_clkout;
88 
89 	clkout->reg = of_iomap(node, 0);
90 	if (!clkout->reg)
91 		goto clks_put;
92 
93 	clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
94 	clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
95 	clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
96 	clkout->gate.lock = &clkout->slock;
97 
98 	clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
99 	clkout->mux.mask = mux_mask;
100 	clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
101 	clkout->mux.lock = &clkout->slock;
102 
103 	clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout",
104 				parent_names, parent_count, &clkout->mux.hw,
105 				&clk_mux_ops, NULL, NULL, &clkout->gate.hw,
106 				&clk_gate_ops, CLK_SET_RATE_PARENT
107 				| CLK_SET_RATE_NO_REPARENT);
108 	if (IS_ERR(clkout->data.hws[0]))
109 		goto err_unmap;
110 
111 	clkout->data.num = EXYNOS_CLKOUT_NR_CLKS;
112 	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, &clkout->data);
113 	if (ret)
114 		goto err_clk_unreg;
115 
116 	register_syscore_ops(&exynos_clkout_syscore_ops);
117 
118 	return;
119 
120 err_clk_unreg:
121 	clk_hw_unregister(clkout->data.hws[0]);
122 err_unmap:
123 	iounmap(clkout->reg);
124 clks_put:
125 	for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
126 		if (!IS_ERR(parents[i]))
127 			clk_put(parents[i]);
128 free_clkout:
129 	kfree(clkout);
130 
131 	pr_err("%s: failed to register clkout clock\n", __func__);
132 }
133 
134 /*
135  * We use CLK_OF_DECLARE_DRIVER initialization method to avoid setting
136  * the OF_POPULATED flag on the pmu device tree node, so later the
137  * Exynos PMU platform device can be properly probed with PMU driver.
138  */
139 
140 static void __init exynos4_clkout_init(struct device_node *node)
141 {
142 	exynos_clkout_init(node, EXYNOS4_CLKOUT_MUX_MASK);
143 }
144 CLK_OF_DECLARE_DRIVER(exynos4210_clkout, "samsung,exynos4210-pmu",
145 		exynos4_clkout_init);
146 CLK_OF_DECLARE_DRIVER(exynos4412_clkout, "samsung,exynos4412-pmu",
147 		exynos4_clkout_init);
148 CLK_OF_DECLARE_DRIVER(exynos3250_clkout, "samsung,exynos3250-pmu",
149 		exynos4_clkout_init);
150 
151 static void __init exynos5_clkout_init(struct device_node *node)
152 {
153 	exynos_clkout_init(node, EXYNOS5_CLKOUT_MUX_MASK);
154 }
155 CLK_OF_DECLARE_DRIVER(exynos5250_clkout, "samsung,exynos5250-pmu",
156 		exynos5_clkout_init);
157 CLK_OF_DECLARE_DRIVER(exynos5410_clkout, "samsung,exynos5410-pmu",
158 		exynos5_clkout_init);
159 CLK_OF_DECLARE_DRIVER(exynos5420_clkout, "samsung,exynos5420-pmu",
160 		exynos5_clkout_init);
161 CLK_OF_DECLARE_DRIVER(exynos5433_clkout, "samsung,exynos5433-pmu",
162 		exynos5_clkout_init);
163