1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
4  * Author: Tomasz Figa <t.figa@samsung.com>
5  *
6  * Clock driver for Exynos clock output
7  */
8 
9 #include <linux/slab.h>
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
12 #include <linux/module.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm.h>
19 
20 #define EXYNOS_CLKOUT_NR_CLKS		1
21 #define EXYNOS_CLKOUT_PARENTS		32
22 
23 #define EXYNOS_PMU_DEBUG_REG		0xa00
24 #define EXYNOS_CLKOUT_DISABLE_SHIFT	0
25 #define EXYNOS_CLKOUT_MUX_SHIFT		8
26 #define EXYNOS4_CLKOUT_MUX_MASK		0xf
27 #define EXYNOS5_CLKOUT_MUX_MASK		0x1f
28 
29 struct exynos_clkout {
30 	struct clk_gate gate;
31 	struct clk_mux mux;
32 	spinlock_t slock;
33 	void __iomem *reg;
34 	struct device_node *np;
35 	u32 pmu_debug_save;
36 	struct clk_hw_onecell_data data;
37 };
38 
39 struct exynos_clkout_variant {
40 	u32 mux_mask;
41 };
42 
43 static const struct exynos_clkout_variant exynos_clkout_exynos4 = {
44 	.mux_mask	= EXYNOS4_CLKOUT_MUX_MASK,
45 };
46 
47 static const struct exynos_clkout_variant exynos_clkout_exynos5 = {
48 	.mux_mask	= EXYNOS5_CLKOUT_MUX_MASK,
49 };
50 
51 static const struct of_device_id exynos_clkout_ids[] = {
52 	{
53 		.compatible = "samsung,exynos3250-pmu",
54 		.data = &exynos_clkout_exynos4,
55 	}, {
56 		.compatible = "samsung,exynos4210-pmu",
57 		.data = &exynos_clkout_exynos4,
58 	}, {
59 		.compatible = "samsung,exynos4212-pmu",
60 		.data = &exynos_clkout_exynos4,
61 	}, {
62 		.compatible = "samsung,exynos4412-pmu",
63 		.data = &exynos_clkout_exynos4,
64 	}, {
65 		.compatible = "samsung,exynos5250-pmu",
66 		.data = &exynos_clkout_exynos5,
67 	}, {
68 		.compatible = "samsung,exynos5410-pmu",
69 		.data = &exynos_clkout_exynos5,
70 	}, {
71 		.compatible = "samsung,exynos5420-pmu",
72 		.data = &exynos_clkout_exynos5,
73 	}, {
74 		.compatible = "samsung,exynos5433-pmu",
75 		.data = &exynos_clkout_exynos5,
76 	}, { }
77 };
78 MODULE_DEVICE_TABLE(of, exynos_clkout_ids);
79 
80 /*
81  * Device will be instantiated as child of PMU device without its own
82  * device node.  Therefore match compatibles against parent.
83  */
84 static int exynos_clkout_match_parent_dev(struct device *dev, u32 *mux_mask)
85 {
86 	const struct exynos_clkout_variant *variant;
87 	const struct of_device_id *match;
88 
89 	if (!dev->parent) {
90 		dev_err(dev, "not instantiated from MFD\n");
91 		return -EINVAL;
92 	}
93 
94 	match = of_match_device(exynos_clkout_ids, dev->parent);
95 	if (!match) {
96 		dev_err(dev, "cannot match parent device\n");
97 		return -EINVAL;
98 	}
99 	variant = match->data;
100 
101 	*mux_mask = variant->mux_mask;
102 
103 	return 0;
104 }
105 
106 static int exynos_clkout_probe(struct platform_device *pdev)
107 {
108 	const char *parent_names[EXYNOS_CLKOUT_PARENTS];
109 	struct clk *parents[EXYNOS_CLKOUT_PARENTS];
110 	struct exynos_clkout *clkout;
111 	int parent_count, ret, i;
112 	u32 mux_mask;
113 
114 	clkout = devm_kzalloc(&pdev->dev,
115 			      struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS),
116 			      GFP_KERNEL);
117 	if (!clkout)
118 		return -ENOMEM;
119 
120 	ret = exynos_clkout_match_parent_dev(&pdev->dev, &mux_mask);
121 	if (ret)
122 		return ret;
123 
124 	clkout->np = pdev->dev.of_node;
125 	if (!clkout->np) {
126 		/*
127 		 * pdev->dev.parent was checked by exynos_clkout_match_parent_dev()
128 		 * so it is not NULL.
129 		 */
130 		clkout->np = pdev->dev.parent->of_node;
131 	}
132 
133 	platform_set_drvdata(pdev, clkout);
134 
135 	spin_lock_init(&clkout->slock);
136 
137 	parent_count = 0;
138 	for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
139 		char name[] = "clkoutXX";
140 
141 		snprintf(name, sizeof(name), "clkout%d", i);
142 		parents[i] = of_clk_get_by_name(clkout->np, name);
143 		if (IS_ERR(parents[i])) {
144 			parent_names[i] = "none";
145 			continue;
146 		}
147 
148 		parent_names[i] = __clk_get_name(parents[i]);
149 		parent_count = i + 1;
150 	}
151 
152 	if (!parent_count)
153 		return -EINVAL;
154 
155 	clkout->reg = of_iomap(clkout->np, 0);
156 	if (!clkout->reg) {
157 		ret = -ENODEV;
158 		goto clks_put;
159 	}
160 
161 	clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
162 	clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
163 	clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
164 	clkout->gate.lock = &clkout->slock;
165 
166 	clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
167 	clkout->mux.mask = mux_mask;
168 	clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
169 	clkout->mux.lock = &clkout->slock;
170 
171 	clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout",
172 				parent_names, parent_count, &clkout->mux.hw,
173 				&clk_mux_ops, NULL, NULL, &clkout->gate.hw,
174 				&clk_gate_ops, CLK_SET_RATE_PARENT
175 				| CLK_SET_RATE_NO_REPARENT);
176 	if (IS_ERR(clkout->data.hws[0])) {
177 		ret = PTR_ERR(clkout->data.hws[0]);
178 		goto err_unmap;
179 	}
180 
181 	clkout->data.num = EXYNOS_CLKOUT_NR_CLKS;
182 	ret = of_clk_add_hw_provider(clkout->np, of_clk_hw_onecell_get, &clkout->data);
183 	if (ret)
184 		goto err_clk_unreg;
185 
186 	return 0;
187 
188 err_clk_unreg:
189 	clk_hw_unregister(clkout->data.hws[0]);
190 err_unmap:
191 	iounmap(clkout->reg);
192 clks_put:
193 	for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
194 		if (!IS_ERR(parents[i]))
195 			clk_put(parents[i]);
196 
197 	dev_err(&pdev->dev, "failed to register clkout clock\n");
198 
199 	return ret;
200 }
201 
202 static void exynos_clkout_remove(struct platform_device *pdev)
203 {
204 	struct exynos_clkout *clkout = platform_get_drvdata(pdev);
205 
206 	of_clk_del_provider(clkout->np);
207 	clk_hw_unregister(clkout->data.hws[0]);
208 	iounmap(clkout->reg);
209 }
210 
211 static int __maybe_unused exynos_clkout_suspend(struct device *dev)
212 {
213 	struct exynos_clkout *clkout = dev_get_drvdata(dev);
214 
215 	clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
216 
217 	return 0;
218 }
219 
220 static int __maybe_unused exynos_clkout_resume(struct device *dev)
221 {
222 	struct exynos_clkout *clkout = dev_get_drvdata(dev);
223 
224 	writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
225 
226 	return 0;
227 }
228 
229 static SIMPLE_DEV_PM_OPS(exynos_clkout_pm_ops, exynos_clkout_suspend,
230 			 exynos_clkout_resume);
231 
232 static struct platform_driver exynos_clkout_driver = {
233 	.driver = {
234 		.name = "exynos-clkout",
235 		.of_match_table = exynos_clkout_ids,
236 		.pm = &exynos_clkout_pm_ops,
237 	},
238 	.probe = exynos_clkout_probe,
239 	.remove_new = exynos_clkout_remove,
240 };
241 module_platform_driver(exynos_clkout_driver);
242 
243 MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
244 MODULE_AUTHOR("Tomasz Figa <tomasz.figa@gmail.com>");
245 MODULE_DESCRIPTION("Samsung Exynos clock output driver");
246 MODULE_LICENSE("GPL");
247