1a4518409SSebastian Hesselbarth /* 2a4518409SSebastian Hesselbarth * Marvell EBU SoC common clock handling 3a4518409SSebastian Hesselbarth * 4a4518409SSebastian Hesselbarth * Copyright (C) 2012 Marvell 5a4518409SSebastian Hesselbarth * 6a4518409SSebastian Hesselbarth * Gregory CLEMENT <gregory.clement@free-electrons.com> 7a4518409SSebastian Hesselbarth * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 8a4518409SSebastian Hesselbarth * Andrew Lunn <andrew@lunn.ch> 9a4518409SSebastian Hesselbarth * 10a4518409SSebastian Hesselbarth * This file is licensed under the terms of the GNU General Public 11a4518409SSebastian Hesselbarth * License version 2. This program is licensed "as is" without any 12a4518409SSebastian Hesselbarth * warranty of any kind, whether express or implied. 13a4518409SSebastian Hesselbarth */ 14a4518409SSebastian Hesselbarth 15a4518409SSebastian Hesselbarth #ifndef __CLK_MVEBU_COMMON_H_ 16a4518409SSebastian Hesselbarth #define __CLK_MVEBU_COMMON_H_ 17a4518409SSebastian Hesselbarth 18a4518409SSebastian Hesselbarth #include <linux/kernel.h> 19a4518409SSebastian Hesselbarth 2087e39216SMike Turquette extern spinlock_t ctrl_gating_lock; 2187e39216SMike Turquette 22a4518409SSebastian Hesselbarth struct device_node; 23a4518409SSebastian Hesselbarth 24a4518409SSebastian Hesselbarth struct coreclk_ratio { 25a4518409SSebastian Hesselbarth int id; 26a4518409SSebastian Hesselbarth const char *name; 27a4518409SSebastian Hesselbarth }; 28a4518409SSebastian Hesselbarth 29a4518409SSebastian Hesselbarth struct coreclk_soc_desc { 30a4518409SSebastian Hesselbarth u32 (*get_tclk_freq)(void __iomem *sar); 31a4518409SSebastian Hesselbarth u32 (*get_cpu_freq)(void __iomem *sar); 32a4518409SSebastian Hesselbarth void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); 3342b5f406SThomas Petazzoni u32 (*get_refclk_freq)(void __iomem *sar); 3415917b16SGregory CLEMENT bool (*is_sscg_enabled)(void __iomem *sar); 355f093ee7SThomas Petazzoni u32 (*fix_sscg_deviation)(u32 system_clk); 36a4518409SSebastian Hesselbarth const struct coreclk_ratio *ratios; 37a4518409SSebastian Hesselbarth int num_ratios; 38a4518409SSebastian Hesselbarth }; 39a4518409SSebastian Hesselbarth 40a4518409SSebastian Hesselbarth struct clk_gating_soc_desc { 41a4518409SSebastian Hesselbarth const char *name; 42a4518409SSebastian Hesselbarth const char *parent; 43a4518409SSebastian Hesselbarth int bit_idx; 44a4518409SSebastian Hesselbarth unsigned long flags; 45a4518409SSebastian Hesselbarth }; 46a4518409SSebastian Hesselbarth 47a4518409SSebastian Hesselbarth void __init mvebu_coreclk_setup(struct device_node *np, 48a4518409SSebastian Hesselbarth const struct coreclk_soc_desc *desc); 49a4518409SSebastian Hesselbarth 50a4518409SSebastian Hesselbarth void __init mvebu_clk_gating_setup(struct device_node *np, 51a4518409SSebastian Hesselbarth const struct clk_gating_soc_desc *desc); 52a4518409SSebastian Hesselbarth 5315917b16SGregory CLEMENT /* 5415917b16SGregory CLEMENT * This function is shared among the Kirkwood, Armada 370, Armada XP 5515917b16SGregory CLEMENT * and Armada 375 SoC 5615917b16SGregory CLEMENT */ 575f093ee7SThomas Petazzoni u32 kirkwood_fix_sscg_deviation(u32 system_clk); 58a4518409SSebastian Hesselbarth #endif 59