clk: mvebu: use SPDX-License-Identifier

Convert the remaining files to SPDX license description.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kern

clk: mvebu: use SPDX-License-Identifier

Convert the remaining files to SPDX license description.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

show more ...

clk: mvebu: extend common code to allow an optional refclk

The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous So

clk: mvebu: extend common code to allow an optional refclk

The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous SoCs, it was fixed to 25 Mhz and described directly as such
in the Device Tree.

For Armada 39x, we need to read certain registers to know whether the
frequency is 25 or 40 Mhz. Therefore, this commit extends the common
mvebu clock code to allow the SoC-specific code to say it wants to
register a reference clock, by giving a non-NULL ->get_refclk_freq()
function pointer in its coreclk_soc_desc structure.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

show more ...

clk: mvebu: fix sscg node lookup

Commit 15917b16022427c53755abff4dc7051f3076dd7a ("clk: mvebu: Fix clk
frequency value if SSCG is enabled") introduced some logic in the
common mvebu clock code to ad

clk: mvebu: fix sscg node lookup

Commit 15917b16022427c53755abff4dc7051f3076dd7a ("clk: mvebu: Fix clk
frequency value if SSCG is enabled") introduced some logic in the
common mvebu clock code to adjust the clock frequency according to the
configuration of the SSCG.

In order to do this, it looks up for a DT node called "sscg" and maps
it before accessing the SSCG configuration register.

However, the lookup is currently done using:

sscg_np = of_find_node_by_name(np, "sscg");

where "np" is a pointer to the DT node of the clock for which we are
calculating the adjusted frequency. This means that if the "sscg" node
is *after* the clock node in the Device Tree, it works fine (and
that's the case for Armada 370).

However, if it turns out that the "sscg" node is *before* the clock
node in the Device Tree, it won't work because the sscg node will not
be found.

What we really want here is a search of the entire Device Tree, not
only starting from the clock node, so instead of passing "np" as first
argument of of_find_node_by_name(), we simply need to pass
NULL. Passing a non-NULL argument is typically used in a loop, so that
the search for the next matching node starts right after the node that
was matched.

This makes the "np" argument to the kirkwood_fix_sscg_deviation()
function unnecessary, which leads to further cleanups.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 15917b1602242 ("clk: mvebu: Fix clk frequency value if SSCG is enabled")
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1410880503-2322-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...

clk: mvebu: Fix clk frequency value if SSCG is enabled

When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
th

clk: mvebu: Fix clk frequency value if SSCG is enabled

When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
the clock is used for a timer it leads to a clock drift.

This patch allows to correct the affected clock when the SSCG is
enabled. The check is done in an new optional function related to each
SoC: is_sscg_enabled(). The fix is done with the other new optional
function related to each SoC: fix_sscg_deviation. If one these
functions are not present then no correction is done on the clock
frequency.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-2-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...

clk: mvebu: share locks between gate clocks

Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a
unique lock for every instance of a struct clk_gating_ctrl object. This
will be us

clk: mvebu: share locks between gate clocks

Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a
unique lock for every instance of a struct clk_gating_ctrl object. This
will be used later for a separate mux clock type that shares a register
with gate clock types and needs to use the same lock to protect access
to the register.

Cc: Andrew Lunn <andrew@lunn.ch>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

show more ...

clk: mvebu: add common clock functions for core clk and clk gating

Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
G

clk: mvebu: add common clock functions for core clk and clk gating

Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...

clk: mvebu: use SPDX-License-Identifier

Convert the remaining files to SPDX license description.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Step

clk: mvebu: use SPDX-License-Identifier

Convert the remaining files to SPDX license description.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

show more ...

clk: mvebu: extend common code to allow an optional refclk

The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the

clk: mvebu: extend common code to allow an optional refclk

The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous SoCs, it was fixed to 25 Mhz and described directly as such
in the Device Tree.

For Armada 39x, we need to read certain registers to know whether the
frequency is 25 or 40 Mhz. Therefore, this commit extends the common
mvebu clock code to allow the SoC-specific code to say it wants to
register a reference clock, by giving a non-NULL ->get_refclk_freq()
function pointer in its coreclk_soc_desc structure.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

show more ...

Merge tag 'clk-mvebu-3.18-2' of git://git.infradead.org/linux-mvebu into clk-next

clock mvebu changes for v3.18 (round 2)

- armada 370/375
- Fix SSCG node lookup

Merge tag 'clk-mvebu-3.18' of git://git.infradead.org/linux-mvebu into clk-next

clock changes for mvebu for v3.18

- correct timer drift caused by SSCG deviation
- fix typo in

Merge tag 'clk-mvebu-3.18' of git://git.infradead.org/linux-mvebu into clk-next

clock changes for mvebu for v3.18

- correct timer drift caused by SSCG deviation
- fix typo in comment

show more ...

clk: mvebu: fix sscg node lookup

Commit 15917b16022427c53755abff4dc7051f3076dd7a ("clk: mvebu: Fix clk
frequency value if SSCG is enabled") introduced some logic in the
common mvebu

clk: mvebu: fix sscg node lookup

Commit 15917b16022427c53755abff4dc7051f3076dd7a ("clk: mvebu: Fix clk
frequency value if SSCG is enabled") introduced some logic in the
common mvebu clock code to adjust the clock frequency according to the
configuration of the SSCG.

In order to do this, it looks up for a DT node called "sscg" and maps
it before accessing the SSCG configuration register.

However, the lookup is currently done using:

sscg_np = of_find_node_by_name(np, "sscg");

where "np" is a pointer to the DT node of the clock for which we are
calculating the adjusted frequency. This means that if the "sscg" node
is *after* the clock node in the Device Tree, it works fine (and
that's the case for Armada 370).

However, if it turns out that the "sscg" node is *before* the clock
node in the Device Tree, it won't work because the sscg node will not
be found.

What we really want here is a search of the entire Device Tree, not
only starting from the clock node, so instead of passing "np" as first
argument of of_find_node_by_name(), we simply need to pass
NULL. Passing a non-NULL argument is typically used in a loop, so that
the search for the next matching node starts right after the node that
was matched.

This makes the "np" argument to the kirkwood_fix_sscg_deviation()
function unnecessary, which leads to further cleanups.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 15917b1602242 ("clk: mvebu: Fix clk frequency value if SSCG is enabled")
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1410880503-2322-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...

clk: mvebu: Fix clk frequency value if SSCG is enabled

When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1%

clk: mvebu: Fix clk frequency value if SSCG is enabled

When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
the clock is used for a timer it leads to a clock drift.

This patch allows to correct the affected clock when the SSCG is
enabled. The check is done in an new optional function related to each
SoC: is_sscg_enabled(). The fix is done with the other new optional
function related to each SoC: fix_sscg_deviation. If one these
functions are not present then no correction is done on the clock
frequency.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-2-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...

clk: mvebu: share locks between gate clocks

Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a
unique lock for every instance of a struct clk_gating_ctrl object. Thi

clk: mvebu: share locks between gate clocks

Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a
unique lock for every instance of a struct clk_gating_ctrl object. This
will be used later for a separate mux clock type that shares a register
with gate clock types and needs to use the same lock to protect access
to the register.

Cc: Andrew Lunn <andrew@lunn.ch>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

show more ...

clk: mvebu: add common clock functions for core clk and clk gating

Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a si

clk: mvebu: add common clock functions for core clk and clk gating

Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

show more ...