xref: /openbmc/linux/drivers/clk/Kconfig (revision eb50fd3a)
1
2config CLKDEV_LOOKUP
3	bool
4	select HAVE_CLK
5
6config HAVE_CLK_PREPARE
7	bool
8
9config COMMON_CLK
10	bool
11	select HAVE_CLK_PREPARE
12	select CLKDEV_LOOKUP
13	select SRCU
14	select RATIONAL
15	---help---
16	  The common clock framework is a single definition of struct
17	  clk, useful across many platforms, as well as an
18	  implementation of the clock API in include/linux/clk.h.
19	  Architectures utilizing the common struct clk should select
20	  this option.
21
22menu "Common Clock Framework"
23	depends on COMMON_CLK
24
25config COMMON_CLK_WM831X
26	tristate "Clock driver for WM831x/2x PMICs"
27	depends on MFD_WM831X
28	---help---
29          Supports the clocking subsystem of the WM831x/2x series of
30	  PMICs from Wolfson Microelectronics.
31
32source "drivers/clk/versatile/Kconfig"
33
34config CLK_HSDK
35	bool "PLL Driver for HSDK platform"
36	depends on OF || COMPILE_TEST
37	---help---
38	  This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
39	  control.
40
41config COMMON_CLK_MAX77686
42	tristate "Clock driver for Maxim 77620/77686/77802 MFD"
43	depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
44	---help---
45	  This driver supports Maxim 77620/77686/77802 crystal oscillator
46	  clock.
47
48config COMMON_CLK_RK808
49	tristate "Clock driver for RK805/RK808/RK818"
50	depends on MFD_RK808
51	---help---
52	  This driver supports RK805, RK808 and RK818 crystal oscillator clock. These
53	  multi-function devices have two fixed-rate oscillators,
54	  clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
55	  by control register.
56
57config COMMON_CLK_HI655X
58	tristate "Clock driver for Hi655x"
59	depends on MFD_HI655X_PMIC || COMPILE_TEST
60	---help---
61	  This driver supports the hi655x PMIC clock. This
62	  multi-function device has one fixed-rate oscillator, clocked
63	  at 32KHz.
64
65config COMMON_CLK_SCPI
66	tristate "Clock driver controlled via SCPI interface"
67	depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
68	  ---help---
69	  This driver provides support for clocks that are controlled
70	  by firmware that implements the SCPI interface.
71
72	  This driver uses SCPI Message Protocol to interact with the
73	  firmware providing all the clock controls.
74
75config COMMON_CLK_SI5351
76	tristate "Clock driver for SiLabs 5351A/B/C"
77	depends on I2C
78	select REGMAP_I2C
79	select RATIONAL
80	---help---
81	  This driver supports Silicon Labs 5351A/B/C programmable clock
82	  generators.
83
84config COMMON_CLK_SI514
85	tristate "Clock driver for SiLabs 514 devices"
86	depends on I2C
87	depends on OF
88	select REGMAP_I2C
89	help
90	---help---
91	  This driver supports the Silicon Labs 514 programmable clock
92	  generator.
93
94config COMMON_CLK_SI570
95	tristate "Clock driver for SiLabs 570 and compatible devices"
96	depends on I2C
97	depends on OF
98	select REGMAP_I2C
99	help
100	---help---
101	  This driver supports Silicon Labs 570/571/598/599 programmable
102	  clock generators.
103
104config COMMON_CLK_CDCE706
105	tristate "Clock driver for TI CDCE706 clock synthesizer"
106	depends on I2C
107	select REGMAP_I2C
108	select RATIONAL
109	---help---
110	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
111
112config COMMON_CLK_CDCE925
113	tristate "Clock driver for TI CDCE913/925/937/949 devices"
114	depends on I2C
115	depends on OF
116	select REGMAP_I2C
117	help
118	---help---
119	  This driver supports the TI CDCE913/925/937/949 programmable clock
120	  synthesizer. Each chip has different number of PLLs and outputs.
121	  For example, the CDCE925 contains two PLLs with spread-spectrum
122	  clocking support and five output dividers. The driver only supports
123	  the following setup, and uses a fixed setting for the output muxes.
124	  Y1 is derived from the input clock
125	  Y2 and Y3 derive from PLL1
126	  Y4 and Y5 derive from PLL2
127	  Given a target output frequency, the driver will set the PLL and
128	  divider to best approximate the desired output.
129
130config COMMON_CLK_CS2000_CP
131	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
132	depends on I2C
133	help
134	  If you say yes here you get support for the CS2000 clock multiplier.
135
136config COMMON_CLK_GEMINI
137	bool "Clock driver for Cortina Systems Gemini SoC"
138	depends on ARCH_GEMINI || COMPILE_TEST
139	select MFD_SYSCON
140	select RESET_CONTROLLER
141	---help---
142	  This driver supports the SoC clocks on the Cortina Systems Gemini
143	  platform, also known as SL3516 or CS3516.
144
145config COMMON_CLK_S2MPS11
146	tristate "Clock driver for S2MPS1X/S5M8767 MFD"
147	depends on MFD_SEC_CORE || COMPILE_TEST
148	---help---
149	  This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
150	  clock. These multi-function devices have two (S2MPS14) or three
151	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
152
153config CLK_TWL6040
154	tristate "External McPDM functional clock from twl6040"
155	depends on TWL6040_CORE
156	---help---
157	  Enable the external functional clock support on OMAP4+ platforms for
158	  McPDM. McPDM module is using the external bit clock on the McPDM bus
159	  as functional clock.
160
161config COMMON_CLK_AXI_CLKGEN
162	tristate "AXI clkgen driver"
163	depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
164	help
165	---help---
166	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
167	  FPGAs. It is commonly used in Analog Devices' reference designs.
168
169config CLK_QORIQ
170	bool "Clock driver for Freescale QorIQ platforms"
171	depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
172	---help---
173	  This adds the clock driver support for Freescale QorIQ platforms
174	  using common clock framework.
175
176config COMMON_CLK_XGENE
177	bool "Clock driver for APM XGene SoC"
178	default y
179	depends on ARM64 || COMPILE_TEST
180	---help---
181	  Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
182
183config COMMON_CLK_NXP
184	def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
185	select REGMAP_MMIO if ARCH_LPC32XX
186	select MFD_SYSCON if ARCH_LPC18XX
187	---help---
188	  Support for clock providers on NXP platforms.
189
190config COMMON_CLK_PALMAS
191	tristate "Clock driver for TI Palmas devices"
192	depends on MFD_PALMAS
193	---help---
194	  This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
195	  using common clock framework.
196
197config COMMON_CLK_PWM
198	tristate "Clock driver for PWMs used as clock outputs"
199	depends on PWM
200	---help---
201	  Adapter driver so that any PWM output can be (mis)used as clock signal
202	  at 50% duty cycle.
203
204config COMMON_CLK_PXA
205	def_bool COMMON_CLK && ARCH_PXA
206	---help---
207	  Support for the Marvell PXA SoC.
208
209config COMMON_CLK_PIC32
210	def_bool COMMON_CLK && MACH_PIC32
211
212config COMMON_CLK_OXNAS
213	bool "Clock driver for the OXNAS SoC Family"
214	depends on ARCH_OXNAS || COMPILE_TEST
215	select MFD_SYSCON
216	---help---
217	  Support for the OXNAS SoC Family clocks.
218
219config COMMON_CLK_VC5
220	tristate "Clock driver for IDT VersaClock 5,6 devices"
221	depends on I2C
222	depends on OF
223	select REGMAP_I2C
224	help
225	---help---
226	  This driver supports the IDT VersaClock 5 and VersaClock 6
227	  programmable clock generators.
228
229source "drivers/clk/bcm/Kconfig"
230source "drivers/clk/hisilicon/Kconfig"
231source "drivers/clk/imgtec/Kconfig"
232source "drivers/clk/keystone/Kconfig"
233source "drivers/clk/mediatek/Kconfig"
234source "drivers/clk/meson/Kconfig"
235source "drivers/clk/mvebu/Kconfig"
236source "drivers/clk/qcom/Kconfig"
237source "drivers/clk/renesas/Kconfig"
238source "drivers/clk/samsung/Kconfig"
239source "drivers/clk/sunxi-ng/Kconfig"
240source "drivers/clk/tegra/Kconfig"
241source "drivers/clk/ti/Kconfig"
242source "drivers/clk/uniphier/Kconfig"
243
244endmenu
245