1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select SRCU 27 select RATIONAL 28 help 29 The common clock framework is a single definition of struct 30 clk, useful across many platforms, as well as an 31 implementation of the clock API in include/linux/clk.h. 32 Architectures utilizing the common struct clk should select 33 this option. 34 35if COMMON_CLK 36 37config COMMON_CLK_WM831X 38 tristate "Clock driver for WM831x/2x PMICs" 39 depends on MFD_WM831X 40 help 41 Supports the clocking subsystem of the WM831x/2x series of 42 PMICs from Wolfson Microelectronics. 43 44source "drivers/clk/versatile/Kconfig" 45 46config CLK_HSDK 47 bool "PLL Driver for HSDK platform" 48 depends on ARC_SOC_HSDK || COMPILE_TEST 49 depends on HAS_IOMEM 50 help 51 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 52 control. 53 54config LMK04832 55 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 56 depends on SPI 57 select REGMAP_SPI 58 help 59 Say yes here to build support for Texas Instruments' LMK04832 Ultra 60 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 61 62config COMMON_CLK_APPLE_NCO 63 tristate "Clock driver for Apple SoC NCOs" 64 depends on ARCH_APPLE || COMPILE_TEST 65 default ARCH_APPLE 66 help 67 This driver supports NCO (Numerically Controlled Oscillator) blocks 68 found on Apple SoCs such as t8103 (M1). The blocks are typically 69 generators of audio clocks. 70 71config COMMON_CLK_MAX77686 72 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 73 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 74 help 75 This driver supports Maxim 77620/77686/77802 crystal oscillator 76 clock. 77 78config COMMON_CLK_MAX9485 79 tristate "Maxim 9485 Programmable Clock Generator" 80 depends on I2C 81 help 82 This driver supports Maxim 9485 Programmable Audio Clock Generator 83 84config COMMON_CLK_RK808 85 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 86 depends on MFD_RK808 87 help 88 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 89 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 90 Clkout1 is always on, Clkout2 can off by control register. 91 92config COMMON_CLK_HI655X 93 tristate "Clock driver for Hi655x" if EXPERT 94 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 95 depends on REGMAP 96 default MFD_HI655X_PMIC 97 help 98 This driver supports the hi655x PMIC clock. This 99 multi-function device has one fixed-rate oscillator, clocked 100 at 32KHz. 101 102config COMMON_CLK_SCMI 103 tristate "Clock driver controlled via SCMI interface" 104 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 105 help 106 This driver provides support for clocks that are controlled 107 by firmware that implements the SCMI interface. 108 109 This driver uses SCMI Message Protocol to interact with the 110 firmware providing all the clock controls. 111 112config COMMON_CLK_SCPI 113 tristate "Clock driver controlled via SCPI interface" 114 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 115 help 116 This driver provides support for clocks that are controlled 117 by firmware that implements the SCPI interface. 118 119 This driver uses SCPI Message Protocol to interact with the 120 firmware providing all the clock controls. 121 122config COMMON_CLK_SI5341 123 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 124 depends on I2C 125 select REGMAP_I2C 126 help 127 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 128 generators. Not all features of these chips are currently supported 129 by the driver, in particular it only supports XTAL input. The chip can 130 be pre-programmed to support other configurations and features not yet 131 implemented in the driver. 132 133config COMMON_CLK_SI5351 134 tristate "Clock driver for SiLabs 5351A/B/C" 135 depends on I2C 136 select REGMAP_I2C 137 help 138 This driver supports Silicon Labs 5351A/B/C programmable clock 139 generators. 140 141config COMMON_CLK_SI514 142 tristate "Clock driver for SiLabs 514 devices" 143 depends on I2C 144 depends on OF 145 select REGMAP_I2C 146 help 147 This driver supports the Silicon Labs 514 programmable clock 148 generator. 149 150config COMMON_CLK_SI544 151 tristate "Clock driver for SiLabs 544 devices" 152 depends on I2C 153 select REGMAP_I2C 154 help 155 This driver supports the Silicon Labs 544 programmable clock 156 generator. 157 158config COMMON_CLK_SI570 159 tristate "Clock driver for SiLabs 570 and compatible devices" 160 depends on I2C 161 depends on OF 162 select REGMAP_I2C 163 help 164 This driver supports Silicon Labs 570/571/598/599 programmable 165 clock generators. 166 167config COMMON_CLK_BM1880 168 bool "Clock driver for Bitmain BM1880 SoC" 169 depends on ARCH_BITMAIN || COMPILE_TEST 170 default ARCH_BITMAIN 171 help 172 This driver supports the clocks on Bitmain BM1880 SoC. 173 174config COMMON_CLK_CDCE706 175 tristate "Clock driver for TI CDCE706 clock synthesizer" 176 depends on I2C 177 select REGMAP_I2C 178 help 179 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 180 181config COMMON_CLK_TPS68470 182 tristate "Clock Driver for TI TPS68470 PMIC" 183 depends on I2C 184 depends on INTEL_SKL_INT3472 || COMPILE_TEST 185 select REGMAP_I2C 186 help 187 This driver supports the clocks provided by the TPS68470 PMIC. 188 189config COMMON_CLK_CDCE925 190 tristate "Clock driver for TI CDCE913/925/937/949 devices" 191 depends on I2C 192 depends on OF 193 select REGMAP_I2C 194 help 195 This driver supports the TI CDCE913/925/937/949 programmable clock 196 synthesizer. Each chip has different number of PLLs and outputs. 197 For example, the CDCE925 contains two PLLs with spread-spectrum 198 clocking support and five output dividers. The driver only supports 199 the following setup, and uses a fixed setting for the output muxes. 200 Y1 is derived from the input clock 201 Y2 and Y3 derive from PLL1 202 Y4 and Y5 derive from PLL2 203 Given a target output frequency, the driver will set the PLL and 204 divider to best approximate the desired output. 205 206config COMMON_CLK_CS2000_CP 207 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 208 depends on I2C 209 select REGMAP_I2C 210 help 211 If you say yes here you get support for the CS2000 clock multiplier. 212 213config COMMON_CLK_EN7523 214 bool "Clock driver for Airoha EN7523 SoC system clocks" 215 depends on OF 216 depends on ARCH_AIROHA || COMPILE_TEST 217 default ARCH_AIROHA 218 help 219 This driver provides the fixed clocks and gates present on Airoha 220 ARM silicon. 221 222config COMMON_CLK_FSL_FLEXSPI 223 tristate "Clock driver for FlexSPI on Layerscape SoCs" 224 depends on ARCH_LAYERSCAPE || COMPILE_TEST 225 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 226 help 227 On Layerscape SoCs there is a special clock for the FlexSPI 228 interface. 229 230config COMMON_CLK_FSL_SAI 231 bool "Clock driver for BCLK of Freescale SAI cores" 232 depends on ARCH_LAYERSCAPE || COMPILE_TEST 233 help 234 This driver supports the Freescale SAI (Synchronous Audio Interface) 235 to be used as a generic clock output. Some SoCs have restrictions 236 regarding the possible pin multiplexer settings. Eg. on some SoCs 237 two SAI interfaces can only be enabled together. If just one is 238 needed, the BCLK pin of the second one can be used as general 239 purpose clock output. Ideally, it can be used to drive an audio 240 codec (sometimes known as MCLK). 241 242config COMMON_CLK_GEMINI 243 bool "Clock driver for Cortina Systems Gemini SoC" 244 depends on ARCH_GEMINI || COMPILE_TEST 245 select MFD_SYSCON 246 select RESET_CONTROLLER 247 help 248 This driver supports the SoC clocks on the Cortina Systems Gemini 249 platform, also known as SL3516 or CS3516. 250 251config COMMON_CLK_LAN966X 252 tristate "Generic Clock Controller driver for LAN966X SoC" 253 depends on HAS_IOMEM 254 depends on OF 255 depends on SOC_LAN966 || COMPILE_TEST 256 help 257 This driver provides support for Generic Clock Controller(GCK) on 258 LAN966X SoC. GCK generates and supplies clock to various peripherals 259 within the SoC. 260 261config COMMON_CLK_ASPEED 262 bool "Clock driver for Aspeed BMC SoCs" 263 depends on ARCH_ASPEED || COMPILE_TEST 264 default ARCH_ASPEED 265 select MFD_SYSCON 266 select RESET_CONTROLLER 267 help 268 This driver supports the SoC clocks on the Aspeed BMC platforms. 269 270 The G4 and G5 series, including the ast2400 and ast2500, are supported 271 by this driver. 272 273config COMMON_CLK_S2MPS11 274 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 275 depends on MFD_SEC_CORE || COMPILE_TEST 276 help 277 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 278 clock. These multi-function devices have two (S2MPS14) or three 279 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 280 281config CLK_TWL6040 282 tristate "External McPDM functional clock from twl6040" 283 depends on TWL6040_CORE 284 help 285 Enable the external functional clock support on OMAP4+ platforms for 286 McPDM. McPDM module is using the external bit clock on the McPDM bus 287 as functional clock. 288 289config COMMON_CLK_AXI_CLKGEN 290 tristate "AXI clkgen driver" 291 depends on HAS_IOMEM || COMPILE_TEST 292 depends on OF 293 help 294 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 295 FPGAs. It is commonly used in Analog Devices' reference designs. 296 297config CLK_QORIQ 298 bool "Clock driver for Freescale QorIQ platforms" 299 depends on OF 300 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 301 help 302 This adds the clock driver support for Freescale QorIQ platforms 303 using common clock framework. 304 305config CLK_LS1028A_PLLDIG 306 tristate "Clock driver for LS1028A Display output" 307 depends on ARCH_LAYERSCAPE || COMPILE_TEST 308 default ARCH_LAYERSCAPE 309 help 310 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 311 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 312 features of the PLL are currently supported by the driver. By default, 313 configured bypass mode with this PLL. 314 315config COMMON_CLK_XGENE 316 bool "Clock driver for APM XGene SoC" 317 default ARCH_XGENE 318 depends on ARM64 || COMPILE_TEST 319 help 320 Support for the APM X-Gene SoC reference, PLL, and device clocks. 321 322config COMMON_CLK_LOCHNAGAR 323 tristate "Cirrus Logic Lochnagar clock driver" 324 depends on MFD_LOCHNAGAR 325 help 326 This driver supports the clocking features of the Cirrus Logic 327 Lochnagar audio development board. 328 329config COMMON_CLK_NXP 330 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 331 select REGMAP_MMIO if ARCH_LPC32XX 332 select MFD_SYSCON if ARCH_LPC18XX 333 help 334 Support for clock providers on NXP platforms. 335 336config COMMON_CLK_PALMAS 337 tristate "Clock driver for TI Palmas devices" 338 depends on MFD_PALMAS 339 help 340 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 341 using common clock framework. 342 343config COMMON_CLK_PWM 344 tristate "Clock driver for PWMs used as clock outputs" 345 depends on PWM 346 help 347 Adapter driver so that any PWM output can be (mis)used as clock signal 348 at 50% duty cycle. 349 350config COMMON_CLK_PXA 351 def_bool COMMON_CLK && ARCH_PXA 352 help 353 Support for the Marvell PXA SoC. 354 355config COMMON_CLK_OXNAS 356 bool "Clock driver for the OXNAS SoC Family" 357 depends on ARCH_OXNAS || COMPILE_TEST 358 select MFD_SYSCON 359 help 360 Support for the OXNAS SoC Family clocks. 361 362config COMMON_CLK_RS9_PCIE 363 tristate "Clock driver for Renesas 9-series PCIe clock generators" 364 depends on I2C 365 depends on OF 366 select REGMAP_I2C 367 help 368 This driver supports the Renesas 9-series PCIe clock generator 369 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ. 370 371config COMMON_CLK_VC5 372 tristate "Clock driver for IDT VersaClock 5,6 devices" 373 depends on I2C 374 depends on OF 375 select REGMAP_I2C 376 help 377 This driver supports the IDT VersaClock 5 and VersaClock 6 378 programmable clock generators. 379 380config COMMON_CLK_VC7 381 tristate "Clock driver for Renesas Versaclock 7 devices" 382 depends on I2C 383 depends on OF 384 select REGMAP_I2C 385 help 386 Renesas Versaclock7 is a family of configurable clock generator 387 and jitter attenuator ICs with fractional and integer dividers. 388 389config COMMON_CLK_STM32MP135 390 def_bool COMMON_CLK && MACH_STM32MP13 391 help 392 Support for stm32mp135 SoC family clocks 393 394config COMMON_CLK_STM32MP157 395 def_bool COMMON_CLK && MACH_STM32MP157 396 help 397 Support for stm32mp157 SoC family clocks 398 399config COMMON_CLK_STM32F 400 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 401 help 402 Support for stm32f4 and stm32f7 SoC families clocks 403 404config COMMON_CLK_STM32H7 405 def_bool COMMON_CLK && MACH_STM32H743 406 help 407 Support for stm32h7 SoC family clocks 408 409config COMMON_CLK_MMP2 410 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 411 help 412 Support for Marvell MMP2 and MMP3 SoC clocks 413 414config COMMON_CLK_MMP2_AUDIO 415 tristate "Clock driver for MMP2 Audio subsystem" 416 depends on COMMON_CLK_MMP2 || COMPILE_TEST 417 help 418 This driver supports clocks for Audio subsystem on MMP2 SoC. 419 420config COMMON_CLK_BD718XX 421 tristate "Clock driver for 32K clk gates on ROHM PMICs" 422 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 423 help 424 This driver supports ROHM BD71837, BD71847, BD71850, BD71815 425 and BD71828 PMICs clock gates. 426 427config COMMON_CLK_FIXED_MMIO 428 bool "Clock driver for Memory Mapped Fixed values" 429 depends on COMMON_CLK && OF 430 help 431 Support for Memory Mapped IO Fixed clocks 432 433config COMMON_CLK_K210 434 bool "Clock driver for the Canaan Kendryte K210 SoC" 435 depends on OF && RISCV && SOC_CANAAN 436 default SOC_CANAAN 437 help 438 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 439 440source "drivers/clk/actions/Kconfig" 441source "drivers/clk/analogbits/Kconfig" 442source "drivers/clk/baikal-t1/Kconfig" 443source "drivers/clk/bcm/Kconfig" 444source "drivers/clk/hisilicon/Kconfig" 445source "drivers/clk/imgtec/Kconfig" 446source "drivers/clk/imx/Kconfig" 447source "drivers/clk/ingenic/Kconfig" 448source "drivers/clk/keystone/Kconfig" 449source "drivers/clk/mediatek/Kconfig" 450source "drivers/clk/meson/Kconfig" 451source "drivers/clk/mstar/Kconfig" 452source "drivers/clk/microchip/Kconfig" 453source "drivers/clk/mvebu/Kconfig" 454source "drivers/clk/pistachio/Kconfig" 455source "drivers/clk/qcom/Kconfig" 456source "drivers/clk/ralink/Kconfig" 457source "drivers/clk/renesas/Kconfig" 458source "drivers/clk/rockchip/Kconfig" 459source "drivers/clk/samsung/Kconfig" 460source "drivers/clk/sifive/Kconfig" 461source "drivers/clk/socfpga/Kconfig" 462source "drivers/clk/sprd/Kconfig" 463source "drivers/clk/starfive/Kconfig" 464source "drivers/clk/sunxi/Kconfig" 465source "drivers/clk/sunxi-ng/Kconfig" 466source "drivers/clk/tegra/Kconfig" 467source "drivers/clk/ti/Kconfig" 468source "drivers/clk/uniphier/Kconfig" 469source "drivers/clk/visconti/Kconfig" 470source "drivers/clk/x86/Kconfig" 471source "drivers/clk/xilinx/Kconfig" 472source "drivers/clk/zynqmp/Kconfig" 473 474# Kunit test cases 475config CLK_KUNIT_TEST 476 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS 477 depends on KUNIT 478 default KUNIT_ALL_TESTS 479 help 480 Kunit tests for the common clock framework. 481 482config CLK_GATE_KUNIT_TEST 483 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS 484 depends on KUNIT 485 default KUNIT_ALL_TESTS 486 help 487 Kunit test for the basic clk gate type. 488 489endif 490