xref: /openbmc/linux/drivers/bluetooth/hci_qca.c (revision 8ffdff6a)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  Bluetooth Software UART Qualcomm protocol
4  *
5  *  HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6  *  protocol extension to H4.
7  *
8  *  Copyright (C) 2007 Texas Instruments, Inc.
9  *  Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10  *
11  *  Acknowledgements:
12  *  This file is based on hci_ll.c, which was...
13  *  Written by Ohad Ben-Cohen <ohad@bencohen.org>
14  *  which was in turn based on hci_h4.c, which was written
15  *  by Maxim Krasnyansky and Marcel Holtmann.
16  */
17 
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/serdev.h>
33 #include <linux/mutex.h>
34 #include <asm/unaligned.h>
35 
36 #include <net/bluetooth/bluetooth.h>
37 #include <net/bluetooth/hci_core.h>
38 
39 #include "hci_uart.h"
40 #include "btqca.h"
41 
42 /* HCI_IBS protocol messages */
43 #define HCI_IBS_SLEEP_IND	0xFE
44 #define HCI_IBS_WAKE_IND	0xFD
45 #define HCI_IBS_WAKE_ACK	0xFC
46 #define HCI_MAX_IBS_SIZE	10
47 
48 #define IBS_WAKE_RETRANS_TIMEOUT_MS	100
49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS	200
50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS	2000
51 #define CMD_TRANS_TIMEOUT_MS		100
52 #define MEMDUMP_TIMEOUT_MS		8000
53 #define IBS_DISABLE_SSR_TIMEOUT_MS \
54 	(MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55 #define FW_DOWNLOAD_TIMEOUT_MS		3000
56 
57 /* susclk rate */
58 #define SUSCLK_RATE_32KHZ	32768
59 
60 /* Controller debug log header */
61 #define QCA_DEBUG_HANDLE	0x2EDC
62 
63 /* max retry count when init fails */
64 #define MAX_INIT_RETRIES 3
65 
66 /* Controller dump header */
67 #define QCA_SSR_DUMP_HANDLE		0x0108
68 #define QCA_DUMP_PACKET_SIZE		255
69 #define QCA_LAST_SEQUENCE_NUM		0xFFFF
70 #define QCA_CRASHBYTE_PACKET_LEN	1096
71 #define QCA_MEMDUMP_BYTE		0xFB
72 
73 enum qca_flags {
74 	QCA_IBS_DISABLED,
75 	QCA_DROP_VENDOR_EVENT,
76 	QCA_SUSPENDING,
77 	QCA_MEMDUMP_COLLECTION,
78 	QCA_HW_ERROR_EVENT,
79 	QCA_SSR_TRIGGERED,
80 	QCA_BT_OFF,
81 	QCA_ROM_FW
82 };
83 
84 enum qca_capabilities {
85 	QCA_CAP_WIDEBAND_SPEECH = BIT(0),
86 	QCA_CAP_VALID_LE_STATES = BIT(1),
87 };
88 
89 /* HCI_IBS transmit side sleep protocol states */
90 enum tx_ibs_states {
91 	HCI_IBS_TX_ASLEEP,
92 	HCI_IBS_TX_WAKING,
93 	HCI_IBS_TX_AWAKE,
94 };
95 
96 /* HCI_IBS receive side sleep protocol states */
97 enum rx_states {
98 	HCI_IBS_RX_ASLEEP,
99 	HCI_IBS_RX_AWAKE,
100 };
101 
102 /* HCI_IBS transmit and receive side clock state vote */
103 enum hci_ibs_clock_state_vote {
104 	HCI_IBS_VOTE_STATS_UPDATE,
105 	HCI_IBS_TX_VOTE_CLOCK_ON,
106 	HCI_IBS_TX_VOTE_CLOCK_OFF,
107 	HCI_IBS_RX_VOTE_CLOCK_ON,
108 	HCI_IBS_RX_VOTE_CLOCK_OFF,
109 };
110 
111 /* Controller memory dump states */
112 enum qca_memdump_states {
113 	QCA_MEMDUMP_IDLE,
114 	QCA_MEMDUMP_COLLECTING,
115 	QCA_MEMDUMP_COLLECTED,
116 	QCA_MEMDUMP_TIMEOUT,
117 };
118 
119 struct qca_memdump_data {
120 	char *memdump_buf_head;
121 	char *memdump_buf_tail;
122 	u32 current_seq_no;
123 	u32 received_dump;
124 	u32 ram_dump_size;
125 };
126 
127 struct qca_memdump_event_hdr {
128 	__u8    evt;
129 	__u8    plen;
130 	__u16   opcode;
131 	__u16   seq_no;
132 	__u8    reserved;
133 } __packed;
134 
135 
136 struct qca_dump_size {
137 	u32 dump_size;
138 } __packed;
139 
140 struct qca_data {
141 	struct hci_uart *hu;
142 	struct sk_buff *rx_skb;
143 	struct sk_buff_head txq;
144 	struct sk_buff_head tx_wait_q;	/* HCI_IBS wait queue	*/
145 	struct sk_buff_head rx_memdump_q;	/* Memdump wait queue	*/
146 	spinlock_t hci_ibs_lock;	/* HCI_IBS state lock	*/
147 	u8 tx_ibs_state;	/* HCI_IBS transmit side power state*/
148 	u8 rx_ibs_state;	/* HCI_IBS receive side power state */
149 	bool tx_vote;		/* Clock must be on for TX */
150 	bool rx_vote;		/* Clock must be on for RX */
151 	struct timer_list tx_idle_timer;
152 	u32 tx_idle_delay;
153 	struct timer_list wake_retrans_timer;
154 	u32 wake_retrans;
155 	struct workqueue_struct *workqueue;
156 	struct work_struct ws_awake_rx;
157 	struct work_struct ws_awake_device;
158 	struct work_struct ws_rx_vote_off;
159 	struct work_struct ws_tx_vote_off;
160 	struct work_struct ctrl_memdump_evt;
161 	struct delayed_work ctrl_memdump_timeout;
162 	struct qca_memdump_data *qca_memdump;
163 	unsigned long flags;
164 	struct completion drop_ev_comp;
165 	wait_queue_head_t suspend_wait_q;
166 	enum qca_memdump_states memdump_state;
167 	struct mutex hci_memdump_lock;
168 
169 	/* For debugging purpose */
170 	u64 ibs_sent_wacks;
171 	u64 ibs_sent_slps;
172 	u64 ibs_sent_wakes;
173 	u64 ibs_recv_wacks;
174 	u64 ibs_recv_slps;
175 	u64 ibs_recv_wakes;
176 	u64 vote_last_jif;
177 	u32 vote_on_ms;
178 	u32 vote_off_ms;
179 	u64 tx_votes_on;
180 	u64 rx_votes_on;
181 	u64 tx_votes_off;
182 	u64 rx_votes_off;
183 	u64 votes_on;
184 	u64 votes_off;
185 };
186 
187 enum qca_speed_type {
188 	QCA_INIT_SPEED = 1,
189 	QCA_OPER_SPEED
190 };
191 
192 /*
193  * Voltage regulator information required for configuring the
194  * QCA Bluetooth chipset
195  */
196 struct qca_vreg {
197 	const char *name;
198 	unsigned int load_uA;
199 };
200 
201 struct qca_device_data {
202 	enum qca_btsoc_type soc_type;
203 	struct qca_vreg *vregs;
204 	size_t num_vregs;
205 	uint32_t capabilities;
206 };
207 
208 /*
209  * Platform data for the QCA Bluetooth power driver.
210  */
211 struct qca_power {
212 	struct device *dev;
213 	struct regulator_bulk_data *vreg_bulk;
214 	int num_vregs;
215 	bool vregs_on;
216 };
217 
218 struct qca_serdev {
219 	struct hci_uart	 serdev_hu;
220 	struct gpio_desc *bt_en;
221 	struct clk	 *susclk;
222 	enum qca_btsoc_type btsoc_type;
223 	struct qca_power *bt_power;
224 	u32 init_speed;
225 	u32 oper_speed;
226 	const char *firmware_name;
227 };
228 
229 static int qca_regulator_enable(struct qca_serdev *qcadev);
230 static void qca_regulator_disable(struct qca_serdev *qcadev);
231 static void qca_power_shutdown(struct hci_uart *hu);
232 static int qca_power_off(struct hci_dev *hdev);
233 static void qca_controller_memdump(struct work_struct *work);
234 
235 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
236 {
237 	enum qca_btsoc_type soc_type;
238 
239 	if (hu->serdev) {
240 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
241 
242 		soc_type = qsd->btsoc_type;
243 	} else {
244 		soc_type = QCA_ROME;
245 	}
246 
247 	return soc_type;
248 }
249 
250 static const char *qca_get_firmware_name(struct hci_uart *hu)
251 {
252 	if (hu->serdev) {
253 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
254 
255 		return qsd->firmware_name;
256 	} else {
257 		return NULL;
258 	}
259 }
260 
261 static void __serial_clock_on(struct tty_struct *tty)
262 {
263 	/* TODO: Some chipset requires to enable UART clock on client
264 	 * side to save power consumption or manual work is required.
265 	 * Please put your code to control UART clock here if needed
266 	 */
267 }
268 
269 static void __serial_clock_off(struct tty_struct *tty)
270 {
271 	/* TODO: Some chipset requires to disable UART clock on client
272 	 * side to save power consumption or manual work is required.
273 	 * Please put your code to control UART clock off here if needed
274 	 */
275 }
276 
277 /* serial_clock_vote needs to be called with the ibs lock held */
278 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
279 {
280 	struct qca_data *qca = hu->priv;
281 	unsigned int diff;
282 
283 	bool old_vote = (qca->tx_vote | qca->rx_vote);
284 	bool new_vote;
285 
286 	switch (vote) {
287 	case HCI_IBS_VOTE_STATS_UPDATE:
288 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
289 
290 		if (old_vote)
291 			qca->vote_off_ms += diff;
292 		else
293 			qca->vote_on_ms += diff;
294 		return;
295 
296 	case HCI_IBS_TX_VOTE_CLOCK_ON:
297 		qca->tx_vote = true;
298 		qca->tx_votes_on++;
299 		break;
300 
301 	case HCI_IBS_RX_VOTE_CLOCK_ON:
302 		qca->rx_vote = true;
303 		qca->rx_votes_on++;
304 		break;
305 
306 	case HCI_IBS_TX_VOTE_CLOCK_OFF:
307 		qca->tx_vote = false;
308 		qca->tx_votes_off++;
309 		break;
310 
311 	case HCI_IBS_RX_VOTE_CLOCK_OFF:
312 		qca->rx_vote = false;
313 		qca->rx_votes_off++;
314 		break;
315 
316 	default:
317 		BT_ERR("Voting irregularity");
318 		return;
319 	}
320 
321 	new_vote = qca->rx_vote | qca->tx_vote;
322 
323 	if (new_vote != old_vote) {
324 		if (new_vote)
325 			__serial_clock_on(hu->tty);
326 		else
327 			__serial_clock_off(hu->tty);
328 
329 		BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
330 		       vote ? "true" : "false");
331 
332 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
333 
334 		if (new_vote) {
335 			qca->votes_on++;
336 			qca->vote_off_ms += diff;
337 		} else {
338 			qca->votes_off++;
339 			qca->vote_on_ms += diff;
340 		}
341 		qca->vote_last_jif = jiffies;
342 	}
343 }
344 
345 /* Builds and sends an HCI_IBS command packet.
346  * These are very simple packets with only 1 cmd byte.
347  */
348 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
349 {
350 	int err = 0;
351 	struct sk_buff *skb = NULL;
352 	struct qca_data *qca = hu->priv;
353 
354 	BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
355 
356 	skb = bt_skb_alloc(1, GFP_ATOMIC);
357 	if (!skb) {
358 		BT_ERR("Failed to allocate memory for HCI_IBS packet");
359 		return -ENOMEM;
360 	}
361 
362 	/* Assign HCI_IBS type */
363 	skb_put_u8(skb, cmd);
364 
365 	skb_queue_tail(&qca->txq, skb);
366 
367 	return err;
368 }
369 
370 static void qca_wq_awake_device(struct work_struct *work)
371 {
372 	struct qca_data *qca = container_of(work, struct qca_data,
373 					    ws_awake_device);
374 	struct hci_uart *hu = qca->hu;
375 	unsigned long retrans_delay;
376 	unsigned long flags;
377 
378 	BT_DBG("hu %p wq awake device", hu);
379 
380 	/* Vote for serial clock */
381 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
382 
383 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
384 
385 	/* Send wake indication to device */
386 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
387 		BT_ERR("Failed to send WAKE to device");
388 
389 	qca->ibs_sent_wakes++;
390 
391 	/* Start retransmit timer */
392 	retrans_delay = msecs_to_jiffies(qca->wake_retrans);
393 	mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
394 
395 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
396 
397 	/* Actually send the packets */
398 	hci_uart_tx_wakeup(hu);
399 }
400 
401 static void qca_wq_awake_rx(struct work_struct *work)
402 {
403 	struct qca_data *qca = container_of(work, struct qca_data,
404 					    ws_awake_rx);
405 	struct hci_uart *hu = qca->hu;
406 	unsigned long flags;
407 
408 	BT_DBG("hu %p wq awake rx", hu);
409 
410 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
411 
412 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
413 	qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
414 
415 	/* Always acknowledge device wake up,
416 	 * sending IBS message doesn't count as TX ON.
417 	 */
418 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
419 		BT_ERR("Failed to acknowledge device wake up");
420 
421 	qca->ibs_sent_wacks++;
422 
423 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
424 
425 	/* Actually send the packets */
426 	hci_uart_tx_wakeup(hu);
427 }
428 
429 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
430 {
431 	struct qca_data *qca = container_of(work, struct qca_data,
432 					    ws_rx_vote_off);
433 	struct hci_uart *hu = qca->hu;
434 
435 	BT_DBG("hu %p rx clock vote off", hu);
436 
437 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
438 }
439 
440 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
441 {
442 	struct qca_data *qca = container_of(work, struct qca_data,
443 					    ws_tx_vote_off);
444 	struct hci_uart *hu = qca->hu;
445 
446 	BT_DBG("hu %p tx clock vote off", hu);
447 
448 	/* Run HCI tx handling unlocked */
449 	hci_uart_tx_wakeup(hu);
450 
451 	/* Now that message queued to tty driver, vote for tty clocks off.
452 	 * It is up to the tty driver to pend the clocks off until tx done.
453 	 */
454 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
455 }
456 
457 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
458 {
459 	struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
460 	struct hci_uart *hu = qca->hu;
461 	unsigned long flags;
462 
463 	BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
464 
465 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
466 				 flags, SINGLE_DEPTH_NESTING);
467 
468 	switch (qca->tx_ibs_state) {
469 	case HCI_IBS_TX_AWAKE:
470 		/* TX_IDLE, go to SLEEP */
471 		if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
472 			BT_ERR("Failed to send SLEEP to device");
473 			break;
474 		}
475 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
476 		qca->ibs_sent_slps++;
477 		queue_work(qca->workqueue, &qca->ws_tx_vote_off);
478 		break;
479 
480 	case HCI_IBS_TX_ASLEEP:
481 	case HCI_IBS_TX_WAKING:
482 	default:
483 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
484 		break;
485 	}
486 
487 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
488 }
489 
490 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
491 {
492 	struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
493 	struct hci_uart *hu = qca->hu;
494 	unsigned long flags, retrans_delay;
495 	bool retransmit = false;
496 
497 	BT_DBG("hu %p wake retransmit timeout in %d state",
498 		hu, qca->tx_ibs_state);
499 
500 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
501 				 flags, SINGLE_DEPTH_NESTING);
502 
503 	/* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
504 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
505 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
506 		return;
507 	}
508 
509 	switch (qca->tx_ibs_state) {
510 	case HCI_IBS_TX_WAKING:
511 		/* No WAKE_ACK, retransmit WAKE */
512 		retransmit = true;
513 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
514 			BT_ERR("Failed to acknowledge device wake up");
515 			break;
516 		}
517 		qca->ibs_sent_wakes++;
518 		retrans_delay = msecs_to_jiffies(qca->wake_retrans);
519 		mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
520 		break;
521 
522 	case HCI_IBS_TX_ASLEEP:
523 	case HCI_IBS_TX_AWAKE:
524 	default:
525 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
526 		break;
527 	}
528 
529 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
530 
531 	if (retransmit)
532 		hci_uart_tx_wakeup(hu);
533 }
534 
535 
536 static void qca_controller_memdump_timeout(struct work_struct *work)
537 {
538 	struct qca_data *qca = container_of(work, struct qca_data,
539 					ctrl_memdump_timeout.work);
540 	struct hci_uart *hu = qca->hu;
541 
542 	mutex_lock(&qca->hci_memdump_lock);
543 	if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
544 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
545 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
546 			/* Inject hw error event to reset the device
547 			 * and driver.
548 			 */
549 			hci_reset_dev(hu->hdev);
550 		}
551 	}
552 
553 	mutex_unlock(&qca->hci_memdump_lock);
554 }
555 
556 
557 /* Initialize protocol */
558 static int qca_open(struct hci_uart *hu)
559 {
560 	struct qca_serdev *qcadev;
561 	struct qca_data *qca;
562 
563 	BT_DBG("hu %p qca_open", hu);
564 
565 	if (!hci_uart_has_flow_control(hu))
566 		return -EOPNOTSUPP;
567 
568 	qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
569 	if (!qca)
570 		return -ENOMEM;
571 
572 	skb_queue_head_init(&qca->txq);
573 	skb_queue_head_init(&qca->tx_wait_q);
574 	skb_queue_head_init(&qca->rx_memdump_q);
575 	spin_lock_init(&qca->hci_ibs_lock);
576 	mutex_init(&qca->hci_memdump_lock);
577 	qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
578 	if (!qca->workqueue) {
579 		BT_ERR("QCA Workqueue not initialized properly");
580 		kfree(qca);
581 		return -ENOMEM;
582 	}
583 
584 	INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
585 	INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
586 	INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
587 	INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
588 	INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
589 	INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
590 			  qca_controller_memdump_timeout);
591 	init_waitqueue_head(&qca->suspend_wait_q);
592 
593 	qca->hu = hu;
594 	init_completion(&qca->drop_ev_comp);
595 
596 	/* Assume we start with both sides asleep -- extra wakes OK */
597 	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
598 	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
599 
600 	qca->vote_last_jif = jiffies;
601 
602 	hu->priv = qca;
603 
604 	if (hu->serdev) {
605 		qcadev = serdev_device_get_drvdata(hu->serdev);
606 
607 		if (qca_is_wcn399x(qcadev->btsoc_type))
608 			hu->init_speed = qcadev->init_speed;
609 
610 		if (qcadev->oper_speed)
611 			hu->oper_speed = qcadev->oper_speed;
612 	}
613 
614 	timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
615 	qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
616 
617 	timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
618 	qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
619 
620 	BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
621 	       qca->tx_idle_delay, qca->wake_retrans);
622 
623 	return 0;
624 }
625 
626 static void qca_debugfs_init(struct hci_dev *hdev)
627 {
628 	struct hci_uart *hu = hci_get_drvdata(hdev);
629 	struct qca_data *qca = hu->priv;
630 	struct dentry *ibs_dir;
631 	umode_t mode;
632 
633 	if (!hdev->debugfs)
634 		return;
635 
636 	ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
637 
638 	/* read only */
639 	mode = 0444;
640 	debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
641 	debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
642 	debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
643 			   &qca->ibs_sent_slps);
644 	debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
645 			   &qca->ibs_sent_wakes);
646 	debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
647 			   &qca->ibs_sent_wacks);
648 	debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
649 			   &qca->ibs_recv_slps);
650 	debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
651 			   &qca->ibs_recv_wakes);
652 	debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
653 			   &qca->ibs_recv_wacks);
654 	debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
655 	debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
656 	debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
657 	debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
658 	debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
659 	debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
660 	debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
661 	debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
662 	debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
663 	debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
664 
665 	/* read/write */
666 	mode = 0644;
667 	debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
668 	debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
669 			   &qca->tx_idle_delay);
670 }
671 
672 /* Flush protocol data */
673 static int qca_flush(struct hci_uart *hu)
674 {
675 	struct qca_data *qca = hu->priv;
676 
677 	BT_DBG("hu %p qca flush", hu);
678 
679 	skb_queue_purge(&qca->tx_wait_q);
680 	skb_queue_purge(&qca->txq);
681 
682 	return 0;
683 }
684 
685 /* Close protocol */
686 static int qca_close(struct hci_uart *hu)
687 {
688 	struct qca_data *qca = hu->priv;
689 
690 	BT_DBG("hu %p qca close", hu);
691 
692 	serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
693 
694 	skb_queue_purge(&qca->tx_wait_q);
695 	skb_queue_purge(&qca->txq);
696 	skb_queue_purge(&qca->rx_memdump_q);
697 	del_timer(&qca->tx_idle_timer);
698 	del_timer(&qca->wake_retrans_timer);
699 	destroy_workqueue(qca->workqueue);
700 	qca->hu = NULL;
701 
702 	kfree_skb(qca->rx_skb);
703 
704 	hu->priv = NULL;
705 
706 	kfree(qca);
707 
708 	return 0;
709 }
710 
711 /* Called upon a wake-up-indication from the device.
712  */
713 static void device_want_to_wakeup(struct hci_uart *hu)
714 {
715 	unsigned long flags;
716 	struct qca_data *qca = hu->priv;
717 
718 	BT_DBG("hu %p want to wake up", hu);
719 
720 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
721 
722 	qca->ibs_recv_wakes++;
723 
724 	/* Don't wake the rx up when suspending. */
725 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
726 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
727 		return;
728 	}
729 
730 	switch (qca->rx_ibs_state) {
731 	case HCI_IBS_RX_ASLEEP:
732 		/* Make sure clock is on - we may have turned clock off since
733 		 * receiving the wake up indicator awake rx clock.
734 		 */
735 		queue_work(qca->workqueue, &qca->ws_awake_rx);
736 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
737 		return;
738 
739 	case HCI_IBS_RX_AWAKE:
740 		/* Always acknowledge device wake up,
741 		 * sending IBS message doesn't count as TX ON.
742 		 */
743 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
744 			BT_ERR("Failed to acknowledge device wake up");
745 			break;
746 		}
747 		qca->ibs_sent_wacks++;
748 		break;
749 
750 	default:
751 		/* Any other state is illegal */
752 		BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
753 		       qca->rx_ibs_state);
754 		break;
755 	}
756 
757 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
758 
759 	/* Actually send the packets */
760 	hci_uart_tx_wakeup(hu);
761 }
762 
763 /* Called upon a sleep-indication from the device.
764  */
765 static void device_want_to_sleep(struct hci_uart *hu)
766 {
767 	unsigned long flags;
768 	struct qca_data *qca = hu->priv;
769 
770 	BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
771 
772 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
773 
774 	qca->ibs_recv_slps++;
775 
776 	switch (qca->rx_ibs_state) {
777 	case HCI_IBS_RX_AWAKE:
778 		/* Update state */
779 		qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
780 		/* Vote off rx clock under workqueue */
781 		queue_work(qca->workqueue, &qca->ws_rx_vote_off);
782 		break;
783 
784 	case HCI_IBS_RX_ASLEEP:
785 		break;
786 
787 	default:
788 		/* Any other state is illegal */
789 		BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
790 		       qca->rx_ibs_state);
791 		break;
792 	}
793 
794 	wake_up_interruptible(&qca->suspend_wait_q);
795 
796 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
797 }
798 
799 /* Called upon wake-up-acknowledgement from the device
800  */
801 static void device_woke_up(struct hci_uart *hu)
802 {
803 	unsigned long flags, idle_delay;
804 	struct qca_data *qca = hu->priv;
805 	struct sk_buff *skb = NULL;
806 
807 	BT_DBG("hu %p woke up", hu);
808 
809 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
810 
811 	qca->ibs_recv_wacks++;
812 
813 	/* Don't react to the wake-up-acknowledgment when suspending. */
814 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
815 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
816 		return;
817 	}
818 
819 	switch (qca->tx_ibs_state) {
820 	case HCI_IBS_TX_AWAKE:
821 		/* Expect one if we send 2 WAKEs */
822 		BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
823 		       qca->tx_ibs_state);
824 		break;
825 
826 	case HCI_IBS_TX_WAKING:
827 		/* Send pending packets */
828 		while ((skb = skb_dequeue(&qca->tx_wait_q)))
829 			skb_queue_tail(&qca->txq, skb);
830 
831 		/* Switch timers and change state to HCI_IBS_TX_AWAKE */
832 		del_timer(&qca->wake_retrans_timer);
833 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
834 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
835 		qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
836 		break;
837 
838 	case HCI_IBS_TX_ASLEEP:
839 	default:
840 		BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
841 		       qca->tx_ibs_state);
842 		break;
843 	}
844 
845 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
846 
847 	/* Actually send the packets */
848 	hci_uart_tx_wakeup(hu);
849 }
850 
851 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
852  * two simultaneous tasklets.
853  */
854 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
855 {
856 	unsigned long flags = 0, idle_delay;
857 	struct qca_data *qca = hu->priv;
858 
859 	BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
860 	       qca->tx_ibs_state);
861 
862 	if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
863 		/* As SSR is in progress, ignore the packets */
864 		bt_dev_dbg(hu->hdev, "SSR is in progress");
865 		kfree_skb(skb);
866 		return 0;
867 	}
868 
869 	/* Prepend skb with frame type */
870 	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
871 
872 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
873 
874 	/* Don't go to sleep in middle of patch download or
875 	 * Out-Of-Band(GPIOs control) sleep is selected.
876 	 * Don't wake the device up when suspending.
877 	 */
878 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
879 	    test_bit(QCA_SUSPENDING, &qca->flags)) {
880 		skb_queue_tail(&qca->txq, skb);
881 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
882 		return 0;
883 	}
884 
885 	/* Act according to current state */
886 	switch (qca->tx_ibs_state) {
887 	case HCI_IBS_TX_AWAKE:
888 		BT_DBG("Device awake, sending normally");
889 		skb_queue_tail(&qca->txq, skb);
890 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
891 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
892 		break;
893 
894 	case HCI_IBS_TX_ASLEEP:
895 		BT_DBG("Device asleep, waking up and queueing packet");
896 		/* Save packet for later */
897 		skb_queue_tail(&qca->tx_wait_q, skb);
898 
899 		qca->tx_ibs_state = HCI_IBS_TX_WAKING;
900 		/* Schedule a work queue to wake up device */
901 		queue_work(qca->workqueue, &qca->ws_awake_device);
902 		break;
903 
904 	case HCI_IBS_TX_WAKING:
905 		BT_DBG("Device waking up, queueing packet");
906 		/* Transient state; just keep packet for later */
907 		skb_queue_tail(&qca->tx_wait_q, skb);
908 		break;
909 
910 	default:
911 		BT_ERR("Illegal tx state: %d (losing packet)",
912 		       qca->tx_ibs_state);
913 		kfree_skb(skb);
914 		break;
915 	}
916 
917 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
918 
919 	return 0;
920 }
921 
922 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
923 {
924 	struct hci_uart *hu = hci_get_drvdata(hdev);
925 
926 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
927 
928 	device_want_to_sleep(hu);
929 
930 	kfree_skb(skb);
931 	return 0;
932 }
933 
934 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
935 {
936 	struct hci_uart *hu = hci_get_drvdata(hdev);
937 
938 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
939 
940 	device_want_to_wakeup(hu);
941 
942 	kfree_skb(skb);
943 	return 0;
944 }
945 
946 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
947 {
948 	struct hci_uart *hu = hci_get_drvdata(hdev);
949 
950 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
951 
952 	device_woke_up(hu);
953 
954 	kfree_skb(skb);
955 	return 0;
956 }
957 
958 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
959 {
960 	/* We receive debug logs from chip as an ACL packets.
961 	 * Instead of sending the data to ACL to decode the
962 	 * received data, we are pushing them to the above layers
963 	 * as a diagnostic packet.
964 	 */
965 	if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
966 		return hci_recv_diag(hdev, skb);
967 
968 	return hci_recv_frame(hdev, skb);
969 }
970 
971 static void qca_controller_memdump(struct work_struct *work)
972 {
973 	struct qca_data *qca = container_of(work, struct qca_data,
974 					    ctrl_memdump_evt);
975 	struct hci_uart *hu = qca->hu;
976 	struct sk_buff *skb;
977 	struct qca_memdump_event_hdr *cmd_hdr;
978 	struct qca_memdump_data *qca_memdump = qca->qca_memdump;
979 	struct qca_dump_size *dump;
980 	char *memdump_buf;
981 	char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };
982 	u16 seq_no;
983 	u32 dump_size;
984 	u32 rx_size;
985 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
986 
987 	while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
988 
989 		mutex_lock(&qca->hci_memdump_lock);
990 		/* Skip processing the received packets if timeout detected
991 		 * or memdump collection completed.
992 		 */
993 		if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
994 		    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
995 			mutex_unlock(&qca->hci_memdump_lock);
996 			return;
997 		}
998 
999 		if (!qca_memdump) {
1000 			qca_memdump = kzalloc(sizeof(struct qca_memdump_data),
1001 					      GFP_ATOMIC);
1002 			if (!qca_memdump) {
1003 				mutex_unlock(&qca->hci_memdump_lock);
1004 				return;
1005 			}
1006 
1007 			qca->qca_memdump = qca_memdump;
1008 		}
1009 
1010 		qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1011 		cmd_hdr = (void *) skb->data;
1012 		seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1013 		skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1014 
1015 		if (!seq_no) {
1016 
1017 			/* This is the first frame of memdump packet from
1018 			 * the controller, Disable IBS to recevie dump
1019 			 * with out any interruption, ideally time required for
1020 			 * the controller to send the dump is 8 seconds. let us
1021 			 * start timer to handle this asynchronous activity.
1022 			 */
1023 			set_bit(QCA_IBS_DISABLED, &qca->flags);
1024 			set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1025 			dump = (void *) skb->data;
1026 			dump_size = __le32_to_cpu(dump->dump_size);
1027 			if (!(dump_size)) {
1028 				bt_dev_err(hu->hdev, "Rx invalid memdump size");
1029 				kfree(qca_memdump);
1030 				kfree_skb(skb);
1031 				qca->qca_memdump = NULL;
1032 				mutex_unlock(&qca->hci_memdump_lock);
1033 				return;
1034 			}
1035 
1036 			bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1037 				    dump_size);
1038 			queue_delayed_work(qca->workqueue,
1039 					   &qca->ctrl_memdump_timeout,
1040 					   msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)
1041 					  );
1042 
1043 			skb_pull(skb, sizeof(dump_size));
1044 			memdump_buf = vmalloc(dump_size);
1045 			qca_memdump->ram_dump_size = dump_size;
1046 			qca_memdump->memdump_buf_head = memdump_buf;
1047 			qca_memdump->memdump_buf_tail = memdump_buf;
1048 		}
1049 
1050 		memdump_buf = qca_memdump->memdump_buf_tail;
1051 
1052 		/* If sequence no 0 is missed then there is no point in
1053 		 * accepting the other sequences.
1054 		 */
1055 		if (!memdump_buf) {
1056 			bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1057 			kfree(qca_memdump);
1058 			kfree_skb(skb);
1059 			qca->qca_memdump = NULL;
1060 			mutex_unlock(&qca->hci_memdump_lock);
1061 			return;
1062 		}
1063 
1064 		/* There could be chance of missing some packets from
1065 		 * the controller. In such cases let us store the dummy
1066 		 * packets in the buffer.
1067 		 */
1068 		/* For QCA6390, controller does not lost packets but
1069 		 * sequence number field of packat sometimes has error
1070 		 * bits, so skip this checking for missing packet.
1071 		 */
1072 		while ((seq_no > qca_memdump->current_seq_no + 1) &&
1073 		       (soc_type != QCA_QCA6390) &&
1074 		       seq_no != QCA_LAST_SEQUENCE_NUM) {
1075 			bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1076 				   qca_memdump->current_seq_no);
1077 			rx_size = qca_memdump->received_dump;
1078 			rx_size += QCA_DUMP_PACKET_SIZE;
1079 			if (rx_size > qca_memdump->ram_dump_size) {
1080 				bt_dev_err(hu->hdev,
1081 					   "QCA memdump received %d, no space for missed packet",
1082 					   qca_memdump->received_dump);
1083 				break;
1084 			}
1085 			memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);
1086 			memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;
1087 			qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1088 			qca_memdump->current_seq_no++;
1089 		}
1090 
1091 		rx_size = qca_memdump->received_dump + skb->len;
1092 		if (rx_size <= qca_memdump->ram_dump_size) {
1093 			if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1094 			    (seq_no != qca_memdump->current_seq_no))
1095 				bt_dev_err(hu->hdev,
1096 					   "QCA memdump unexpected packet %d",
1097 					   seq_no);
1098 			bt_dev_dbg(hu->hdev,
1099 				   "QCA memdump packet %d with length %d",
1100 				   seq_no, skb->len);
1101 			memcpy(memdump_buf, (unsigned char *)skb->data,
1102 			       skb->len);
1103 			memdump_buf = memdump_buf + skb->len;
1104 			qca_memdump->memdump_buf_tail = memdump_buf;
1105 			qca_memdump->current_seq_no = seq_no + 1;
1106 			qca_memdump->received_dump += skb->len;
1107 		} else {
1108 			bt_dev_err(hu->hdev,
1109 				   "QCA memdump received %d, no space for packet %d",
1110 				   qca_memdump->received_dump, seq_no);
1111 		}
1112 		qca->qca_memdump = qca_memdump;
1113 		kfree_skb(skb);
1114 		if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1115 			bt_dev_info(hu->hdev,
1116 				    "QCA memdump Done, received %d, total %d",
1117 				    qca_memdump->received_dump,
1118 				    qca_memdump->ram_dump_size);
1119 			memdump_buf = qca_memdump->memdump_buf_head;
1120 			dev_coredumpv(&hu->serdev->dev, memdump_buf,
1121 				      qca_memdump->received_dump, GFP_KERNEL);
1122 			cancel_delayed_work(&qca->ctrl_memdump_timeout);
1123 			kfree(qca->qca_memdump);
1124 			qca->qca_memdump = NULL;
1125 			qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1126 			clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1127 		}
1128 
1129 		mutex_unlock(&qca->hci_memdump_lock);
1130 	}
1131 
1132 }
1133 
1134 static int qca_controller_memdump_event(struct hci_dev *hdev,
1135 					struct sk_buff *skb)
1136 {
1137 	struct hci_uart *hu = hci_get_drvdata(hdev);
1138 	struct qca_data *qca = hu->priv;
1139 
1140 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1141 	skb_queue_tail(&qca->rx_memdump_q, skb);
1142 	queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1143 
1144 	return 0;
1145 }
1146 
1147 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1148 {
1149 	struct hci_uart *hu = hci_get_drvdata(hdev);
1150 	struct qca_data *qca = hu->priv;
1151 
1152 	if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1153 		struct hci_event_hdr *hdr = (void *)skb->data;
1154 
1155 		/* For the WCN3990 the vendor command for a baudrate change
1156 		 * isn't sent as synchronous HCI command, because the
1157 		 * controller sends the corresponding vendor event with the
1158 		 * new baudrate. The event is received and properly decoded
1159 		 * after changing the baudrate of the host port. It needs to
1160 		 * be dropped, otherwise it can be misinterpreted as
1161 		 * response to a later firmware download command (also a
1162 		 * vendor command).
1163 		 */
1164 
1165 		if (hdr->evt == HCI_EV_VENDOR)
1166 			complete(&qca->drop_ev_comp);
1167 
1168 		kfree_skb(skb);
1169 
1170 		return 0;
1171 	}
1172 	/* We receive chip memory dump as an event packet, With a dedicated
1173 	 * handler followed by a hardware error event. When this event is
1174 	 * received we store dump into a file before closing hci. This
1175 	 * dump will help in triaging the issues.
1176 	 */
1177 	if ((skb->data[0] == HCI_VENDOR_PKT) &&
1178 	    (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1179 		return qca_controller_memdump_event(hdev, skb);
1180 
1181 	return hci_recv_frame(hdev, skb);
1182 }
1183 
1184 #define QCA_IBS_SLEEP_IND_EVENT \
1185 	.type = HCI_IBS_SLEEP_IND, \
1186 	.hlen = 0, \
1187 	.loff = 0, \
1188 	.lsize = 0, \
1189 	.maxlen = HCI_MAX_IBS_SIZE
1190 
1191 #define QCA_IBS_WAKE_IND_EVENT \
1192 	.type = HCI_IBS_WAKE_IND, \
1193 	.hlen = 0, \
1194 	.loff = 0, \
1195 	.lsize = 0, \
1196 	.maxlen = HCI_MAX_IBS_SIZE
1197 
1198 #define QCA_IBS_WAKE_ACK_EVENT \
1199 	.type = HCI_IBS_WAKE_ACK, \
1200 	.hlen = 0, \
1201 	.loff = 0, \
1202 	.lsize = 0, \
1203 	.maxlen = HCI_MAX_IBS_SIZE
1204 
1205 static const struct h4_recv_pkt qca_recv_pkts[] = {
1206 	{ H4_RECV_ACL,             .recv = qca_recv_acl_data },
1207 	{ H4_RECV_SCO,             .recv = hci_recv_frame    },
1208 	{ H4_RECV_EVENT,           .recv = qca_recv_event    },
1209 	{ QCA_IBS_WAKE_IND_EVENT,  .recv = qca_ibs_wake_ind  },
1210 	{ QCA_IBS_WAKE_ACK_EVENT,  .recv = qca_ibs_wake_ack  },
1211 	{ QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1212 };
1213 
1214 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1215 {
1216 	struct qca_data *qca = hu->priv;
1217 
1218 	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1219 		return -EUNATCH;
1220 
1221 	qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1222 				  qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1223 	if (IS_ERR(qca->rx_skb)) {
1224 		int err = PTR_ERR(qca->rx_skb);
1225 		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1226 		qca->rx_skb = NULL;
1227 		return err;
1228 	}
1229 
1230 	return count;
1231 }
1232 
1233 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1234 {
1235 	struct qca_data *qca = hu->priv;
1236 
1237 	return skb_dequeue(&qca->txq);
1238 }
1239 
1240 static uint8_t qca_get_baudrate_value(int speed)
1241 {
1242 	switch (speed) {
1243 	case 9600:
1244 		return QCA_BAUDRATE_9600;
1245 	case 19200:
1246 		return QCA_BAUDRATE_19200;
1247 	case 38400:
1248 		return QCA_BAUDRATE_38400;
1249 	case 57600:
1250 		return QCA_BAUDRATE_57600;
1251 	case 115200:
1252 		return QCA_BAUDRATE_115200;
1253 	case 230400:
1254 		return QCA_BAUDRATE_230400;
1255 	case 460800:
1256 		return QCA_BAUDRATE_460800;
1257 	case 500000:
1258 		return QCA_BAUDRATE_500000;
1259 	case 921600:
1260 		return QCA_BAUDRATE_921600;
1261 	case 1000000:
1262 		return QCA_BAUDRATE_1000000;
1263 	case 2000000:
1264 		return QCA_BAUDRATE_2000000;
1265 	case 3000000:
1266 		return QCA_BAUDRATE_3000000;
1267 	case 3200000:
1268 		return QCA_BAUDRATE_3200000;
1269 	case 3500000:
1270 		return QCA_BAUDRATE_3500000;
1271 	default:
1272 		return QCA_BAUDRATE_115200;
1273 	}
1274 }
1275 
1276 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1277 {
1278 	struct hci_uart *hu = hci_get_drvdata(hdev);
1279 	struct qca_data *qca = hu->priv;
1280 	struct sk_buff *skb;
1281 	u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1282 
1283 	if (baudrate > QCA_BAUDRATE_3200000)
1284 		return -EINVAL;
1285 
1286 	cmd[4] = baudrate;
1287 
1288 	skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1289 	if (!skb) {
1290 		bt_dev_err(hdev, "Failed to allocate baudrate packet");
1291 		return -ENOMEM;
1292 	}
1293 
1294 	/* Assign commands to change baudrate and packet type. */
1295 	skb_put_data(skb, cmd, sizeof(cmd));
1296 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1297 
1298 	skb_queue_tail(&qca->txq, skb);
1299 	hci_uart_tx_wakeup(hu);
1300 
1301 	/* Wait for the baudrate change request to be sent */
1302 
1303 	while (!skb_queue_empty(&qca->txq))
1304 		usleep_range(100, 200);
1305 
1306 	if (hu->serdev)
1307 		serdev_device_wait_until_sent(hu->serdev,
1308 		      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1309 
1310 	/* Give the controller time to process the request */
1311 	if (qca_is_wcn399x(qca_soc_type(hu)))
1312 		usleep_range(1000, 10000);
1313 	else
1314 		msleep(300);
1315 
1316 	return 0;
1317 }
1318 
1319 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1320 {
1321 	if (hu->serdev)
1322 		serdev_device_set_baudrate(hu->serdev, speed);
1323 	else
1324 		hci_uart_set_baudrate(hu, speed);
1325 }
1326 
1327 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1328 {
1329 	int ret;
1330 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1331 	u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1332 
1333 	/* These power pulses are single byte command which are sent
1334 	 * at required baudrate to wcn3990. On wcn3990, we have an external
1335 	 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1336 	 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1337 	 * and also we use the same power inputs to turn on and off for
1338 	 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1339 	 * we send a power on pulse at 115200 bps. This algorithm will help to
1340 	 * save power. Disabling hardware flow control is mandatory while
1341 	 * sending power pulses to SoC.
1342 	 */
1343 	bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1344 
1345 	serdev_device_write_flush(hu->serdev);
1346 	hci_uart_set_flow_control(hu, true);
1347 	ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1348 	if (ret < 0) {
1349 		bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1350 		return ret;
1351 	}
1352 
1353 	serdev_device_wait_until_sent(hu->serdev, timeout);
1354 	hci_uart_set_flow_control(hu, false);
1355 
1356 	/* Give to controller time to boot/shutdown */
1357 	if (on)
1358 		msleep(100);
1359 	else
1360 		usleep_range(1000, 10000);
1361 
1362 	return 0;
1363 }
1364 
1365 static unsigned int qca_get_speed(struct hci_uart *hu,
1366 				  enum qca_speed_type speed_type)
1367 {
1368 	unsigned int speed = 0;
1369 
1370 	if (speed_type == QCA_INIT_SPEED) {
1371 		if (hu->init_speed)
1372 			speed = hu->init_speed;
1373 		else if (hu->proto->init_speed)
1374 			speed = hu->proto->init_speed;
1375 	} else {
1376 		if (hu->oper_speed)
1377 			speed = hu->oper_speed;
1378 		else if (hu->proto->oper_speed)
1379 			speed = hu->proto->oper_speed;
1380 	}
1381 
1382 	return speed;
1383 }
1384 
1385 static int qca_check_speeds(struct hci_uart *hu)
1386 {
1387 	if (qca_is_wcn399x(qca_soc_type(hu))) {
1388 		if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1389 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1390 			return -EINVAL;
1391 	} else {
1392 		if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1393 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1394 			return -EINVAL;
1395 	}
1396 
1397 	return 0;
1398 }
1399 
1400 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1401 {
1402 	unsigned int speed, qca_baudrate;
1403 	struct qca_data *qca = hu->priv;
1404 	int ret = 0;
1405 
1406 	if (speed_type == QCA_INIT_SPEED) {
1407 		speed = qca_get_speed(hu, QCA_INIT_SPEED);
1408 		if (speed)
1409 			host_set_baudrate(hu, speed);
1410 	} else {
1411 		enum qca_btsoc_type soc_type = qca_soc_type(hu);
1412 
1413 		speed = qca_get_speed(hu, QCA_OPER_SPEED);
1414 		if (!speed)
1415 			return 0;
1416 
1417 		/* Disable flow control for wcn3990 to deassert RTS while
1418 		 * changing the baudrate of chip and host.
1419 		 */
1420 		if (qca_is_wcn399x(soc_type))
1421 			hci_uart_set_flow_control(hu, true);
1422 
1423 		if (soc_type == QCA_WCN3990) {
1424 			reinit_completion(&qca->drop_ev_comp);
1425 			set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1426 		}
1427 
1428 		qca_baudrate = qca_get_baudrate_value(speed);
1429 		bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1430 		ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1431 		if (ret)
1432 			goto error;
1433 
1434 		host_set_baudrate(hu, speed);
1435 
1436 error:
1437 		if (qca_is_wcn399x(soc_type))
1438 			hci_uart_set_flow_control(hu, false);
1439 
1440 		if (soc_type == QCA_WCN3990) {
1441 			/* Wait for the controller to send the vendor event
1442 			 * for the baudrate change command.
1443 			 */
1444 			if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1445 						 msecs_to_jiffies(100))) {
1446 				bt_dev_err(hu->hdev,
1447 					   "Failed to change controller baudrate\n");
1448 				ret = -ETIMEDOUT;
1449 			}
1450 
1451 			clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1452 		}
1453 	}
1454 
1455 	return ret;
1456 }
1457 
1458 static int qca_send_crashbuffer(struct hci_uart *hu)
1459 {
1460 	struct qca_data *qca = hu->priv;
1461 	struct sk_buff *skb;
1462 
1463 	skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1464 	if (!skb) {
1465 		bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1466 		return -ENOMEM;
1467 	}
1468 
1469 	/* We forcefully crash the controller, by sending 0xfb byte for
1470 	 * 1024 times. We also might have chance of losing data, To be
1471 	 * on safer side we send 1096 bytes to the SoC.
1472 	 */
1473 	memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1474 	       QCA_CRASHBYTE_PACKET_LEN);
1475 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1476 	bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1477 	skb_queue_tail(&qca->txq, skb);
1478 	hci_uart_tx_wakeup(hu);
1479 
1480 	return 0;
1481 }
1482 
1483 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1484 {
1485 	struct hci_uart *hu = hci_get_drvdata(hdev);
1486 	struct qca_data *qca = hu->priv;
1487 
1488 	wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1489 			    TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1490 
1491 	clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1492 }
1493 
1494 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1495 {
1496 	struct hci_uart *hu = hci_get_drvdata(hdev);
1497 	struct qca_data *qca = hu->priv;
1498 
1499 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1500 	set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1501 	bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1502 
1503 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1504 		/* If hardware error event received for other than QCA
1505 		 * soc memory dump event, then we need to crash the SOC
1506 		 * and wait here for 8 seconds to get the dump packets.
1507 		 * This will block main thread to be on hold until we
1508 		 * collect dump.
1509 		 */
1510 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1511 		qca_send_crashbuffer(hu);
1512 		qca_wait_for_dump_collection(hdev);
1513 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1514 		/* Let us wait here until memory dump collected or
1515 		 * memory dump timer expired.
1516 		 */
1517 		bt_dev_info(hdev, "waiting for dump to complete");
1518 		qca_wait_for_dump_collection(hdev);
1519 	}
1520 
1521 	mutex_lock(&qca->hci_memdump_lock);
1522 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1523 		bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1524 		if (qca->qca_memdump) {
1525 			vfree(qca->qca_memdump->memdump_buf_head);
1526 			kfree(qca->qca_memdump);
1527 			qca->qca_memdump = NULL;
1528 		}
1529 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1530 		cancel_delayed_work(&qca->ctrl_memdump_timeout);
1531 	}
1532 	mutex_unlock(&qca->hci_memdump_lock);
1533 
1534 	if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1535 	    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1536 		cancel_work_sync(&qca->ctrl_memdump_evt);
1537 		skb_queue_purge(&qca->rx_memdump_q);
1538 	}
1539 
1540 	clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1541 }
1542 
1543 static void qca_cmd_timeout(struct hci_dev *hdev)
1544 {
1545 	struct hci_uart *hu = hci_get_drvdata(hdev);
1546 	struct qca_data *qca = hu->priv;
1547 
1548 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1549 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1550 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1551 		qca_send_crashbuffer(hu);
1552 		qca_wait_for_dump_collection(hdev);
1553 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1554 		/* Let us wait here until memory dump collected or
1555 		 * memory dump timer expired.
1556 		 */
1557 		bt_dev_info(hdev, "waiting for dump to complete");
1558 		qca_wait_for_dump_collection(hdev);
1559 	}
1560 
1561 	mutex_lock(&qca->hci_memdump_lock);
1562 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1563 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1564 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1565 			/* Inject hw error event to reset the device
1566 			 * and driver.
1567 			 */
1568 			hci_reset_dev(hu->hdev);
1569 		}
1570 	}
1571 	mutex_unlock(&qca->hci_memdump_lock);
1572 }
1573 
1574 static int qca_wcn3990_init(struct hci_uart *hu)
1575 {
1576 	struct qca_serdev *qcadev;
1577 	int ret;
1578 
1579 	/* Check for vregs status, may be hci down has turned
1580 	 * off the voltage regulator.
1581 	 */
1582 	qcadev = serdev_device_get_drvdata(hu->serdev);
1583 	if (!qcadev->bt_power->vregs_on) {
1584 		serdev_device_close(hu->serdev);
1585 		ret = qca_regulator_enable(qcadev);
1586 		if (ret)
1587 			return ret;
1588 
1589 		ret = serdev_device_open(hu->serdev);
1590 		if (ret) {
1591 			bt_dev_err(hu->hdev, "failed to open port");
1592 			return ret;
1593 		}
1594 	}
1595 
1596 	/* Forcefully enable wcn3990 to enter in to boot mode. */
1597 	host_set_baudrate(hu, 2400);
1598 	ret = qca_send_power_pulse(hu, false);
1599 	if (ret)
1600 		return ret;
1601 
1602 	qca_set_speed(hu, QCA_INIT_SPEED);
1603 	ret = qca_send_power_pulse(hu, true);
1604 	if (ret)
1605 		return ret;
1606 
1607 	/* Now the device is in ready state to communicate with host.
1608 	 * To sync host with device we need to reopen port.
1609 	 * Without this, we will have RTS and CTS synchronization
1610 	 * issues.
1611 	 */
1612 	serdev_device_close(hu->serdev);
1613 	ret = serdev_device_open(hu->serdev);
1614 	if (ret) {
1615 		bt_dev_err(hu->hdev, "failed to open port");
1616 		return ret;
1617 	}
1618 
1619 	hci_uart_set_flow_control(hu, false);
1620 
1621 	return 0;
1622 }
1623 
1624 static int qca_power_on(struct hci_dev *hdev)
1625 {
1626 	struct hci_uart *hu = hci_get_drvdata(hdev);
1627 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1628 	struct qca_serdev *qcadev;
1629 	struct qca_data *qca = hu->priv;
1630 	int ret = 0;
1631 
1632 	/* Non-serdev device usually is powered by external power
1633 	 * and don't need additional action in driver for power on
1634 	 */
1635 	if (!hu->serdev)
1636 		return 0;
1637 
1638 	if (qca_is_wcn399x(soc_type)) {
1639 		ret = qca_wcn3990_init(hu);
1640 	} else {
1641 		qcadev = serdev_device_get_drvdata(hu->serdev);
1642 		if (qcadev->bt_en) {
1643 			gpiod_set_value_cansleep(qcadev->bt_en, 1);
1644 			/* Controller needs time to bootup. */
1645 			msleep(150);
1646 		}
1647 	}
1648 
1649 	clear_bit(QCA_BT_OFF, &qca->flags);
1650 	return ret;
1651 }
1652 
1653 static int qca_setup(struct hci_uart *hu)
1654 {
1655 	struct hci_dev *hdev = hu->hdev;
1656 	struct qca_data *qca = hu->priv;
1657 	unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1658 	unsigned int retries = 0;
1659 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1660 	const char *firmware_name = qca_get_firmware_name(hu);
1661 	int ret;
1662 	struct qca_btsoc_version ver;
1663 
1664 	ret = qca_check_speeds(hu);
1665 	if (ret)
1666 		return ret;
1667 
1668 	clear_bit(QCA_ROM_FW, &qca->flags);
1669 	/* Patch downloading has to be done without IBS mode */
1670 	set_bit(QCA_IBS_DISABLED, &qca->flags);
1671 
1672 	/* Enable controller to do both LE scan and BR/EDR inquiry
1673 	 * simultaneously.
1674 	 */
1675 	set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1676 
1677 	bt_dev_info(hdev, "setting up %s",
1678 		qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME/QCA6390");
1679 
1680 	qca->memdump_state = QCA_MEMDUMP_IDLE;
1681 
1682 retry:
1683 	ret = qca_power_on(hdev);
1684 	if (ret)
1685 		goto out;
1686 
1687 	clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1688 
1689 	if (qca_is_wcn399x(soc_type)) {
1690 		set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
1691 
1692 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1693 		if (ret)
1694 			goto out;
1695 	} else {
1696 		qca_set_speed(hu, QCA_INIT_SPEED);
1697 	}
1698 
1699 	/* Setup user speed if needed */
1700 	speed = qca_get_speed(hu, QCA_OPER_SPEED);
1701 	if (speed) {
1702 		ret = qca_set_speed(hu, QCA_OPER_SPEED);
1703 		if (ret)
1704 			goto out;
1705 
1706 		qca_baudrate = qca_get_baudrate_value(speed);
1707 	}
1708 
1709 	if (!qca_is_wcn399x(soc_type)) {
1710 		/* Get QCA version information */
1711 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1712 		if (ret)
1713 			goto out;
1714 	}
1715 
1716 	/* Setup patch / NVM configurations */
1717 	ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1718 			firmware_name);
1719 	if (!ret) {
1720 		clear_bit(QCA_IBS_DISABLED, &qca->flags);
1721 		qca_debugfs_init(hdev);
1722 		hu->hdev->hw_error = qca_hw_error;
1723 		hu->hdev->cmd_timeout = qca_cmd_timeout;
1724 	} else if (ret == -ENOENT) {
1725 		/* No patch/nvm-config found, run with original fw/config */
1726 		set_bit(QCA_ROM_FW, &qca->flags);
1727 		ret = 0;
1728 	} else if (ret == -EAGAIN) {
1729 		/*
1730 		 * Userspace firmware loader will return -EAGAIN in case no
1731 		 * patch/nvm-config is found, so run with original fw/config.
1732 		 */
1733 		set_bit(QCA_ROM_FW, &qca->flags);
1734 		ret = 0;
1735 	}
1736 
1737 out:
1738 	if (ret && retries < MAX_INIT_RETRIES) {
1739 		bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1740 		qca_power_shutdown(hu);
1741 		if (hu->serdev) {
1742 			serdev_device_close(hu->serdev);
1743 			ret = serdev_device_open(hu->serdev);
1744 			if (ret) {
1745 				bt_dev_err(hdev, "failed to open port");
1746 				return ret;
1747 			}
1748 		}
1749 		retries++;
1750 		goto retry;
1751 	}
1752 
1753 	/* Setup bdaddr */
1754 	if (soc_type == QCA_ROME)
1755 		hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1756 	else
1757 		hu->hdev->set_bdaddr = qca_set_bdaddr;
1758 
1759 	return ret;
1760 }
1761 
1762 static const struct hci_uart_proto qca_proto = {
1763 	.id		= HCI_UART_QCA,
1764 	.name		= "QCA",
1765 	.manufacturer	= 29,
1766 	.init_speed	= 115200,
1767 	.oper_speed	= 3000000,
1768 	.open		= qca_open,
1769 	.close		= qca_close,
1770 	.flush		= qca_flush,
1771 	.setup		= qca_setup,
1772 	.recv		= qca_recv,
1773 	.enqueue	= qca_enqueue,
1774 	.dequeue	= qca_dequeue,
1775 };
1776 
1777 static const struct qca_device_data qca_soc_data_wcn3990 = {
1778 	.soc_type = QCA_WCN3990,
1779 	.vregs = (struct qca_vreg []) {
1780 		{ "vddio", 15000  },
1781 		{ "vddxo", 80000  },
1782 		{ "vddrf", 300000 },
1783 		{ "vddch0", 450000 },
1784 	},
1785 	.num_vregs = 4,
1786 };
1787 
1788 static const struct qca_device_data qca_soc_data_wcn3991 = {
1789 	.soc_type = QCA_WCN3991,
1790 	.vregs = (struct qca_vreg []) {
1791 		{ "vddio", 15000  },
1792 		{ "vddxo", 80000  },
1793 		{ "vddrf", 300000 },
1794 		{ "vddch0", 450000 },
1795 	},
1796 	.num_vregs = 4,
1797 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1798 };
1799 
1800 static const struct qca_device_data qca_soc_data_wcn3998 = {
1801 	.soc_type = QCA_WCN3998,
1802 	.vregs = (struct qca_vreg []) {
1803 		{ "vddio", 10000  },
1804 		{ "vddxo", 80000  },
1805 		{ "vddrf", 300000 },
1806 		{ "vddch0", 450000 },
1807 	},
1808 	.num_vregs = 4,
1809 };
1810 
1811 static const struct qca_device_data qca_soc_data_qca6390 = {
1812 	.soc_type = QCA_QCA6390,
1813 	.num_vregs = 0,
1814 };
1815 
1816 static void qca_power_shutdown(struct hci_uart *hu)
1817 {
1818 	struct qca_serdev *qcadev;
1819 	struct qca_data *qca = hu->priv;
1820 	unsigned long flags;
1821 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1822 
1823 	qcadev = serdev_device_get_drvdata(hu->serdev);
1824 
1825 	/* From this point we go into power off state. But serial port is
1826 	 * still open, stop queueing the IBS data and flush all the buffered
1827 	 * data in skb's.
1828 	 */
1829 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
1830 	set_bit(QCA_IBS_DISABLED, &qca->flags);
1831 	qca_flush(hu);
1832 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
1833 
1834 	/* Non-serdev device usually is powered by external power
1835 	 * and don't need additional action in driver for power down
1836 	 */
1837 	if (!hu->serdev)
1838 		return;
1839 
1840 	if (qca_is_wcn399x(soc_type)) {
1841 		host_set_baudrate(hu, 2400);
1842 		qca_send_power_pulse(hu, false);
1843 		qca_regulator_disable(qcadev);
1844 	} else if (qcadev->bt_en) {
1845 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
1846 	}
1847 
1848 	set_bit(QCA_BT_OFF, &qca->flags);
1849 }
1850 
1851 static int qca_power_off(struct hci_dev *hdev)
1852 {
1853 	struct hci_uart *hu = hci_get_drvdata(hdev);
1854 	struct qca_data *qca = hu->priv;
1855 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1856 
1857 	hu->hdev->hw_error = NULL;
1858 	hu->hdev->cmd_timeout = NULL;
1859 
1860 	/* Stop sending shutdown command if soc crashes. */
1861 	if (soc_type != QCA_ROME
1862 		&& qca->memdump_state == QCA_MEMDUMP_IDLE) {
1863 		qca_send_pre_shutdown_cmd(hdev);
1864 		usleep_range(8000, 10000);
1865 	}
1866 
1867 	qca_power_shutdown(hu);
1868 	return 0;
1869 }
1870 
1871 static int qca_regulator_enable(struct qca_serdev *qcadev)
1872 {
1873 	struct qca_power *power = qcadev->bt_power;
1874 	int ret;
1875 
1876 	/* Already enabled */
1877 	if (power->vregs_on)
1878 		return 0;
1879 
1880 	BT_DBG("enabling %d regulators)", power->num_vregs);
1881 
1882 	ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
1883 	if (ret)
1884 		return ret;
1885 
1886 	power->vregs_on = true;
1887 
1888 	ret = clk_prepare_enable(qcadev->susclk);
1889 	if (ret)
1890 		qca_regulator_disable(qcadev);
1891 
1892 	return ret;
1893 }
1894 
1895 static void qca_regulator_disable(struct qca_serdev *qcadev)
1896 {
1897 	struct qca_power *power;
1898 
1899 	if (!qcadev)
1900 		return;
1901 
1902 	power = qcadev->bt_power;
1903 
1904 	/* Already disabled? */
1905 	if (!power->vregs_on)
1906 		return;
1907 
1908 	regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
1909 	power->vregs_on = false;
1910 
1911 	clk_disable_unprepare(qcadev->susclk);
1912 }
1913 
1914 static int qca_init_regulators(struct qca_power *qca,
1915 				const struct qca_vreg *vregs, size_t num_vregs)
1916 {
1917 	struct regulator_bulk_data *bulk;
1918 	int ret;
1919 	int i;
1920 
1921 	bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
1922 	if (!bulk)
1923 		return -ENOMEM;
1924 
1925 	for (i = 0; i < num_vregs; i++)
1926 		bulk[i].supply = vregs[i].name;
1927 
1928 	ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
1929 	if (ret < 0)
1930 		return ret;
1931 
1932 	for (i = 0; i < num_vregs; i++) {
1933 		ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
1934 		if (ret)
1935 			return ret;
1936 	}
1937 
1938 	qca->vreg_bulk = bulk;
1939 	qca->num_vregs = num_vregs;
1940 
1941 	return 0;
1942 }
1943 
1944 static int qca_serdev_probe(struct serdev_device *serdev)
1945 {
1946 	struct qca_serdev *qcadev;
1947 	struct hci_dev *hdev;
1948 	const struct qca_device_data *data;
1949 	int err;
1950 	bool power_ctrl_enabled = true;
1951 
1952 	qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
1953 	if (!qcadev)
1954 		return -ENOMEM;
1955 
1956 	qcadev->serdev_hu.serdev = serdev;
1957 	data = device_get_match_data(&serdev->dev);
1958 	serdev_device_set_drvdata(serdev, qcadev);
1959 	device_property_read_string(&serdev->dev, "firmware-name",
1960 					 &qcadev->firmware_name);
1961 	device_property_read_u32(&serdev->dev, "max-speed",
1962 				 &qcadev->oper_speed);
1963 	if (!qcadev->oper_speed)
1964 		BT_DBG("UART will pick default operating speed");
1965 
1966 	if (data && qca_is_wcn399x(data->soc_type)) {
1967 		qcadev->btsoc_type = data->soc_type;
1968 		qcadev->bt_power = devm_kzalloc(&serdev->dev,
1969 						sizeof(struct qca_power),
1970 						GFP_KERNEL);
1971 		if (!qcadev->bt_power)
1972 			return -ENOMEM;
1973 
1974 		qcadev->bt_power->dev = &serdev->dev;
1975 		err = qca_init_regulators(qcadev->bt_power, data->vregs,
1976 					  data->num_vregs);
1977 		if (err) {
1978 			BT_ERR("Failed to init regulators:%d", err);
1979 			return err;
1980 		}
1981 
1982 		qcadev->bt_power->vregs_on = false;
1983 
1984 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
1985 		if (IS_ERR(qcadev->susclk)) {
1986 			dev_err(&serdev->dev, "failed to acquire clk\n");
1987 			return PTR_ERR(qcadev->susclk);
1988 		}
1989 
1990 		err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1991 		if (err) {
1992 			BT_ERR("wcn3990 serdev registration failed");
1993 			return err;
1994 		}
1995 	} else {
1996 		if (data)
1997 			qcadev->btsoc_type = data->soc_type;
1998 		else
1999 			qcadev->btsoc_type = QCA_ROME;
2000 
2001 		qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2002 					       GPIOD_OUT_LOW);
2003 		if (!qcadev->bt_en) {
2004 			dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2005 			power_ctrl_enabled = false;
2006 		}
2007 
2008 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2009 		if (IS_ERR(qcadev->susclk)) {
2010 			dev_warn(&serdev->dev, "failed to acquire clk\n");
2011 			return PTR_ERR(qcadev->susclk);
2012 		}
2013 		err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2014 		if (err)
2015 			return err;
2016 
2017 		err = clk_prepare_enable(qcadev->susclk);
2018 		if (err)
2019 			return err;
2020 
2021 		err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2022 		if (err) {
2023 			BT_ERR("Rome serdev registration failed");
2024 			clk_disable_unprepare(qcadev->susclk);
2025 			return err;
2026 		}
2027 	}
2028 
2029 	hdev = qcadev->serdev_hu.hdev;
2030 
2031 	if (power_ctrl_enabled) {
2032 		set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2033 		hdev->shutdown = qca_power_off;
2034 	}
2035 
2036 	if (data) {
2037 		/* Wideband speech support must be set per driver since it can't
2038 		 * be queried via hci. Same with the valid le states quirk.
2039 		 */
2040 		if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2041 			set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2042 				&hdev->quirks);
2043 
2044 		if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2045 			set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2046 	}
2047 
2048 	return 0;
2049 }
2050 
2051 static void qca_serdev_remove(struct serdev_device *serdev)
2052 {
2053 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2054 	struct qca_power *power = qcadev->bt_power;
2055 
2056 	if (qca_is_wcn399x(qcadev->btsoc_type) && power->vregs_on)
2057 		qca_power_shutdown(&qcadev->serdev_hu);
2058 	else if (qcadev->susclk)
2059 		clk_disable_unprepare(qcadev->susclk);
2060 
2061 	hci_uart_unregister_device(&qcadev->serdev_hu);
2062 }
2063 
2064 static void qca_serdev_shutdown(struct device *dev)
2065 {
2066 	int ret;
2067 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2068 	struct serdev_device *serdev = to_serdev_device(dev);
2069 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2070 	const u8 ibs_wake_cmd[] = { 0xFD };
2071 	const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2072 
2073 	if (qcadev->btsoc_type == QCA_QCA6390) {
2074 		serdev_device_write_flush(serdev);
2075 		ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2076 					      sizeof(ibs_wake_cmd));
2077 		if (ret < 0) {
2078 			BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2079 			return;
2080 		}
2081 		serdev_device_wait_until_sent(serdev, timeout);
2082 		usleep_range(8000, 10000);
2083 
2084 		serdev_device_write_flush(serdev);
2085 		ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2086 					      sizeof(edl_reset_soc_cmd));
2087 		if (ret < 0) {
2088 			BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2089 			return;
2090 		}
2091 		serdev_device_wait_until_sent(serdev, timeout);
2092 		usleep_range(8000, 10000);
2093 	}
2094 }
2095 
2096 static int __maybe_unused qca_suspend(struct device *dev)
2097 {
2098 	struct serdev_device *serdev = to_serdev_device(dev);
2099 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2100 	struct hci_uart *hu = &qcadev->serdev_hu;
2101 	struct qca_data *qca = hu->priv;
2102 	unsigned long flags;
2103 	bool tx_pending = false;
2104 	int ret = 0;
2105 	u8 cmd;
2106 	u32 wait_timeout = 0;
2107 
2108 	set_bit(QCA_SUSPENDING, &qca->flags);
2109 
2110 	/* if BT SoC is running with default firmware then it does not
2111 	 * support in-band sleep
2112 	 */
2113 	if (test_bit(QCA_ROM_FW, &qca->flags))
2114 		return 0;
2115 
2116 	/* During SSR after memory dump collection, controller will be
2117 	 * powered off and then powered on.If controller is powered off
2118 	 * during SSR then we should wait until SSR is completed.
2119 	 */
2120 	if (test_bit(QCA_BT_OFF, &qca->flags) &&
2121 	    !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2122 		return 0;
2123 
2124 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2125 	    test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2126 		wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2127 					IBS_DISABLE_SSR_TIMEOUT_MS :
2128 					FW_DOWNLOAD_TIMEOUT_MS;
2129 
2130 		/* QCA_IBS_DISABLED flag is set to true, During FW download
2131 		 * and during memory dump collection. It is reset to false,
2132 		 * After FW download complete.
2133 		 */
2134 		wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2135 			    TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2136 
2137 		if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2138 			bt_dev_err(hu->hdev, "SSR or FW download time out");
2139 			ret = -ETIMEDOUT;
2140 			goto error;
2141 		}
2142 	}
2143 
2144 	cancel_work_sync(&qca->ws_awake_device);
2145 	cancel_work_sync(&qca->ws_awake_rx);
2146 
2147 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2148 				 flags, SINGLE_DEPTH_NESTING);
2149 
2150 	switch (qca->tx_ibs_state) {
2151 	case HCI_IBS_TX_WAKING:
2152 		del_timer(&qca->wake_retrans_timer);
2153 		fallthrough;
2154 	case HCI_IBS_TX_AWAKE:
2155 		del_timer(&qca->tx_idle_timer);
2156 
2157 		serdev_device_write_flush(hu->serdev);
2158 		cmd = HCI_IBS_SLEEP_IND;
2159 		ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2160 
2161 		if (ret < 0) {
2162 			BT_ERR("Failed to send SLEEP to device");
2163 			break;
2164 		}
2165 
2166 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2167 		qca->ibs_sent_slps++;
2168 		tx_pending = true;
2169 		break;
2170 
2171 	case HCI_IBS_TX_ASLEEP:
2172 		break;
2173 
2174 	default:
2175 		BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2176 		ret = -EINVAL;
2177 		break;
2178 	}
2179 
2180 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2181 
2182 	if (ret < 0)
2183 		goto error;
2184 
2185 	if (tx_pending) {
2186 		serdev_device_wait_until_sent(hu->serdev,
2187 					      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2188 		serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2189 	}
2190 
2191 	/* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2192 	 * to sleep, so that the packet does not wake the system later.
2193 	 */
2194 	ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2195 			qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2196 			msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2197 	if (ret == 0) {
2198 		ret = -ETIMEDOUT;
2199 		goto error;
2200 	}
2201 
2202 	return 0;
2203 
2204 error:
2205 	clear_bit(QCA_SUSPENDING, &qca->flags);
2206 
2207 	return ret;
2208 }
2209 
2210 static int __maybe_unused qca_resume(struct device *dev)
2211 {
2212 	struct serdev_device *serdev = to_serdev_device(dev);
2213 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2214 	struct hci_uart *hu = &qcadev->serdev_hu;
2215 	struct qca_data *qca = hu->priv;
2216 
2217 	clear_bit(QCA_SUSPENDING, &qca->flags);
2218 
2219 	return 0;
2220 }
2221 
2222 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2223 
2224 #ifdef CONFIG_OF
2225 static const struct of_device_id qca_bluetooth_of_match[] = {
2226 	{ .compatible = "qcom,qca6174-bt" },
2227 	{ .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2228 	{ .compatible = "qcom,qca9377-bt" },
2229 	{ .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2230 	{ .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2231 	{ .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2232 	{ /* sentinel */ }
2233 };
2234 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2235 #endif
2236 
2237 #ifdef CONFIG_ACPI
2238 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2239 	{ "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2240 	{ "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2241 	{ "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2242 	{ "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2243 	{ },
2244 };
2245 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2246 #endif
2247 
2248 
2249 static struct serdev_device_driver qca_serdev_driver = {
2250 	.probe = qca_serdev_probe,
2251 	.remove = qca_serdev_remove,
2252 	.driver = {
2253 		.name = "hci_uart_qca",
2254 		.of_match_table = of_match_ptr(qca_bluetooth_of_match),
2255 		.acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2256 		.shutdown = qca_serdev_shutdown,
2257 		.pm = &qca_pm_ops,
2258 	},
2259 };
2260 
2261 int __init qca_init(void)
2262 {
2263 	serdev_device_driver_register(&qca_serdev_driver);
2264 
2265 	return hci_uart_register_proto(&qca_proto);
2266 }
2267 
2268 int __exit qca_deinit(void)
2269 {
2270 	serdev_device_driver_unregister(&qca_serdev_driver);
2271 
2272 	return hci_uart_unregister_proto(&qca_proto);
2273 }
2274