xref: /openbmc/linux/drivers/bluetooth/hci_qca.c (revision 7288dd2f)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  Bluetooth Software UART Qualcomm protocol
4  *
5  *  HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6  *  protocol extension to H4.
7  *
8  *  Copyright (C) 2007 Texas Instruments, Inc.
9  *  Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10  *
11  *  Acknowledgements:
12  *  This file is based on hci_ll.c, which was...
13  *  Written by Ohad Ben-Cohen <ohad@bencohen.org>
14  *  which was in turn based on hci_h4.c, which was written
15  *  by Maxim Krasnyansky and Marcel Holtmann.
16  */
17 
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/serdev.h>
33 #include <linux/mutex.h>
34 #include <asm/unaligned.h>
35 
36 #include <net/bluetooth/bluetooth.h>
37 #include <net/bluetooth/hci_core.h>
38 
39 #include "hci_uart.h"
40 #include "btqca.h"
41 
42 /* HCI_IBS protocol messages */
43 #define HCI_IBS_SLEEP_IND	0xFE
44 #define HCI_IBS_WAKE_IND	0xFD
45 #define HCI_IBS_WAKE_ACK	0xFC
46 #define HCI_MAX_IBS_SIZE	10
47 
48 #define IBS_WAKE_RETRANS_TIMEOUT_MS	100
49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS	200
50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS	2000
51 #define CMD_TRANS_TIMEOUT_MS		100
52 #define MEMDUMP_TIMEOUT_MS		8000
53 #define IBS_DISABLE_SSR_TIMEOUT_MS \
54 	(MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55 #define FW_DOWNLOAD_TIMEOUT_MS		3000
56 
57 /* susclk rate */
58 #define SUSCLK_RATE_32KHZ	32768
59 
60 /* Controller debug log header */
61 #define QCA_DEBUG_HANDLE	0x2EDC
62 
63 /* max retry count when init fails */
64 #define MAX_INIT_RETRIES 3
65 
66 /* Controller dump header */
67 #define QCA_SSR_DUMP_HANDLE		0x0108
68 #define QCA_DUMP_PACKET_SIZE		255
69 #define QCA_LAST_SEQUENCE_NUM		0xFFFF
70 #define QCA_CRASHBYTE_PACKET_LEN	1096
71 #define QCA_MEMDUMP_BYTE		0xFB
72 
73 enum qca_flags {
74 	QCA_IBS_DISABLED,
75 	QCA_DROP_VENDOR_EVENT,
76 	QCA_SUSPENDING,
77 	QCA_MEMDUMP_COLLECTION,
78 	QCA_HW_ERROR_EVENT,
79 	QCA_SSR_TRIGGERED,
80 	QCA_BT_OFF,
81 	QCA_ROM_FW,
82 	QCA_DEBUGFS_CREATED,
83 };
84 
85 enum qca_capabilities {
86 	QCA_CAP_WIDEBAND_SPEECH = BIT(0),
87 	QCA_CAP_VALID_LE_STATES = BIT(1),
88 };
89 
90 /* HCI_IBS transmit side sleep protocol states */
91 enum tx_ibs_states {
92 	HCI_IBS_TX_ASLEEP,
93 	HCI_IBS_TX_WAKING,
94 	HCI_IBS_TX_AWAKE,
95 };
96 
97 /* HCI_IBS receive side sleep protocol states */
98 enum rx_states {
99 	HCI_IBS_RX_ASLEEP,
100 	HCI_IBS_RX_AWAKE,
101 };
102 
103 /* HCI_IBS transmit and receive side clock state vote */
104 enum hci_ibs_clock_state_vote {
105 	HCI_IBS_VOTE_STATS_UPDATE,
106 	HCI_IBS_TX_VOTE_CLOCK_ON,
107 	HCI_IBS_TX_VOTE_CLOCK_OFF,
108 	HCI_IBS_RX_VOTE_CLOCK_ON,
109 	HCI_IBS_RX_VOTE_CLOCK_OFF,
110 };
111 
112 /* Controller memory dump states */
113 enum qca_memdump_states {
114 	QCA_MEMDUMP_IDLE,
115 	QCA_MEMDUMP_COLLECTING,
116 	QCA_MEMDUMP_COLLECTED,
117 	QCA_MEMDUMP_TIMEOUT,
118 };
119 
120 struct qca_memdump_info {
121 	u32 current_seq_no;
122 	u32 received_dump;
123 	u32 ram_dump_size;
124 };
125 
126 struct qca_memdump_event_hdr {
127 	__u8    evt;
128 	__u8    plen;
129 	__u16   opcode;
130 	__le16   seq_no;
131 	__u8    reserved;
132 } __packed;
133 
134 
135 struct qca_dump_size {
136 	__le32 dump_size;
137 } __packed;
138 
139 struct qca_data {
140 	struct hci_uart *hu;
141 	struct sk_buff *rx_skb;
142 	struct sk_buff_head txq;
143 	struct sk_buff_head tx_wait_q;	/* HCI_IBS wait queue	*/
144 	struct sk_buff_head rx_memdump_q;	/* Memdump wait queue	*/
145 	spinlock_t hci_ibs_lock;	/* HCI_IBS state lock	*/
146 	u8 tx_ibs_state;	/* HCI_IBS transmit side power state*/
147 	u8 rx_ibs_state;	/* HCI_IBS receive side power state */
148 	bool tx_vote;		/* Clock must be on for TX */
149 	bool rx_vote;		/* Clock must be on for RX */
150 	struct timer_list tx_idle_timer;
151 	u32 tx_idle_delay;
152 	struct timer_list wake_retrans_timer;
153 	u32 wake_retrans;
154 	struct workqueue_struct *workqueue;
155 	struct work_struct ws_awake_rx;
156 	struct work_struct ws_awake_device;
157 	struct work_struct ws_rx_vote_off;
158 	struct work_struct ws_tx_vote_off;
159 	struct work_struct ctrl_memdump_evt;
160 	struct delayed_work ctrl_memdump_timeout;
161 	struct qca_memdump_info *qca_memdump;
162 	unsigned long flags;
163 	struct completion drop_ev_comp;
164 	wait_queue_head_t suspend_wait_q;
165 	enum qca_memdump_states memdump_state;
166 	struct mutex hci_memdump_lock;
167 
168 	u16 fw_version;
169 	u16 controller_id;
170 	/* For debugging purpose */
171 	u64 ibs_sent_wacks;
172 	u64 ibs_sent_slps;
173 	u64 ibs_sent_wakes;
174 	u64 ibs_recv_wacks;
175 	u64 ibs_recv_slps;
176 	u64 ibs_recv_wakes;
177 	u64 vote_last_jif;
178 	u32 vote_on_ms;
179 	u32 vote_off_ms;
180 	u64 tx_votes_on;
181 	u64 rx_votes_on;
182 	u64 tx_votes_off;
183 	u64 rx_votes_off;
184 	u64 votes_on;
185 	u64 votes_off;
186 };
187 
188 enum qca_speed_type {
189 	QCA_INIT_SPEED = 1,
190 	QCA_OPER_SPEED
191 };
192 
193 /*
194  * Voltage regulator information required for configuring the
195  * QCA Bluetooth chipset
196  */
197 struct qca_vreg {
198 	const char *name;
199 	unsigned int load_uA;
200 };
201 
202 struct qca_device_data {
203 	enum qca_btsoc_type soc_type;
204 	struct qca_vreg *vregs;
205 	size_t num_vregs;
206 	uint32_t capabilities;
207 };
208 
209 /*
210  * Platform data for the QCA Bluetooth power driver.
211  */
212 struct qca_power {
213 	struct device *dev;
214 	struct regulator_bulk_data *vreg_bulk;
215 	int num_vregs;
216 	bool vregs_on;
217 };
218 
219 struct qca_serdev {
220 	struct hci_uart	 serdev_hu;
221 	struct gpio_desc *bt_en;
222 	struct gpio_desc *sw_ctrl;
223 	struct clk	 *susclk;
224 	enum qca_btsoc_type btsoc_type;
225 	struct qca_power *bt_power;
226 	u32 init_speed;
227 	u32 oper_speed;
228 	const char *firmware_name;
229 };
230 
231 static int qca_regulator_enable(struct qca_serdev *qcadev);
232 static void qca_regulator_disable(struct qca_serdev *qcadev);
233 static void qca_power_shutdown(struct hci_uart *hu);
234 static int qca_power_off(struct hci_dev *hdev);
235 static void qca_controller_memdump(struct work_struct *work);
236 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
237 
238 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
239 {
240 	enum qca_btsoc_type soc_type;
241 
242 	if (hu->serdev) {
243 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
244 
245 		soc_type = qsd->btsoc_type;
246 	} else {
247 		soc_type = QCA_ROME;
248 	}
249 
250 	return soc_type;
251 }
252 
253 static const char *qca_get_firmware_name(struct hci_uart *hu)
254 {
255 	if (hu->serdev) {
256 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
257 
258 		return qsd->firmware_name;
259 	} else {
260 		return NULL;
261 	}
262 }
263 
264 static void __serial_clock_on(struct tty_struct *tty)
265 {
266 	/* TODO: Some chipset requires to enable UART clock on client
267 	 * side to save power consumption or manual work is required.
268 	 * Please put your code to control UART clock here if needed
269 	 */
270 }
271 
272 static void __serial_clock_off(struct tty_struct *tty)
273 {
274 	/* TODO: Some chipset requires to disable UART clock on client
275 	 * side to save power consumption or manual work is required.
276 	 * Please put your code to control UART clock off here if needed
277 	 */
278 }
279 
280 /* serial_clock_vote needs to be called with the ibs lock held */
281 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
282 {
283 	struct qca_data *qca = hu->priv;
284 	unsigned int diff;
285 
286 	bool old_vote = (qca->tx_vote | qca->rx_vote);
287 	bool new_vote;
288 
289 	switch (vote) {
290 	case HCI_IBS_VOTE_STATS_UPDATE:
291 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
292 
293 		if (old_vote)
294 			qca->vote_off_ms += diff;
295 		else
296 			qca->vote_on_ms += diff;
297 		return;
298 
299 	case HCI_IBS_TX_VOTE_CLOCK_ON:
300 		qca->tx_vote = true;
301 		qca->tx_votes_on++;
302 		break;
303 
304 	case HCI_IBS_RX_VOTE_CLOCK_ON:
305 		qca->rx_vote = true;
306 		qca->rx_votes_on++;
307 		break;
308 
309 	case HCI_IBS_TX_VOTE_CLOCK_OFF:
310 		qca->tx_vote = false;
311 		qca->tx_votes_off++;
312 		break;
313 
314 	case HCI_IBS_RX_VOTE_CLOCK_OFF:
315 		qca->rx_vote = false;
316 		qca->rx_votes_off++;
317 		break;
318 
319 	default:
320 		BT_ERR("Voting irregularity");
321 		return;
322 	}
323 
324 	new_vote = qca->rx_vote | qca->tx_vote;
325 
326 	if (new_vote != old_vote) {
327 		if (new_vote)
328 			__serial_clock_on(hu->tty);
329 		else
330 			__serial_clock_off(hu->tty);
331 
332 		BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
333 		       vote ? "true" : "false");
334 
335 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
336 
337 		if (new_vote) {
338 			qca->votes_on++;
339 			qca->vote_off_ms += diff;
340 		} else {
341 			qca->votes_off++;
342 			qca->vote_on_ms += diff;
343 		}
344 		qca->vote_last_jif = jiffies;
345 	}
346 }
347 
348 /* Builds and sends an HCI_IBS command packet.
349  * These are very simple packets with only 1 cmd byte.
350  */
351 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
352 {
353 	int err = 0;
354 	struct sk_buff *skb = NULL;
355 	struct qca_data *qca = hu->priv;
356 
357 	BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
358 
359 	skb = bt_skb_alloc(1, GFP_ATOMIC);
360 	if (!skb) {
361 		BT_ERR("Failed to allocate memory for HCI_IBS packet");
362 		return -ENOMEM;
363 	}
364 
365 	/* Assign HCI_IBS type */
366 	skb_put_u8(skb, cmd);
367 
368 	skb_queue_tail(&qca->txq, skb);
369 
370 	return err;
371 }
372 
373 static void qca_wq_awake_device(struct work_struct *work)
374 {
375 	struct qca_data *qca = container_of(work, struct qca_data,
376 					    ws_awake_device);
377 	struct hci_uart *hu = qca->hu;
378 	unsigned long retrans_delay;
379 	unsigned long flags;
380 
381 	BT_DBG("hu %p wq awake device", hu);
382 
383 	/* Vote for serial clock */
384 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
385 
386 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
387 
388 	/* Send wake indication to device */
389 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
390 		BT_ERR("Failed to send WAKE to device");
391 
392 	qca->ibs_sent_wakes++;
393 
394 	/* Start retransmit timer */
395 	retrans_delay = msecs_to_jiffies(qca->wake_retrans);
396 	mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
397 
398 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
399 
400 	/* Actually send the packets */
401 	hci_uart_tx_wakeup(hu);
402 }
403 
404 static void qca_wq_awake_rx(struct work_struct *work)
405 {
406 	struct qca_data *qca = container_of(work, struct qca_data,
407 					    ws_awake_rx);
408 	struct hci_uart *hu = qca->hu;
409 	unsigned long flags;
410 
411 	BT_DBG("hu %p wq awake rx", hu);
412 
413 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
414 
415 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
416 	qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
417 
418 	/* Always acknowledge device wake up,
419 	 * sending IBS message doesn't count as TX ON.
420 	 */
421 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
422 		BT_ERR("Failed to acknowledge device wake up");
423 
424 	qca->ibs_sent_wacks++;
425 
426 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
427 
428 	/* Actually send the packets */
429 	hci_uart_tx_wakeup(hu);
430 }
431 
432 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
433 {
434 	struct qca_data *qca = container_of(work, struct qca_data,
435 					    ws_rx_vote_off);
436 	struct hci_uart *hu = qca->hu;
437 
438 	BT_DBG("hu %p rx clock vote off", hu);
439 
440 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
441 }
442 
443 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
444 {
445 	struct qca_data *qca = container_of(work, struct qca_data,
446 					    ws_tx_vote_off);
447 	struct hci_uart *hu = qca->hu;
448 
449 	BT_DBG("hu %p tx clock vote off", hu);
450 
451 	/* Run HCI tx handling unlocked */
452 	hci_uart_tx_wakeup(hu);
453 
454 	/* Now that message queued to tty driver, vote for tty clocks off.
455 	 * It is up to the tty driver to pend the clocks off until tx done.
456 	 */
457 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
458 }
459 
460 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
461 {
462 	struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
463 	struct hci_uart *hu = qca->hu;
464 	unsigned long flags;
465 
466 	BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
467 
468 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
469 				 flags, SINGLE_DEPTH_NESTING);
470 
471 	switch (qca->tx_ibs_state) {
472 	case HCI_IBS_TX_AWAKE:
473 		/* TX_IDLE, go to SLEEP */
474 		if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
475 			BT_ERR("Failed to send SLEEP to device");
476 			break;
477 		}
478 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
479 		qca->ibs_sent_slps++;
480 		queue_work(qca->workqueue, &qca->ws_tx_vote_off);
481 		break;
482 
483 	case HCI_IBS_TX_ASLEEP:
484 	case HCI_IBS_TX_WAKING:
485 	default:
486 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
487 		break;
488 	}
489 
490 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
491 }
492 
493 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
494 {
495 	struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
496 	struct hci_uart *hu = qca->hu;
497 	unsigned long flags, retrans_delay;
498 	bool retransmit = false;
499 
500 	BT_DBG("hu %p wake retransmit timeout in %d state",
501 		hu, qca->tx_ibs_state);
502 
503 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
504 				 flags, SINGLE_DEPTH_NESTING);
505 
506 	/* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
507 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
508 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
509 		return;
510 	}
511 
512 	switch (qca->tx_ibs_state) {
513 	case HCI_IBS_TX_WAKING:
514 		/* No WAKE_ACK, retransmit WAKE */
515 		retransmit = true;
516 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
517 			BT_ERR("Failed to acknowledge device wake up");
518 			break;
519 		}
520 		qca->ibs_sent_wakes++;
521 		retrans_delay = msecs_to_jiffies(qca->wake_retrans);
522 		mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
523 		break;
524 
525 	case HCI_IBS_TX_ASLEEP:
526 	case HCI_IBS_TX_AWAKE:
527 	default:
528 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
529 		break;
530 	}
531 
532 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
533 
534 	if (retransmit)
535 		hci_uart_tx_wakeup(hu);
536 }
537 
538 
539 static void qca_controller_memdump_timeout(struct work_struct *work)
540 {
541 	struct qca_data *qca = container_of(work, struct qca_data,
542 					ctrl_memdump_timeout.work);
543 	struct hci_uart *hu = qca->hu;
544 
545 	mutex_lock(&qca->hci_memdump_lock);
546 	if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
547 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
548 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
549 			/* Inject hw error event to reset the device
550 			 * and driver.
551 			 */
552 			hci_reset_dev(hu->hdev);
553 		}
554 	}
555 
556 	mutex_unlock(&qca->hci_memdump_lock);
557 }
558 
559 
560 /* Initialize protocol */
561 static int qca_open(struct hci_uart *hu)
562 {
563 	struct qca_serdev *qcadev;
564 	struct qca_data *qca;
565 
566 	BT_DBG("hu %p qca_open", hu);
567 
568 	if (!hci_uart_has_flow_control(hu))
569 		return -EOPNOTSUPP;
570 
571 	qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
572 	if (!qca)
573 		return -ENOMEM;
574 
575 	skb_queue_head_init(&qca->txq);
576 	skb_queue_head_init(&qca->tx_wait_q);
577 	skb_queue_head_init(&qca->rx_memdump_q);
578 	spin_lock_init(&qca->hci_ibs_lock);
579 	mutex_init(&qca->hci_memdump_lock);
580 	qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
581 	if (!qca->workqueue) {
582 		BT_ERR("QCA Workqueue not initialized properly");
583 		kfree(qca);
584 		return -ENOMEM;
585 	}
586 
587 	INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
588 	INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
589 	INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
590 	INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
591 	INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
592 	INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
593 			  qca_controller_memdump_timeout);
594 	init_waitqueue_head(&qca->suspend_wait_q);
595 
596 	qca->hu = hu;
597 	init_completion(&qca->drop_ev_comp);
598 
599 	/* Assume we start with both sides asleep -- extra wakes OK */
600 	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
601 	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
602 
603 	qca->vote_last_jif = jiffies;
604 
605 	hu->priv = qca;
606 
607 	if (hu->serdev) {
608 		qcadev = serdev_device_get_drvdata(hu->serdev);
609 
610 		if (qca_is_wcn399x(qcadev->btsoc_type) ||
611 		    qca_is_wcn6750(qcadev->btsoc_type))
612 			hu->init_speed = qcadev->init_speed;
613 
614 		if (qcadev->oper_speed)
615 			hu->oper_speed = qcadev->oper_speed;
616 	}
617 
618 	timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
619 	qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
620 
621 	timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
622 	qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
623 
624 	BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
625 	       qca->tx_idle_delay, qca->wake_retrans);
626 
627 	return 0;
628 }
629 
630 static void qca_debugfs_init(struct hci_dev *hdev)
631 {
632 	struct hci_uart *hu = hci_get_drvdata(hdev);
633 	struct qca_data *qca = hu->priv;
634 	struct dentry *ibs_dir;
635 	umode_t mode;
636 
637 	if (!hdev->debugfs)
638 		return;
639 
640 	if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
641 		return;
642 
643 	ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
644 
645 	/* read only */
646 	mode = 0444;
647 	debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
648 	debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
649 	debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
650 			   &qca->ibs_sent_slps);
651 	debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
652 			   &qca->ibs_sent_wakes);
653 	debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
654 			   &qca->ibs_sent_wacks);
655 	debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
656 			   &qca->ibs_recv_slps);
657 	debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
658 			   &qca->ibs_recv_wakes);
659 	debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
660 			   &qca->ibs_recv_wacks);
661 	debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
662 	debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
663 	debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
664 	debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
665 	debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
666 	debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
667 	debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
668 	debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
669 	debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
670 	debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
671 
672 	/* read/write */
673 	mode = 0644;
674 	debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
675 	debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
676 			   &qca->tx_idle_delay);
677 }
678 
679 /* Flush protocol data */
680 static int qca_flush(struct hci_uart *hu)
681 {
682 	struct qca_data *qca = hu->priv;
683 
684 	BT_DBG("hu %p qca flush", hu);
685 
686 	skb_queue_purge(&qca->tx_wait_q);
687 	skb_queue_purge(&qca->txq);
688 
689 	return 0;
690 }
691 
692 /* Close protocol */
693 static int qca_close(struct hci_uart *hu)
694 {
695 	struct qca_data *qca = hu->priv;
696 
697 	BT_DBG("hu %p qca close", hu);
698 
699 	serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
700 
701 	skb_queue_purge(&qca->tx_wait_q);
702 	skb_queue_purge(&qca->txq);
703 	skb_queue_purge(&qca->rx_memdump_q);
704 	/*
705 	 * Shut the timers down so they can't be rearmed when
706 	 * destroy_workqueue() drains pending work which in turn might try
707 	 * to arm a timer.  After shutdown rearm attempts are silently
708 	 * ignored by the timer core code.
709 	 */
710 	timer_shutdown_sync(&qca->tx_idle_timer);
711 	timer_shutdown_sync(&qca->wake_retrans_timer);
712 	destroy_workqueue(qca->workqueue);
713 	qca->hu = NULL;
714 
715 	kfree_skb(qca->rx_skb);
716 
717 	hu->priv = NULL;
718 
719 	kfree(qca);
720 
721 	return 0;
722 }
723 
724 /* Called upon a wake-up-indication from the device.
725  */
726 static void device_want_to_wakeup(struct hci_uart *hu)
727 {
728 	unsigned long flags;
729 	struct qca_data *qca = hu->priv;
730 
731 	BT_DBG("hu %p want to wake up", hu);
732 
733 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
734 
735 	qca->ibs_recv_wakes++;
736 
737 	/* Don't wake the rx up when suspending. */
738 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
739 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
740 		return;
741 	}
742 
743 	switch (qca->rx_ibs_state) {
744 	case HCI_IBS_RX_ASLEEP:
745 		/* Make sure clock is on - we may have turned clock off since
746 		 * receiving the wake up indicator awake rx clock.
747 		 */
748 		queue_work(qca->workqueue, &qca->ws_awake_rx);
749 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
750 		return;
751 
752 	case HCI_IBS_RX_AWAKE:
753 		/* Always acknowledge device wake up,
754 		 * sending IBS message doesn't count as TX ON.
755 		 */
756 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
757 			BT_ERR("Failed to acknowledge device wake up");
758 			break;
759 		}
760 		qca->ibs_sent_wacks++;
761 		break;
762 
763 	default:
764 		/* Any other state is illegal */
765 		BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
766 		       qca->rx_ibs_state);
767 		break;
768 	}
769 
770 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
771 
772 	/* Actually send the packets */
773 	hci_uart_tx_wakeup(hu);
774 }
775 
776 /* Called upon a sleep-indication from the device.
777  */
778 static void device_want_to_sleep(struct hci_uart *hu)
779 {
780 	unsigned long flags;
781 	struct qca_data *qca = hu->priv;
782 
783 	BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
784 
785 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
786 
787 	qca->ibs_recv_slps++;
788 
789 	switch (qca->rx_ibs_state) {
790 	case HCI_IBS_RX_AWAKE:
791 		/* Update state */
792 		qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
793 		/* Vote off rx clock under workqueue */
794 		queue_work(qca->workqueue, &qca->ws_rx_vote_off);
795 		break;
796 
797 	case HCI_IBS_RX_ASLEEP:
798 		break;
799 
800 	default:
801 		/* Any other state is illegal */
802 		BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
803 		       qca->rx_ibs_state);
804 		break;
805 	}
806 
807 	wake_up_interruptible(&qca->suspend_wait_q);
808 
809 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
810 }
811 
812 /* Called upon wake-up-acknowledgement from the device
813  */
814 static void device_woke_up(struct hci_uart *hu)
815 {
816 	unsigned long flags, idle_delay;
817 	struct qca_data *qca = hu->priv;
818 	struct sk_buff *skb = NULL;
819 
820 	BT_DBG("hu %p woke up", hu);
821 
822 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
823 
824 	qca->ibs_recv_wacks++;
825 
826 	/* Don't react to the wake-up-acknowledgment when suspending. */
827 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
828 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
829 		return;
830 	}
831 
832 	switch (qca->tx_ibs_state) {
833 	case HCI_IBS_TX_AWAKE:
834 		/* Expect one if we send 2 WAKEs */
835 		BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
836 		       qca->tx_ibs_state);
837 		break;
838 
839 	case HCI_IBS_TX_WAKING:
840 		/* Send pending packets */
841 		while ((skb = skb_dequeue(&qca->tx_wait_q)))
842 			skb_queue_tail(&qca->txq, skb);
843 
844 		/* Switch timers and change state to HCI_IBS_TX_AWAKE */
845 		del_timer(&qca->wake_retrans_timer);
846 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
847 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
848 		qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
849 		break;
850 
851 	case HCI_IBS_TX_ASLEEP:
852 	default:
853 		BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
854 		       qca->tx_ibs_state);
855 		break;
856 	}
857 
858 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
859 
860 	/* Actually send the packets */
861 	hci_uart_tx_wakeup(hu);
862 }
863 
864 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
865  * two simultaneous tasklets.
866  */
867 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
868 {
869 	unsigned long flags = 0, idle_delay;
870 	struct qca_data *qca = hu->priv;
871 
872 	BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
873 	       qca->tx_ibs_state);
874 
875 	if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
876 		/* As SSR is in progress, ignore the packets */
877 		bt_dev_dbg(hu->hdev, "SSR is in progress");
878 		kfree_skb(skb);
879 		return 0;
880 	}
881 
882 	/* Prepend skb with frame type */
883 	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
884 
885 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
886 
887 	/* Don't go to sleep in middle of patch download or
888 	 * Out-Of-Band(GPIOs control) sleep is selected.
889 	 * Don't wake the device up when suspending.
890 	 */
891 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
892 	    test_bit(QCA_SUSPENDING, &qca->flags)) {
893 		skb_queue_tail(&qca->txq, skb);
894 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
895 		return 0;
896 	}
897 
898 	/* Act according to current state */
899 	switch (qca->tx_ibs_state) {
900 	case HCI_IBS_TX_AWAKE:
901 		BT_DBG("Device awake, sending normally");
902 		skb_queue_tail(&qca->txq, skb);
903 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
904 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
905 		break;
906 
907 	case HCI_IBS_TX_ASLEEP:
908 		BT_DBG("Device asleep, waking up and queueing packet");
909 		/* Save packet for later */
910 		skb_queue_tail(&qca->tx_wait_q, skb);
911 
912 		qca->tx_ibs_state = HCI_IBS_TX_WAKING;
913 		/* Schedule a work queue to wake up device */
914 		queue_work(qca->workqueue, &qca->ws_awake_device);
915 		break;
916 
917 	case HCI_IBS_TX_WAKING:
918 		BT_DBG("Device waking up, queueing packet");
919 		/* Transient state; just keep packet for later */
920 		skb_queue_tail(&qca->tx_wait_q, skb);
921 		break;
922 
923 	default:
924 		BT_ERR("Illegal tx state: %d (losing packet)",
925 		       qca->tx_ibs_state);
926 		dev_kfree_skb_irq(skb);
927 		break;
928 	}
929 
930 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
931 
932 	return 0;
933 }
934 
935 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
936 {
937 	struct hci_uart *hu = hci_get_drvdata(hdev);
938 
939 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
940 
941 	device_want_to_sleep(hu);
942 
943 	kfree_skb(skb);
944 	return 0;
945 }
946 
947 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
948 {
949 	struct hci_uart *hu = hci_get_drvdata(hdev);
950 
951 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
952 
953 	device_want_to_wakeup(hu);
954 
955 	kfree_skb(skb);
956 	return 0;
957 }
958 
959 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
960 {
961 	struct hci_uart *hu = hci_get_drvdata(hdev);
962 
963 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
964 
965 	device_woke_up(hu);
966 
967 	kfree_skb(skb);
968 	return 0;
969 }
970 
971 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
972 {
973 	/* We receive debug logs from chip as an ACL packets.
974 	 * Instead of sending the data to ACL to decode the
975 	 * received data, we are pushing them to the above layers
976 	 * as a diagnostic packet.
977 	 */
978 	if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
979 		return hci_recv_diag(hdev, skb);
980 
981 	return hci_recv_frame(hdev, skb);
982 }
983 
984 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
985 {
986 	struct hci_uart *hu = hci_get_drvdata(hdev);
987 	struct qca_data *qca = hu->priv;
988 	char buf[80];
989 
990 	snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n",
991 		qca->controller_id);
992 	skb_put_data(skb, buf, strlen(buf));
993 
994 	snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n",
995 		qca->fw_version);
996 	skb_put_data(skb, buf, strlen(buf));
997 
998 	snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n");
999 	skb_put_data(skb, buf, strlen(buf));
1000 
1001 	snprintf(buf, sizeof(buf), "Driver: %s\n",
1002 		hu->serdev->dev.driver->name);
1003 	skb_put_data(skb, buf, strlen(buf));
1004 }
1005 
1006 static void qca_controller_memdump(struct work_struct *work)
1007 {
1008 	struct qca_data *qca = container_of(work, struct qca_data,
1009 					    ctrl_memdump_evt);
1010 	struct hci_uart *hu = qca->hu;
1011 	struct sk_buff *skb;
1012 	struct qca_memdump_event_hdr *cmd_hdr;
1013 	struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1014 	struct qca_dump_size *dump;
1015 	u16 seq_no;
1016 	u32 rx_size;
1017 	int ret = 0;
1018 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1019 
1020 	while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
1021 
1022 		mutex_lock(&qca->hci_memdump_lock);
1023 		/* Skip processing the received packets if timeout detected
1024 		 * or memdump collection completed.
1025 		 */
1026 		if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1027 		    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1028 			mutex_unlock(&qca->hci_memdump_lock);
1029 			return;
1030 		}
1031 
1032 		if (!qca_memdump) {
1033 			qca_memdump = kzalloc(sizeof(struct qca_memdump_info),
1034 					      GFP_ATOMIC);
1035 			if (!qca_memdump) {
1036 				mutex_unlock(&qca->hci_memdump_lock);
1037 				return;
1038 			}
1039 
1040 			qca->qca_memdump = qca_memdump;
1041 		}
1042 
1043 		qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1044 		cmd_hdr = (void *) skb->data;
1045 		seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1046 		skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1047 
1048 		if (!seq_no) {
1049 
1050 			/* This is the first frame of memdump packet from
1051 			 * the controller, Disable IBS to recevie dump
1052 			 * with out any interruption, ideally time required for
1053 			 * the controller to send the dump is 8 seconds. let us
1054 			 * start timer to handle this asynchronous activity.
1055 			 */
1056 			set_bit(QCA_IBS_DISABLED, &qca->flags);
1057 			set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1058 			dump = (void *) skb->data;
1059 			qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1060 			if (!(qca_memdump->ram_dump_size)) {
1061 				bt_dev_err(hu->hdev, "Rx invalid memdump size");
1062 				kfree(qca_memdump);
1063 				kfree_skb(skb);
1064 				mutex_unlock(&qca->hci_memdump_lock);
1065 				return;
1066 			}
1067 
1068 			queue_delayed_work(qca->workqueue,
1069 					   &qca->ctrl_memdump_timeout,
1070 					   msecs_to_jiffies(MEMDUMP_TIMEOUT_MS));
1071 			skb_pull(skb, sizeof(qca_memdump->ram_dump_size));
1072 			qca_memdump->current_seq_no = 0;
1073 			qca_memdump->received_dump = 0;
1074 			ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size);
1075 			bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1076 				    ret);
1077 			if (ret < 0) {
1078 				kfree(qca->qca_memdump);
1079 				qca->qca_memdump = NULL;
1080 				qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1081 				cancel_delayed_work(&qca->ctrl_memdump_timeout);
1082 				clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1083 				mutex_unlock(&qca->hci_memdump_lock);
1084 				return;
1085 			}
1086 
1087 			bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1088 				    qca_memdump->ram_dump_size);
1089 
1090 		}
1091 
1092 		/* If sequence no 0 is missed then there is no point in
1093 		 * accepting the other sequences.
1094 		 */
1095 		if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1096 			bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1097 			kfree(qca_memdump);
1098 			kfree_skb(skb);
1099 			mutex_unlock(&qca->hci_memdump_lock);
1100 			return;
1101 		}
1102 		/* There could be chance of missing some packets from
1103 		 * the controller. In such cases let us store the dummy
1104 		 * packets in the buffer.
1105 		 */
1106 		/* For QCA6390, controller does not lost packets but
1107 		 * sequence number field of packet sometimes has error
1108 		 * bits, so skip this checking for missing packet.
1109 		 */
1110 		while ((seq_no > qca_memdump->current_seq_no + 1) &&
1111 			(soc_type != QCA_QCA6390) &&
1112 			seq_no != QCA_LAST_SEQUENCE_NUM) {
1113 			bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1114 				   qca_memdump->current_seq_no);
1115 			rx_size = qca_memdump->received_dump;
1116 			rx_size += QCA_DUMP_PACKET_SIZE;
1117 			if (rx_size > qca_memdump->ram_dump_size) {
1118 				bt_dev_err(hu->hdev,
1119 					   "QCA memdump received %d, no space for missed packet",
1120 					   qca_memdump->received_dump);
1121 				break;
1122 			}
1123 			hci_devcd_append_pattern(hu->hdev, 0x00,
1124 				QCA_DUMP_PACKET_SIZE);
1125 			qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1126 			qca_memdump->current_seq_no++;
1127 		}
1128 
1129 		rx_size = qca_memdump->received_dump  + skb->len;
1130 		if (rx_size <= qca_memdump->ram_dump_size) {
1131 			if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1132 			    (seq_no != qca_memdump->current_seq_no)) {
1133 				bt_dev_err(hu->hdev,
1134 					   "QCA memdump unexpected packet %d",
1135 					   seq_no);
1136 			}
1137 			bt_dev_dbg(hu->hdev,
1138 				   "QCA memdump packet %d with length %d",
1139 				   seq_no, skb->len);
1140 			hci_devcd_append(hu->hdev, skb);
1141 			qca_memdump->current_seq_no += 1;
1142 			qca_memdump->received_dump = rx_size;
1143 		} else {
1144 			bt_dev_err(hu->hdev,
1145 				   "QCA memdump received no space for packet %d",
1146 				    qca_memdump->current_seq_no);
1147 		}
1148 
1149 		if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1150 			bt_dev_info(hu->hdev,
1151 				"QCA memdump Done, received %d, total %d",
1152 				qca_memdump->received_dump,
1153 				qca_memdump->ram_dump_size);
1154 			hci_devcd_complete(hu->hdev);
1155 			cancel_delayed_work(&qca->ctrl_memdump_timeout);
1156 			kfree(qca->qca_memdump);
1157 			qca->qca_memdump = NULL;
1158 			qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1159 			clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1160 		}
1161 
1162 		mutex_unlock(&qca->hci_memdump_lock);
1163 	}
1164 
1165 }
1166 
1167 static int qca_controller_memdump_event(struct hci_dev *hdev,
1168 					struct sk_buff *skb)
1169 {
1170 	struct hci_uart *hu = hci_get_drvdata(hdev);
1171 	struct qca_data *qca = hu->priv;
1172 
1173 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1174 	skb_queue_tail(&qca->rx_memdump_q, skb);
1175 	queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1176 
1177 	return 0;
1178 }
1179 
1180 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1181 {
1182 	struct hci_uart *hu = hci_get_drvdata(hdev);
1183 	struct qca_data *qca = hu->priv;
1184 
1185 	if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1186 		struct hci_event_hdr *hdr = (void *)skb->data;
1187 
1188 		/* For the WCN3990 the vendor command for a baudrate change
1189 		 * isn't sent as synchronous HCI command, because the
1190 		 * controller sends the corresponding vendor event with the
1191 		 * new baudrate. The event is received and properly decoded
1192 		 * after changing the baudrate of the host port. It needs to
1193 		 * be dropped, otherwise it can be misinterpreted as
1194 		 * response to a later firmware download command (also a
1195 		 * vendor command).
1196 		 */
1197 
1198 		if (hdr->evt == HCI_EV_VENDOR)
1199 			complete(&qca->drop_ev_comp);
1200 
1201 		kfree_skb(skb);
1202 
1203 		return 0;
1204 	}
1205 	/* We receive chip memory dump as an event packet, With a dedicated
1206 	 * handler followed by a hardware error event. When this event is
1207 	 * received we store dump into a file before closing hci. This
1208 	 * dump will help in triaging the issues.
1209 	 */
1210 	if ((skb->data[0] == HCI_VENDOR_PKT) &&
1211 	    (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1212 		return qca_controller_memdump_event(hdev, skb);
1213 
1214 	return hci_recv_frame(hdev, skb);
1215 }
1216 
1217 #define QCA_IBS_SLEEP_IND_EVENT \
1218 	.type = HCI_IBS_SLEEP_IND, \
1219 	.hlen = 0, \
1220 	.loff = 0, \
1221 	.lsize = 0, \
1222 	.maxlen = HCI_MAX_IBS_SIZE
1223 
1224 #define QCA_IBS_WAKE_IND_EVENT \
1225 	.type = HCI_IBS_WAKE_IND, \
1226 	.hlen = 0, \
1227 	.loff = 0, \
1228 	.lsize = 0, \
1229 	.maxlen = HCI_MAX_IBS_SIZE
1230 
1231 #define QCA_IBS_WAKE_ACK_EVENT \
1232 	.type = HCI_IBS_WAKE_ACK, \
1233 	.hlen = 0, \
1234 	.loff = 0, \
1235 	.lsize = 0, \
1236 	.maxlen = HCI_MAX_IBS_SIZE
1237 
1238 static const struct h4_recv_pkt qca_recv_pkts[] = {
1239 	{ H4_RECV_ACL,             .recv = qca_recv_acl_data },
1240 	{ H4_RECV_SCO,             .recv = hci_recv_frame    },
1241 	{ H4_RECV_EVENT,           .recv = qca_recv_event    },
1242 	{ QCA_IBS_WAKE_IND_EVENT,  .recv = qca_ibs_wake_ind  },
1243 	{ QCA_IBS_WAKE_ACK_EVENT,  .recv = qca_ibs_wake_ack  },
1244 	{ QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1245 };
1246 
1247 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1248 {
1249 	struct qca_data *qca = hu->priv;
1250 
1251 	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1252 		return -EUNATCH;
1253 
1254 	qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1255 				  qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1256 	if (IS_ERR(qca->rx_skb)) {
1257 		int err = PTR_ERR(qca->rx_skb);
1258 		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1259 		qca->rx_skb = NULL;
1260 		return err;
1261 	}
1262 
1263 	return count;
1264 }
1265 
1266 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1267 {
1268 	struct qca_data *qca = hu->priv;
1269 
1270 	return skb_dequeue(&qca->txq);
1271 }
1272 
1273 static uint8_t qca_get_baudrate_value(int speed)
1274 {
1275 	switch (speed) {
1276 	case 9600:
1277 		return QCA_BAUDRATE_9600;
1278 	case 19200:
1279 		return QCA_BAUDRATE_19200;
1280 	case 38400:
1281 		return QCA_BAUDRATE_38400;
1282 	case 57600:
1283 		return QCA_BAUDRATE_57600;
1284 	case 115200:
1285 		return QCA_BAUDRATE_115200;
1286 	case 230400:
1287 		return QCA_BAUDRATE_230400;
1288 	case 460800:
1289 		return QCA_BAUDRATE_460800;
1290 	case 500000:
1291 		return QCA_BAUDRATE_500000;
1292 	case 921600:
1293 		return QCA_BAUDRATE_921600;
1294 	case 1000000:
1295 		return QCA_BAUDRATE_1000000;
1296 	case 2000000:
1297 		return QCA_BAUDRATE_2000000;
1298 	case 3000000:
1299 		return QCA_BAUDRATE_3000000;
1300 	case 3200000:
1301 		return QCA_BAUDRATE_3200000;
1302 	case 3500000:
1303 		return QCA_BAUDRATE_3500000;
1304 	default:
1305 		return QCA_BAUDRATE_115200;
1306 	}
1307 }
1308 
1309 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1310 {
1311 	struct hci_uart *hu = hci_get_drvdata(hdev);
1312 	struct qca_data *qca = hu->priv;
1313 	struct sk_buff *skb;
1314 	u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1315 
1316 	if (baudrate > QCA_BAUDRATE_3200000)
1317 		return -EINVAL;
1318 
1319 	cmd[4] = baudrate;
1320 
1321 	skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1322 	if (!skb) {
1323 		bt_dev_err(hdev, "Failed to allocate baudrate packet");
1324 		return -ENOMEM;
1325 	}
1326 
1327 	/* Assign commands to change baudrate and packet type. */
1328 	skb_put_data(skb, cmd, sizeof(cmd));
1329 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1330 
1331 	skb_queue_tail(&qca->txq, skb);
1332 	hci_uart_tx_wakeup(hu);
1333 
1334 	/* Wait for the baudrate change request to be sent */
1335 
1336 	while (!skb_queue_empty(&qca->txq))
1337 		usleep_range(100, 200);
1338 
1339 	if (hu->serdev)
1340 		serdev_device_wait_until_sent(hu->serdev,
1341 		      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1342 
1343 	/* Give the controller time to process the request */
1344 	if (qca_is_wcn399x(qca_soc_type(hu)) ||
1345 	    qca_is_wcn6750(qca_soc_type(hu)) ||
1346 	    qca_is_wcn6855(qca_soc_type(hu)))
1347 		usleep_range(1000, 10000);
1348 	else
1349 		msleep(300);
1350 
1351 	return 0;
1352 }
1353 
1354 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1355 {
1356 	if (hu->serdev)
1357 		serdev_device_set_baudrate(hu->serdev, speed);
1358 	else
1359 		hci_uart_set_baudrate(hu, speed);
1360 }
1361 
1362 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1363 {
1364 	int ret;
1365 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1366 	u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1367 
1368 	/* These power pulses are single byte command which are sent
1369 	 * at required baudrate to wcn3990. On wcn3990, we have an external
1370 	 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1371 	 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1372 	 * and also we use the same power inputs to turn on and off for
1373 	 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1374 	 * we send a power on pulse at 115200 bps. This algorithm will help to
1375 	 * save power. Disabling hardware flow control is mandatory while
1376 	 * sending power pulses to SoC.
1377 	 */
1378 	bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1379 
1380 	serdev_device_write_flush(hu->serdev);
1381 	hci_uart_set_flow_control(hu, true);
1382 	ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1383 	if (ret < 0) {
1384 		bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1385 		return ret;
1386 	}
1387 
1388 	serdev_device_wait_until_sent(hu->serdev, timeout);
1389 	hci_uart_set_flow_control(hu, false);
1390 
1391 	/* Give to controller time to boot/shutdown */
1392 	if (on)
1393 		msleep(100);
1394 	else
1395 		usleep_range(1000, 10000);
1396 
1397 	return 0;
1398 }
1399 
1400 static unsigned int qca_get_speed(struct hci_uart *hu,
1401 				  enum qca_speed_type speed_type)
1402 {
1403 	unsigned int speed = 0;
1404 
1405 	if (speed_type == QCA_INIT_SPEED) {
1406 		if (hu->init_speed)
1407 			speed = hu->init_speed;
1408 		else if (hu->proto->init_speed)
1409 			speed = hu->proto->init_speed;
1410 	} else {
1411 		if (hu->oper_speed)
1412 			speed = hu->oper_speed;
1413 		else if (hu->proto->oper_speed)
1414 			speed = hu->proto->oper_speed;
1415 	}
1416 
1417 	return speed;
1418 }
1419 
1420 static int qca_check_speeds(struct hci_uart *hu)
1421 {
1422 	if (qca_is_wcn399x(qca_soc_type(hu)) ||
1423 	    qca_is_wcn6750(qca_soc_type(hu)) ||
1424 	    qca_is_wcn6855(qca_soc_type(hu))) {
1425 		if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1426 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1427 			return -EINVAL;
1428 	} else {
1429 		if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1430 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1431 			return -EINVAL;
1432 	}
1433 
1434 	return 0;
1435 }
1436 
1437 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1438 {
1439 	unsigned int speed, qca_baudrate;
1440 	struct qca_data *qca = hu->priv;
1441 	int ret = 0;
1442 
1443 	if (speed_type == QCA_INIT_SPEED) {
1444 		speed = qca_get_speed(hu, QCA_INIT_SPEED);
1445 		if (speed)
1446 			host_set_baudrate(hu, speed);
1447 	} else {
1448 		enum qca_btsoc_type soc_type = qca_soc_type(hu);
1449 
1450 		speed = qca_get_speed(hu, QCA_OPER_SPEED);
1451 		if (!speed)
1452 			return 0;
1453 
1454 		/* Disable flow control for wcn3990 to deassert RTS while
1455 		 * changing the baudrate of chip and host.
1456 		 */
1457 		if (qca_is_wcn399x(soc_type) ||
1458 		    qca_is_wcn6750(soc_type) ||
1459 		    qca_is_wcn6855(soc_type))
1460 			hci_uart_set_flow_control(hu, true);
1461 
1462 		if (soc_type == QCA_WCN3990) {
1463 			reinit_completion(&qca->drop_ev_comp);
1464 			set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1465 		}
1466 
1467 		qca_baudrate = qca_get_baudrate_value(speed);
1468 		bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1469 		ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1470 		if (ret)
1471 			goto error;
1472 
1473 		host_set_baudrate(hu, speed);
1474 
1475 error:
1476 		if (qca_is_wcn399x(soc_type) ||
1477 		    qca_is_wcn6750(soc_type) ||
1478 		    qca_is_wcn6855(soc_type))
1479 			hci_uart_set_flow_control(hu, false);
1480 
1481 		if (soc_type == QCA_WCN3990) {
1482 			/* Wait for the controller to send the vendor event
1483 			 * for the baudrate change command.
1484 			 */
1485 			if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1486 						 msecs_to_jiffies(100))) {
1487 				bt_dev_err(hu->hdev,
1488 					   "Failed to change controller baudrate\n");
1489 				ret = -ETIMEDOUT;
1490 			}
1491 
1492 			clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1493 		}
1494 	}
1495 
1496 	return ret;
1497 }
1498 
1499 static int qca_send_crashbuffer(struct hci_uart *hu)
1500 {
1501 	struct qca_data *qca = hu->priv;
1502 	struct sk_buff *skb;
1503 
1504 	skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1505 	if (!skb) {
1506 		bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1507 		return -ENOMEM;
1508 	}
1509 
1510 	/* We forcefully crash the controller, by sending 0xfb byte for
1511 	 * 1024 times. We also might have chance of losing data, To be
1512 	 * on safer side we send 1096 bytes to the SoC.
1513 	 */
1514 	memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1515 	       QCA_CRASHBYTE_PACKET_LEN);
1516 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1517 	bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1518 	skb_queue_tail(&qca->txq, skb);
1519 	hci_uart_tx_wakeup(hu);
1520 
1521 	return 0;
1522 }
1523 
1524 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1525 {
1526 	struct hci_uart *hu = hci_get_drvdata(hdev);
1527 	struct qca_data *qca = hu->priv;
1528 
1529 	wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1530 			    TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1531 
1532 	clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1533 }
1534 
1535 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1536 {
1537 	struct hci_uart *hu = hci_get_drvdata(hdev);
1538 	struct qca_data *qca = hu->priv;
1539 
1540 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1541 	set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1542 	bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1543 
1544 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1545 		/* If hardware error event received for other than QCA
1546 		 * soc memory dump event, then we need to crash the SOC
1547 		 * and wait here for 8 seconds to get the dump packets.
1548 		 * This will block main thread to be on hold until we
1549 		 * collect dump.
1550 		 */
1551 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1552 		qca_send_crashbuffer(hu);
1553 		qca_wait_for_dump_collection(hdev);
1554 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1555 		/* Let us wait here until memory dump collected or
1556 		 * memory dump timer expired.
1557 		 */
1558 		bt_dev_info(hdev, "waiting for dump to complete");
1559 		qca_wait_for_dump_collection(hdev);
1560 	}
1561 
1562 	mutex_lock(&qca->hci_memdump_lock);
1563 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1564 		bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1565 		hci_devcd_abort(hu->hdev);
1566 		if (qca->qca_memdump) {
1567 			kfree(qca->qca_memdump);
1568 			qca->qca_memdump = NULL;
1569 		}
1570 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1571 		cancel_delayed_work(&qca->ctrl_memdump_timeout);
1572 	}
1573 	mutex_unlock(&qca->hci_memdump_lock);
1574 
1575 	if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1576 	    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1577 		cancel_work_sync(&qca->ctrl_memdump_evt);
1578 		skb_queue_purge(&qca->rx_memdump_q);
1579 	}
1580 
1581 	clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1582 }
1583 
1584 static void qca_cmd_timeout(struct hci_dev *hdev)
1585 {
1586 	struct hci_uart *hu = hci_get_drvdata(hdev);
1587 	struct qca_data *qca = hu->priv;
1588 
1589 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1590 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1591 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1592 		qca_send_crashbuffer(hu);
1593 		qca_wait_for_dump_collection(hdev);
1594 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1595 		/* Let us wait here until memory dump collected or
1596 		 * memory dump timer expired.
1597 		 */
1598 		bt_dev_info(hdev, "waiting for dump to complete");
1599 		qca_wait_for_dump_collection(hdev);
1600 	}
1601 
1602 	mutex_lock(&qca->hci_memdump_lock);
1603 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1604 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1605 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1606 			/* Inject hw error event to reset the device
1607 			 * and driver.
1608 			 */
1609 			hci_reset_dev(hu->hdev);
1610 		}
1611 	}
1612 	mutex_unlock(&qca->hci_memdump_lock);
1613 }
1614 
1615 static bool qca_wakeup(struct hci_dev *hdev)
1616 {
1617 	struct hci_uart *hu = hci_get_drvdata(hdev);
1618 	bool wakeup;
1619 
1620 	/* BT SoC attached through the serial bus is handled by the serdev driver.
1621 	 * So we need to use the device handle of the serdev driver to get the
1622 	 * status of device may wakeup.
1623 	 */
1624 	wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1625 	bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1626 
1627 	return wakeup;
1628 }
1629 
1630 static int qca_regulator_init(struct hci_uart *hu)
1631 {
1632 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1633 	struct qca_serdev *qcadev;
1634 	int ret;
1635 	bool sw_ctrl_state;
1636 
1637 	/* Check for vregs status, may be hci down has turned
1638 	 * off the voltage regulator.
1639 	 */
1640 	qcadev = serdev_device_get_drvdata(hu->serdev);
1641 	if (!qcadev->bt_power->vregs_on) {
1642 		serdev_device_close(hu->serdev);
1643 		ret = qca_regulator_enable(qcadev);
1644 		if (ret)
1645 			return ret;
1646 
1647 		ret = serdev_device_open(hu->serdev);
1648 		if (ret) {
1649 			bt_dev_err(hu->hdev, "failed to open port");
1650 			return ret;
1651 		}
1652 	}
1653 
1654 	if (qca_is_wcn399x(soc_type)) {
1655 		/* Forcefully enable wcn399x to enter in to boot mode. */
1656 		host_set_baudrate(hu, 2400);
1657 		ret = qca_send_power_pulse(hu, false);
1658 		if (ret)
1659 			return ret;
1660 	}
1661 
1662 	/* For wcn6750 need to enable gpio bt_en */
1663 	if (qcadev->bt_en) {
1664 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
1665 		msleep(50);
1666 		gpiod_set_value_cansleep(qcadev->bt_en, 1);
1667 		msleep(50);
1668 		if (qcadev->sw_ctrl) {
1669 			sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1670 			bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1671 		}
1672 	}
1673 
1674 	qca_set_speed(hu, QCA_INIT_SPEED);
1675 
1676 	if (qca_is_wcn399x(soc_type)) {
1677 		ret = qca_send_power_pulse(hu, true);
1678 		if (ret)
1679 			return ret;
1680 	}
1681 
1682 	/* Now the device is in ready state to communicate with host.
1683 	 * To sync host with device we need to reopen port.
1684 	 * Without this, we will have RTS and CTS synchronization
1685 	 * issues.
1686 	 */
1687 	serdev_device_close(hu->serdev);
1688 	ret = serdev_device_open(hu->serdev);
1689 	if (ret) {
1690 		bt_dev_err(hu->hdev, "failed to open port");
1691 		return ret;
1692 	}
1693 
1694 	hci_uart_set_flow_control(hu, false);
1695 
1696 	return 0;
1697 }
1698 
1699 static int qca_power_on(struct hci_dev *hdev)
1700 {
1701 	struct hci_uart *hu = hci_get_drvdata(hdev);
1702 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1703 	struct qca_serdev *qcadev;
1704 	struct qca_data *qca = hu->priv;
1705 	int ret = 0;
1706 
1707 	/* Non-serdev device usually is powered by external power
1708 	 * and don't need additional action in driver for power on
1709 	 */
1710 	if (!hu->serdev)
1711 		return 0;
1712 
1713 	if (qca_is_wcn399x(soc_type) ||
1714 	    qca_is_wcn6750(soc_type) ||
1715 	    qca_is_wcn6855(soc_type)) {
1716 		ret = qca_regulator_init(hu);
1717 	} else {
1718 		qcadev = serdev_device_get_drvdata(hu->serdev);
1719 		if (qcadev->bt_en) {
1720 			gpiod_set_value_cansleep(qcadev->bt_en, 1);
1721 			/* Controller needs time to bootup. */
1722 			msleep(150);
1723 		}
1724 	}
1725 
1726 	clear_bit(QCA_BT_OFF, &qca->flags);
1727 	return ret;
1728 }
1729 
1730 static void hci_coredump_qca(struct hci_dev *hdev)
1731 {
1732 	static const u8 param[] = { 0x26 };
1733 	struct sk_buff *skb;
1734 
1735 	skb = __hci_cmd_sync(hdev, 0xfc0c, 1, param, HCI_CMD_TIMEOUT);
1736 	if (IS_ERR(skb))
1737 		bt_dev_err(hdev, "%s: trigger crash failed (%ld)", __func__, PTR_ERR(skb));
1738 	kfree_skb(skb);
1739 }
1740 
1741 static int qca_setup(struct hci_uart *hu)
1742 {
1743 	struct hci_dev *hdev = hu->hdev;
1744 	struct qca_data *qca = hu->priv;
1745 	unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1746 	unsigned int retries = 0;
1747 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1748 	const char *firmware_name = qca_get_firmware_name(hu);
1749 	int ret;
1750 	struct qca_btsoc_version ver;
1751 
1752 	ret = qca_check_speeds(hu);
1753 	if (ret)
1754 		return ret;
1755 
1756 	clear_bit(QCA_ROM_FW, &qca->flags);
1757 	/* Patch downloading has to be done without IBS mode */
1758 	set_bit(QCA_IBS_DISABLED, &qca->flags);
1759 
1760 	/* Enable controller to do both LE scan and BR/EDR inquiry
1761 	 * simultaneously.
1762 	 */
1763 	set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1764 
1765 	bt_dev_info(hdev, "setting up %s",
1766 		qca_is_wcn399x(soc_type) ? "wcn399x" :
1767 		(soc_type == QCA_WCN6750) ? "wcn6750" :
1768 		(soc_type == QCA_WCN6855) ? "wcn6855" : "ROME/QCA6390");
1769 
1770 	qca->memdump_state = QCA_MEMDUMP_IDLE;
1771 
1772 retry:
1773 	ret = qca_power_on(hdev);
1774 	if (ret)
1775 		goto out;
1776 
1777 	clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1778 
1779 	if (qca_is_wcn399x(soc_type) ||
1780 	    qca_is_wcn6750(soc_type) ||
1781 	    qca_is_wcn6855(soc_type)) {
1782 		set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
1783 		hci_set_aosp_capable(hdev);
1784 
1785 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1786 		if (ret)
1787 			goto out;
1788 	} else {
1789 		qca_set_speed(hu, QCA_INIT_SPEED);
1790 	}
1791 
1792 	/* Setup user speed if needed */
1793 	speed = qca_get_speed(hu, QCA_OPER_SPEED);
1794 	if (speed) {
1795 		ret = qca_set_speed(hu, QCA_OPER_SPEED);
1796 		if (ret)
1797 			goto out;
1798 
1799 		qca_baudrate = qca_get_baudrate_value(speed);
1800 	}
1801 
1802 	if (!(qca_is_wcn399x(soc_type) ||
1803 	      qca_is_wcn6750(soc_type) ||
1804 	      qca_is_wcn6855(soc_type))) {
1805 		/* Get QCA version information */
1806 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1807 		if (ret)
1808 			goto out;
1809 	}
1810 
1811 	/* Setup patch / NVM configurations */
1812 	ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1813 			firmware_name);
1814 	if (!ret) {
1815 		clear_bit(QCA_IBS_DISABLED, &qca->flags);
1816 		qca_debugfs_init(hdev);
1817 		hu->hdev->hw_error = qca_hw_error;
1818 		hu->hdev->cmd_timeout = qca_cmd_timeout;
1819 		if (device_can_wakeup(hu->serdev->ctrl->dev.parent))
1820 			hu->hdev->wakeup = qca_wakeup;
1821 	} else if (ret == -ENOENT) {
1822 		/* No patch/nvm-config found, run with original fw/config */
1823 		set_bit(QCA_ROM_FW, &qca->flags);
1824 		ret = 0;
1825 	} else if (ret == -EAGAIN) {
1826 		/*
1827 		 * Userspace firmware loader will return -EAGAIN in case no
1828 		 * patch/nvm-config is found, so run with original fw/config.
1829 		 */
1830 		set_bit(QCA_ROM_FW, &qca->flags);
1831 		ret = 0;
1832 	}
1833 
1834 out:
1835 	if (ret && retries < MAX_INIT_RETRIES) {
1836 		bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1837 		qca_power_shutdown(hu);
1838 		if (hu->serdev) {
1839 			serdev_device_close(hu->serdev);
1840 			ret = serdev_device_open(hu->serdev);
1841 			if (ret) {
1842 				bt_dev_err(hdev, "failed to open port");
1843 				return ret;
1844 			}
1845 		}
1846 		retries++;
1847 		goto retry;
1848 	}
1849 
1850 	/* Setup bdaddr */
1851 	if (soc_type == QCA_ROME)
1852 		hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1853 	else
1854 		hu->hdev->set_bdaddr = qca_set_bdaddr;
1855 	qca->fw_version = le16_to_cpu(ver.patch_ver);
1856 	qca->controller_id = le16_to_cpu(ver.rom_ver);
1857 	hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL);
1858 
1859 	return ret;
1860 }
1861 
1862 static const struct hci_uart_proto qca_proto = {
1863 	.id		= HCI_UART_QCA,
1864 	.name		= "QCA",
1865 	.manufacturer	= 29,
1866 	.init_speed	= 115200,
1867 	.oper_speed	= 3000000,
1868 	.open		= qca_open,
1869 	.close		= qca_close,
1870 	.flush		= qca_flush,
1871 	.setup		= qca_setup,
1872 	.recv		= qca_recv,
1873 	.enqueue	= qca_enqueue,
1874 	.dequeue	= qca_dequeue,
1875 };
1876 
1877 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
1878 	.soc_type = QCA_WCN3988,
1879 	.vregs = (struct qca_vreg []) {
1880 		{ "vddio", 15000  },
1881 		{ "vddxo", 80000  },
1882 		{ "vddrf", 300000 },
1883 		{ "vddch0", 450000 },
1884 	},
1885 	.num_vregs = 4,
1886 };
1887 
1888 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
1889 	.soc_type = QCA_WCN3990,
1890 	.vregs = (struct qca_vreg []) {
1891 		{ "vddio", 15000  },
1892 		{ "vddxo", 80000  },
1893 		{ "vddrf", 300000 },
1894 		{ "vddch0", 450000 },
1895 	},
1896 	.num_vregs = 4,
1897 };
1898 
1899 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
1900 	.soc_type = QCA_WCN3991,
1901 	.vregs = (struct qca_vreg []) {
1902 		{ "vddio", 15000  },
1903 		{ "vddxo", 80000  },
1904 		{ "vddrf", 300000 },
1905 		{ "vddch0", 450000 },
1906 	},
1907 	.num_vregs = 4,
1908 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1909 };
1910 
1911 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
1912 	.soc_type = QCA_WCN3998,
1913 	.vregs = (struct qca_vreg []) {
1914 		{ "vddio", 10000  },
1915 		{ "vddxo", 80000  },
1916 		{ "vddrf", 300000 },
1917 		{ "vddch0", 450000 },
1918 	},
1919 	.num_vregs = 4,
1920 };
1921 
1922 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
1923 	.soc_type = QCA_QCA6390,
1924 	.num_vregs = 0,
1925 };
1926 
1927 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
1928 	.soc_type = QCA_WCN6750,
1929 	.vregs = (struct qca_vreg []) {
1930 		{ "vddio", 5000 },
1931 		{ "vddaon", 26000 },
1932 		{ "vddbtcxmx", 126000 },
1933 		{ "vddrfacmn", 12500 },
1934 		{ "vddrfa0p8", 102000 },
1935 		{ "vddrfa1p7", 302000 },
1936 		{ "vddrfa1p2", 257000 },
1937 		{ "vddrfa2p2", 1700000 },
1938 		{ "vddasd", 200 },
1939 	},
1940 	.num_vregs = 9,
1941 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1942 };
1943 
1944 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
1945 	.soc_type = QCA_WCN6855,
1946 	.vregs = (struct qca_vreg []) {
1947 		{ "vddio", 5000 },
1948 		{ "vddbtcxmx", 126000 },
1949 		{ "vddrfacmn", 12500 },
1950 		{ "vddrfa0p8", 102000 },
1951 		{ "vddrfa1p7", 302000 },
1952 		{ "vddrfa1p2", 257000 },
1953 	},
1954 	.num_vregs = 6,
1955 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1956 };
1957 
1958 static void qca_power_shutdown(struct hci_uart *hu)
1959 {
1960 	struct qca_serdev *qcadev;
1961 	struct qca_data *qca = hu->priv;
1962 	unsigned long flags;
1963 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1964 	bool sw_ctrl_state;
1965 
1966 	/* From this point we go into power off state. But serial port is
1967 	 * still open, stop queueing the IBS data and flush all the buffered
1968 	 * data in skb's.
1969 	 */
1970 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
1971 	set_bit(QCA_IBS_DISABLED, &qca->flags);
1972 	qca_flush(hu);
1973 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
1974 
1975 	/* Non-serdev device usually is powered by external power
1976 	 * and don't need additional action in driver for power down
1977 	 */
1978 	if (!hu->serdev)
1979 		return;
1980 
1981 	qcadev = serdev_device_get_drvdata(hu->serdev);
1982 
1983 	if (qca_is_wcn399x(soc_type)) {
1984 		host_set_baudrate(hu, 2400);
1985 		qca_send_power_pulse(hu, false);
1986 		qca_regulator_disable(qcadev);
1987 	} else if (soc_type == QCA_WCN6750 || soc_type == QCA_WCN6855) {
1988 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
1989 		msleep(100);
1990 		qca_regulator_disable(qcadev);
1991 		if (qcadev->sw_ctrl) {
1992 			sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1993 			bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1994 		}
1995 	} else if (qcadev->bt_en) {
1996 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
1997 	}
1998 
1999 	set_bit(QCA_BT_OFF, &qca->flags);
2000 }
2001 
2002 static int qca_power_off(struct hci_dev *hdev)
2003 {
2004 	struct hci_uart *hu = hci_get_drvdata(hdev);
2005 	struct qca_data *qca = hu->priv;
2006 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
2007 
2008 	hu->hdev->hw_error = NULL;
2009 	hu->hdev->cmd_timeout = NULL;
2010 
2011 	del_timer_sync(&qca->wake_retrans_timer);
2012 	del_timer_sync(&qca->tx_idle_timer);
2013 
2014 	/* Stop sending shutdown command if soc crashes. */
2015 	if (soc_type != QCA_ROME
2016 		&& qca->memdump_state == QCA_MEMDUMP_IDLE) {
2017 		qca_send_pre_shutdown_cmd(hdev);
2018 		usleep_range(8000, 10000);
2019 	}
2020 
2021 	qca_power_shutdown(hu);
2022 	return 0;
2023 }
2024 
2025 static int qca_regulator_enable(struct qca_serdev *qcadev)
2026 {
2027 	struct qca_power *power = qcadev->bt_power;
2028 	int ret;
2029 
2030 	/* Already enabled */
2031 	if (power->vregs_on)
2032 		return 0;
2033 
2034 	BT_DBG("enabling %d regulators)", power->num_vregs);
2035 
2036 	ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
2037 	if (ret)
2038 		return ret;
2039 
2040 	power->vregs_on = true;
2041 
2042 	ret = clk_prepare_enable(qcadev->susclk);
2043 	if (ret)
2044 		qca_regulator_disable(qcadev);
2045 
2046 	return ret;
2047 }
2048 
2049 static void qca_regulator_disable(struct qca_serdev *qcadev)
2050 {
2051 	struct qca_power *power;
2052 
2053 	if (!qcadev)
2054 		return;
2055 
2056 	power = qcadev->bt_power;
2057 
2058 	/* Already disabled? */
2059 	if (!power->vregs_on)
2060 		return;
2061 
2062 	regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
2063 	power->vregs_on = false;
2064 
2065 	clk_disable_unprepare(qcadev->susclk);
2066 }
2067 
2068 static int qca_init_regulators(struct qca_power *qca,
2069 				const struct qca_vreg *vregs, size_t num_vregs)
2070 {
2071 	struct regulator_bulk_data *bulk;
2072 	int ret;
2073 	int i;
2074 
2075 	bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2076 	if (!bulk)
2077 		return -ENOMEM;
2078 
2079 	for (i = 0; i < num_vregs; i++)
2080 		bulk[i].supply = vregs[i].name;
2081 
2082 	ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2083 	if (ret < 0)
2084 		return ret;
2085 
2086 	for (i = 0; i < num_vregs; i++) {
2087 		ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2088 		if (ret)
2089 			return ret;
2090 	}
2091 
2092 	qca->vreg_bulk = bulk;
2093 	qca->num_vregs = num_vregs;
2094 
2095 	return 0;
2096 }
2097 
2098 static int qca_serdev_probe(struct serdev_device *serdev)
2099 {
2100 	struct qca_serdev *qcadev;
2101 	struct hci_dev *hdev;
2102 	const struct qca_device_data *data;
2103 	int err;
2104 	bool power_ctrl_enabled = true;
2105 
2106 	qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2107 	if (!qcadev)
2108 		return -ENOMEM;
2109 
2110 	qcadev->serdev_hu.serdev = serdev;
2111 	data = device_get_match_data(&serdev->dev);
2112 	serdev_device_set_drvdata(serdev, qcadev);
2113 	device_property_read_string(&serdev->dev, "firmware-name",
2114 					 &qcadev->firmware_name);
2115 	device_property_read_u32(&serdev->dev, "max-speed",
2116 				 &qcadev->oper_speed);
2117 	if (!qcadev->oper_speed)
2118 		BT_DBG("UART will pick default operating speed");
2119 
2120 	if (data &&
2121 	    (qca_is_wcn399x(data->soc_type) ||
2122 	     qca_is_wcn6750(data->soc_type) ||
2123 	     qca_is_wcn6855(data->soc_type))) {
2124 		qcadev->btsoc_type = data->soc_type;
2125 		qcadev->bt_power = devm_kzalloc(&serdev->dev,
2126 						sizeof(struct qca_power),
2127 						GFP_KERNEL);
2128 		if (!qcadev->bt_power)
2129 			return -ENOMEM;
2130 
2131 		qcadev->bt_power->dev = &serdev->dev;
2132 		err = qca_init_regulators(qcadev->bt_power, data->vregs,
2133 					  data->num_vregs);
2134 		if (err) {
2135 			BT_ERR("Failed to init regulators:%d", err);
2136 			return err;
2137 		}
2138 
2139 		qcadev->bt_power->vregs_on = false;
2140 
2141 		qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2142 					       GPIOD_OUT_LOW);
2143 		if (IS_ERR_OR_NULL(qcadev->bt_en) &&
2144 		    (data->soc_type == QCA_WCN6750 ||
2145 		     data->soc_type == QCA_WCN6855)) {
2146 			dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2147 			power_ctrl_enabled = false;
2148 		}
2149 
2150 		qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2151 					       GPIOD_IN);
2152 		if (IS_ERR_OR_NULL(qcadev->sw_ctrl) &&
2153 		    (data->soc_type == QCA_WCN6750 ||
2154 		     data->soc_type == QCA_WCN6855))
2155 			dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2156 
2157 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2158 		if (IS_ERR(qcadev->susclk)) {
2159 			dev_err(&serdev->dev, "failed to acquire clk\n");
2160 			return PTR_ERR(qcadev->susclk);
2161 		}
2162 
2163 		err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2164 		if (err) {
2165 			BT_ERR("wcn3990 serdev registration failed");
2166 			return err;
2167 		}
2168 	} else {
2169 		if (data)
2170 			qcadev->btsoc_type = data->soc_type;
2171 		else
2172 			qcadev->btsoc_type = QCA_ROME;
2173 
2174 		qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2175 					       GPIOD_OUT_LOW);
2176 		if (IS_ERR_OR_NULL(qcadev->bt_en)) {
2177 			dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2178 			power_ctrl_enabled = false;
2179 		}
2180 
2181 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2182 		if (IS_ERR(qcadev->susclk)) {
2183 			dev_warn(&serdev->dev, "failed to acquire clk\n");
2184 			return PTR_ERR(qcadev->susclk);
2185 		}
2186 		err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2187 		if (err)
2188 			return err;
2189 
2190 		err = clk_prepare_enable(qcadev->susclk);
2191 		if (err)
2192 			return err;
2193 
2194 		err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2195 		if (err) {
2196 			BT_ERR("Rome serdev registration failed");
2197 			clk_disable_unprepare(qcadev->susclk);
2198 			return err;
2199 		}
2200 	}
2201 
2202 	hdev = qcadev->serdev_hu.hdev;
2203 
2204 	if (power_ctrl_enabled) {
2205 		set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2206 		hdev->shutdown = qca_power_off;
2207 	}
2208 
2209 	if (data) {
2210 		/* Wideband speech support must be set per driver since it can't
2211 		 * be queried via hci. Same with the valid le states quirk.
2212 		 */
2213 		if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2214 			set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2215 				&hdev->quirks);
2216 
2217 		if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2218 			set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2219 	}
2220 
2221 	return 0;
2222 }
2223 
2224 static void qca_serdev_remove(struct serdev_device *serdev)
2225 {
2226 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2227 	struct qca_power *power = qcadev->bt_power;
2228 
2229 	if ((qca_is_wcn399x(qcadev->btsoc_type) ||
2230 	     qca_is_wcn6750(qcadev->btsoc_type) ||
2231 	     qca_is_wcn6855(qcadev->btsoc_type)) &&
2232 	    power->vregs_on)
2233 		qca_power_shutdown(&qcadev->serdev_hu);
2234 	else if (qcadev->susclk)
2235 		clk_disable_unprepare(qcadev->susclk);
2236 
2237 	hci_uart_unregister_device(&qcadev->serdev_hu);
2238 }
2239 
2240 static void qca_serdev_shutdown(struct device *dev)
2241 {
2242 	int ret;
2243 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2244 	struct serdev_device *serdev = to_serdev_device(dev);
2245 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2246 	struct hci_uart *hu = &qcadev->serdev_hu;
2247 	struct hci_dev *hdev = hu->hdev;
2248 	struct qca_data *qca = hu->priv;
2249 	const u8 ibs_wake_cmd[] = { 0xFD };
2250 	const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2251 
2252 	if (qcadev->btsoc_type == QCA_QCA6390) {
2253 		if (test_bit(QCA_BT_OFF, &qca->flags) ||
2254 		    !test_bit(HCI_RUNNING, &hdev->flags))
2255 			return;
2256 
2257 		serdev_device_write_flush(serdev);
2258 		ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2259 					      sizeof(ibs_wake_cmd));
2260 		if (ret < 0) {
2261 			BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2262 			return;
2263 		}
2264 		serdev_device_wait_until_sent(serdev, timeout);
2265 		usleep_range(8000, 10000);
2266 
2267 		serdev_device_write_flush(serdev);
2268 		ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2269 					      sizeof(edl_reset_soc_cmd));
2270 		if (ret < 0) {
2271 			BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2272 			return;
2273 		}
2274 		serdev_device_wait_until_sent(serdev, timeout);
2275 		usleep_range(8000, 10000);
2276 	}
2277 }
2278 
2279 static int __maybe_unused qca_suspend(struct device *dev)
2280 {
2281 	struct serdev_device *serdev = to_serdev_device(dev);
2282 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2283 	struct hci_uart *hu = &qcadev->serdev_hu;
2284 	struct qca_data *qca = hu->priv;
2285 	unsigned long flags;
2286 	bool tx_pending = false;
2287 	int ret = 0;
2288 	u8 cmd;
2289 	u32 wait_timeout = 0;
2290 
2291 	set_bit(QCA_SUSPENDING, &qca->flags);
2292 
2293 	/* if BT SoC is running with default firmware then it does not
2294 	 * support in-band sleep
2295 	 */
2296 	if (test_bit(QCA_ROM_FW, &qca->flags))
2297 		return 0;
2298 
2299 	/* During SSR after memory dump collection, controller will be
2300 	 * powered off and then powered on.If controller is powered off
2301 	 * during SSR then we should wait until SSR is completed.
2302 	 */
2303 	if (test_bit(QCA_BT_OFF, &qca->flags) &&
2304 	    !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2305 		return 0;
2306 
2307 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2308 	    test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2309 		wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2310 					IBS_DISABLE_SSR_TIMEOUT_MS :
2311 					FW_DOWNLOAD_TIMEOUT_MS;
2312 
2313 		/* QCA_IBS_DISABLED flag is set to true, During FW download
2314 		 * and during memory dump collection. It is reset to false,
2315 		 * After FW download complete.
2316 		 */
2317 		wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2318 			    TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2319 
2320 		if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2321 			bt_dev_err(hu->hdev, "SSR or FW download time out");
2322 			ret = -ETIMEDOUT;
2323 			goto error;
2324 		}
2325 	}
2326 
2327 	cancel_work_sync(&qca->ws_awake_device);
2328 	cancel_work_sync(&qca->ws_awake_rx);
2329 
2330 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2331 				 flags, SINGLE_DEPTH_NESTING);
2332 
2333 	switch (qca->tx_ibs_state) {
2334 	case HCI_IBS_TX_WAKING:
2335 		del_timer(&qca->wake_retrans_timer);
2336 		fallthrough;
2337 	case HCI_IBS_TX_AWAKE:
2338 		del_timer(&qca->tx_idle_timer);
2339 
2340 		serdev_device_write_flush(hu->serdev);
2341 		cmd = HCI_IBS_SLEEP_IND;
2342 		ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2343 
2344 		if (ret < 0) {
2345 			BT_ERR("Failed to send SLEEP to device");
2346 			break;
2347 		}
2348 
2349 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2350 		qca->ibs_sent_slps++;
2351 		tx_pending = true;
2352 		break;
2353 
2354 	case HCI_IBS_TX_ASLEEP:
2355 		break;
2356 
2357 	default:
2358 		BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2359 		ret = -EINVAL;
2360 		break;
2361 	}
2362 
2363 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2364 
2365 	if (ret < 0)
2366 		goto error;
2367 
2368 	if (tx_pending) {
2369 		serdev_device_wait_until_sent(hu->serdev,
2370 					      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2371 		serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2372 	}
2373 
2374 	/* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2375 	 * to sleep, so that the packet does not wake the system later.
2376 	 */
2377 	ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2378 			qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2379 			msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2380 	if (ret == 0) {
2381 		ret = -ETIMEDOUT;
2382 		goto error;
2383 	}
2384 
2385 	return 0;
2386 
2387 error:
2388 	clear_bit(QCA_SUSPENDING, &qca->flags);
2389 
2390 	return ret;
2391 }
2392 
2393 static int __maybe_unused qca_resume(struct device *dev)
2394 {
2395 	struct serdev_device *serdev = to_serdev_device(dev);
2396 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2397 	struct hci_uart *hu = &qcadev->serdev_hu;
2398 	struct qca_data *qca = hu->priv;
2399 
2400 	clear_bit(QCA_SUSPENDING, &qca->flags);
2401 
2402 	return 0;
2403 }
2404 
2405 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2406 
2407 #ifdef CONFIG_OF
2408 static const struct of_device_id qca_bluetooth_of_match[] = {
2409 	{ .compatible = "qcom,qca6174-bt" },
2410 	{ .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2411 	{ .compatible = "qcom,qca9377-bt" },
2412 	{ .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2413 	{ .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2414 	{ .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2415 	{ .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2416 	{ .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2417 	{ .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2418 	{ /* sentinel */ }
2419 };
2420 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2421 #endif
2422 
2423 #ifdef CONFIG_ACPI
2424 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2425 	{ "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2426 	{ "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2427 	{ "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2428 	{ "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2429 	{ },
2430 };
2431 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2432 #endif
2433 
2434 #ifdef CONFIG_DEV_COREDUMP
2435 static void hciqca_coredump(struct device *dev)
2436 {
2437 	struct serdev_device *serdev = to_serdev_device(dev);
2438 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2439 	struct hci_uart *hu = &qcadev->serdev_hu;
2440 	struct hci_dev  *hdev = hu->hdev;
2441 
2442 	if (hdev->dump.coredump)
2443 		hdev->dump.coredump(hdev);
2444 }
2445 #endif
2446 
2447 static struct serdev_device_driver qca_serdev_driver = {
2448 	.probe = qca_serdev_probe,
2449 	.remove = qca_serdev_remove,
2450 	.driver = {
2451 		.name = "hci_uart_qca",
2452 		.of_match_table = of_match_ptr(qca_bluetooth_of_match),
2453 		.acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2454 		.shutdown = qca_serdev_shutdown,
2455 		.pm = &qca_pm_ops,
2456 #ifdef CONFIG_DEV_COREDUMP
2457 		.coredump = hciqca_coredump,
2458 #endif
2459 	},
2460 };
2461 
2462 int __init qca_init(void)
2463 {
2464 	serdev_device_driver_register(&qca_serdev_driver);
2465 
2466 	return hci_uart_register_proto(&qca_proto);
2467 }
2468 
2469 int __exit qca_deinit(void)
2470 {
2471 	serdev_device_driver_unregister(&qca_serdev_driver);
2472 
2473 	return hci_uart_unregister_proto(&qca_proto);
2474 }
2475