1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of_device.h> 29 #include <linux/acpi.h> 30 #include <linux/platform_device.h> 31 #include <linux/regulator/consumer.h> 32 #include <linux/serdev.h> 33 #include <linux/mutex.h> 34 #include <asm/unaligned.h> 35 36 #include <net/bluetooth/bluetooth.h> 37 #include <net/bluetooth/hci_core.h> 38 39 #include "hci_uart.h" 40 #include "btqca.h" 41 42 /* HCI_IBS protocol messages */ 43 #define HCI_IBS_SLEEP_IND 0xFE 44 #define HCI_IBS_WAKE_IND 0xFD 45 #define HCI_IBS_WAKE_ACK 0xFC 46 #define HCI_MAX_IBS_SIZE 10 47 48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 51 #define CMD_TRANS_TIMEOUT_MS 100 52 #define MEMDUMP_TIMEOUT_MS 8000 53 #define IBS_DISABLE_SSR_TIMEOUT_MS \ 54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 55 #define FW_DOWNLOAD_TIMEOUT_MS 3000 56 57 /* susclk rate */ 58 #define SUSCLK_RATE_32KHZ 32768 59 60 /* Controller debug log header */ 61 #define QCA_DEBUG_HANDLE 0x2EDC 62 63 /* max retry count when init fails */ 64 #define MAX_INIT_RETRIES 3 65 66 /* Controller dump header */ 67 #define QCA_SSR_DUMP_HANDLE 0x0108 68 #define QCA_DUMP_PACKET_SIZE 255 69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 70 #define QCA_CRASHBYTE_PACKET_LEN 1096 71 #define QCA_MEMDUMP_BYTE 0xFB 72 73 enum qca_flags { 74 QCA_IBS_DISABLED, 75 QCA_DROP_VENDOR_EVENT, 76 QCA_SUSPENDING, 77 QCA_MEMDUMP_COLLECTION, 78 QCA_HW_ERROR_EVENT, 79 QCA_SSR_TRIGGERED, 80 QCA_BT_OFF, 81 QCA_ROM_FW, 82 QCA_DEBUGFS_CREATED, 83 }; 84 85 enum qca_capabilities { 86 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 87 QCA_CAP_VALID_LE_STATES = BIT(1), 88 }; 89 90 /* HCI_IBS transmit side sleep protocol states */ 91 enum tx_ibs_states { 92 HCI_IBS_TX_ASLEEP, 93 HCI_IBS_TX_WAKING, 94 HCI_IBS_TX_AWAKE, 95 }; 96 97 /* HCI_IBS receive side sleep protocol states */ 98 enum rx_states { 99 HCI_IBS_RX_ASLEEP, 100 HCI_IBS_RX_AWAKE, 101 }; 102 103 /* HCI_IBS transmit and receive side clock state vote */ 104 enum hci_ibs_clock_state_vote { 105 HCI_IBS_VOTE_STATS_UPDATE, 106 HCI_IBS_TX_VOTE_CLOCK_ON, 107 HCI_IBS_TX_VOTE_CLOCK_OFF, 108 HCI_IBS_RX_VOTE_CLOCK_ON, 109 HCI_IBS_RX_VOTE_CLOCK_OFF, 110 }; 111 112 /* Controller memory dump states */ 113 enum qca_memdump_states { 114 QCA_MEMDUMP_IDLE, 115 QCA_MEMDUMP_COLLECTING, 116 QCA_MEMDUMP_COLLECTED, 117 QCA_MEMDUMP_TIMEOUT, 118 }; 119 120 struct qca_memdump_data { 121 char *memdump_buf_head; 122 char *memdump_buf_tail; 123 u32 current_seq_no; 124 u32 received_dump; 125 u32 ram_dump_size; 126 }; 127 128 struct qca_memdump_event_hdr { 129 __u8 evt; 130 __u8 plen; 131 __u16 opcode; 132 __le16 seq_no; 133 __u8 reserved; 134 } __packed; 135 136 137 struct qca_dump_size { 138 __le32 dump_size; 139 } __packed; 140 141 struct qca_data { 142 struct hci_uart *hu; 143 struct sk_buff *rx_skb; 144 struct sk_buff_head txq; 145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 149 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 150 bool tx_vote; /* Clock must be on for TX */ 151 bool rx_vote; /* Clock must be on for RX */ 152 struct timer_list tx_idle_timer; 153 u32 tx_idle_delay; 154 struct timer_list wake_retrans_timer; 155 u32 wake_retrans; 156 struct workqueue_struct *workqueue; 157 struct work_struct ws_awake_rx; 158 struct work_struct ws_awake_device; 159 struct work_struct ws_rx_vote_off; 160 struct work_struct ws_tx_vote_off; 161 struct work_struct ctrl_memdump_evt; 162 struct delayed_work ctrl_memdump_timeout; 163 struct qca_memdump_data *qca_memdump; 164 unsigned long flags; 165 struct completion drop_ev_comp; 166 wait_queue_head_t suspend_wait_q; 167 enum qca_memdump_states memdump_state; 168 struct mutex hci_memdump_lock; 169 170 /* For debugging purpose */ 171 u64 ibs_sent_wacks; 172 u64 ibs_sent_slps; 173 u64 ibs_sent_wakes; 174 u64 ibs_recv_wacks; 175 u64 ibs_recv_slps; 176 u64 ibs_recv_wakes; 177 u64 vote_last_jif; 178 u32 vote_on_ms; 179 u32 vote_off_ms; 180 u64 tx_votes_on; 181 u64 rx_votes_on; 182 u64 tx_votes_off; 183 u64 rx_votes_off; 184 u64 votes_on; 185 u64 votes_off; 186 }; 187 188 enum qca_speed_type { 189 QCA_INIT_SPEED = 1, 190 QCA_OPER_SPEED 191 }; 192 193 /* 194 * Voltage regulator information required for configuring the 195 * QCA Bluetooth chipset 196 */ 197 struct qca_vreg { 198 const char *name; 199 unsigned int load_uA; 200 }; 201 202 struct qca_device_data { 203 enum qca_btsoc_type soc_type; 204 struct qca_vreg *vregs; 205 size_t num_vregs; 206 uint32_t capabilities; 207 }; 208 209 /* 210 * Platform data for the QCA Bluetooth power driver. 211 */ 212 struct qca_power { 213 struct device *dev; 214 struct regulator_bulk_data *vreg_bulk; 215 int num_vregs; 216 bool vregs_on; 217 }; 218 219 struct qca_serdev { 220 struct hci_uart serdev_hu; 221 struct gpio_desc *bt_en; 222 struct gpio_desc *sw_ctrl; 223 struct clk *susclk; 224 enum qca_btsoc_type btsoc_type; 225 struct qca_power *bt_power; 226 u32 init_speed; 227 u32 oper_speed; 228 const char *firmware_name; 229 }; 230 231 static int qca_regulator_enable(struct qca_serdev *qcadev); 232 static void qca_regulator_disable(struct qca_serdev *qcadev); 233 static void qca_power_shutdown(struct hci_uart *hu); 234 static int qca_power_off(struct hci_dev *hdev); 235 static void qca_controller_memdump(struct work_struct *work); 236 237 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 238 { 239 enum qca_btsoc_type soc_type; 240 241 if (hu->serdev) { 242 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 243 244 soc_type = qsd->btsoc_type; 245 } else { 246 soc_type = QCA_ROME; 247 } 248 249 return soc_type; 250 } 251 252 static const char *qca_get_firmware_name(struct hci_uart *hu) 253 { 254 if (hu->serdev) { 255 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 256 257 return qsd->firmware_name; 258 } else { 259 return NULL; 260 } 261 } 262 263 static void __serial_clock_on(struct tty_struct *tty) 264 { 265 /* TODO: Some chipset requires to enable UART clock on client 266 * side to save power consumption or manual work is required. 267 * Please put your code to control UART clock here if needed 268 */ 269 } 270 271 static void __serial_clock_off(struct tty_struct *tty) 272 { 273 /* TODO: Some chipset requires to disable UART clock on client 274 * side to save power consumption or manual work is required. 275 * Please put your code to control UART clock off here if needed 276 */ 277 } 278 279 /* serial_clock_vote needs to be called with the ibs lock held */ 280 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 281 { 282 struct qca_data *qca = hu->priv; 283 unsigned int diff; 284 285 bool old_vote = (qca->tx_vote | qca->rx_vote); 286 bool new_vote; 287 288 switch (vote) { 289 case HCI_IBS_VOTE_STATS_UPDATE: 290 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 291 292 if (old_vote) 293 qca->vote_off_ms += diff; 294 else 295 qca->vote_on_ms += diff; 296 return; 297 298 case HCI_IBS_TX_VOTE_CLOCK_ON: 299 qca->tx_vote = true; 300 qca->tx_votes_on++; 301 break; 302 303 case HCI_IBS_RX_VOTE_CLOCK_ON: 304 qca->rx_vote = true; 305 qca->rx_votes_on++; 306 break; 307 308 case HCI_IBS_TX_VOTE_CLOCK_OFF: 309 qca->tx_vote = false; 310 qca->tx_votes_off++; 311 break; 312 313 case HCI_IBS_RX_VOTE_CLOCK_OFF: 314 qca->rx_vote = false; 315 qca->rx_votes_off++; 316 break; 317 318 default: 319 BT_ERR("Voting irregularity"); 320 return; 321 } 322 323 new_vote = qca->rx_vote | qca->tx_vote; 324 325 if (new_vote != old_vote) { 326 if (new_vote) 327 __serial_clock_on(hu->tty); 328 else 329 __serial_clock_off(hu->tty); 330 331 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", 332 vote ? "true" : "false"); 333 334 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 335 336 if (new_vote) { 337 qca->votes_on++; 338 qca->vote_off_ms += diff; 339 } else { 340 qca->votes_off++; 341 qca->vote_on_ms += diff; 342 } 343 qca->vote_last_jif = jiffies; 344 } 345 } 346 347 /* Builds and sends an HCI_IBS command packet. 348 * These are very simple packets with only 1 cmd byte. 349 */ 350 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 351 { 352 int err = 0; 353 struct sk_buff *skb = NULL; 354 struct qca_data *qca = hu->priv; 355 356 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 357 358 skb = bt_skb_alloc(1, GFP_ATOMIC); 359 if (!skb) { 360 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 361 return -ENOMEM; 362 } 363 364 /* Assign HCI_IBS type */ 365 skb_put_u8(skb, cmd); 366 367 skb_queue_tail(&qca->txq, skb); 368 369 return err; 370 } 371 372 static void qca_wq_awake_device(struct work_struct *work) 373 { 374 struct qca_data *qca = container_of(work, struct qca_data, 375 ws_awake_device); 376 struct hci_uart *hu = qca->hu; 377 unsigned long retrans_delay; 378 unsigned long flags; 379 380 BT_DBG("hu %p wq awake device", hu); 381 382 /* Vote for serial clock */ 383 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 384 385 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 386 387 /* Send wake indication to device */ 388 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 389 BT_ERR("Failed to send WAKE to device"); 390 391 qca->ibs_sent_wakes++; 392 393 /* Start retransmit timer */ 394 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 395 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 396 397 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 398 399 /* Actually send the packets */ 400 hci_uart_tx_wakeup(hu); 401 } 402 403 static void qca_wq_awake_rx(struct work_struct *work) 404 { 405 struct qca_data *qca = container_of(work, struct qca_data, 406 ws_awake_rx); 407 struct hci_uart *hu = qca->hu; 408 unsigned long flags; 409 410 BT_DBG("hu %p wq awake rx", hu); 411 412 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 413 414 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 415 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 416 417 /* Always acknowledge device wake up, 418 * sending IBS message doesn't count as TX ON. 419 */ 420 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 421 BT_ERR("Failed to acknowledge device wake up"); 422 423 qca->ibs_sent_wacks++; 424 425 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 426 427 /* Actually send the packets */ 428 hci_uart_tx_wakeup(hu); 429 } 430 431 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 432 { 433 struct qca_data *qca = container_of(work, struct qca_data, 434 ws_rx_vote_off); 435 struct hci_uart *hu = qca->hu; 436 437 BT_DBG("hu %p rx clock vote off", hu); 438 439 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 440 } 441 442 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 443 { 444 struct qca_data *qca = container_of(work, struct qca_data, 445 ws_tx_vote_off); 446 struct hci_uart *hu = qca->hu; 447 448 BT_DBG("hu %p tx clock vote off", hu); 449 450 /* Run HCI tx handling unlocked */ 451 hci_uart_tx_wakeup(hu); 452 453 /* Now that message queued to tty driver, vote for tty clocks off. 454 * It is up to the tty driver to pend the clocks off until tx done. 455 */ 456 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 457 } 458 459 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 460 { 461 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 462 struct hci_uart *hu = qca->hu; 463 unsigned long flags; 464 465 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 466 467 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 468 flags, SINGLE_DEPTH_NESTING); 469 470 switch (qca->tx_ibs_state) { 471 case HCI_IBS_TX_AWAKE: 472 /* TX_IDLE, go to SLEEP */ 473 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 474 BT_ERR("Failed to send SLEEP to device"); 475 break; 476 } 477 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 478 qca->ibs_sent_slps++; 479 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 480 break; 481 482 case HCI_IBS_TX_ASLEEP: 483 case HCI_IBS_TX_WAKING: 484 default: 485 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 486 break; 487 } 488 489 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 490 } 491 492 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 493 { 494 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 495 struct hci_uart *hu = qca->hu; 496 unsigned long flags, retrans_delay; 497 bool retransmit = false; 498 499 BT_DBG("hu %p wake retransmit timeout in %d state", 500 hu, qca->tx_ibs_state); 501 502 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 503 flags, SINGLE_DEPTH_NESTING); 504 505 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 506 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 507 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 508 return; 509 } 510 511 switch (qca->tx_ibs_state) { 512 case HCI_IBS_TX_WAKING: 513 /* No WAKE_ACK, retransmit WAKE */ 514 retransmit = true; 515 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 516 BT_ERR("Failed to acknowledge device wake up"); 517 break; 518 } 519 qca->ibs_sent_wakes++; 520 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 521 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 522 break; 523 524 case HCI_IBS_TX_ASLEEP: 525 case HCI_IBS_TX_AWAKE: 526 default: 527 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 528 break; 529 } 530 531 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 532 533 if (retransmit) 534 hci_uart_tx_wakeup(hu); 535 } 536 537 538 static void qca_controller_memdump_timeout(struct work_struct *work) 539 { 540 struct qca_data *qca = container_of(work, struct qca_data, 541 ctrl_memdump_timeout.work); 542 struct hci_uart *hu = qca->hu; 543 544 mutex_lock(&qca->hci_memdump_lock); 545 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 546 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 547 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 548 /* Inject hw error event to reset the device 549 * and driver. 550 */ 551 hci_reset_dev(hu->hdev); 552 } 553 } 554 555 mutex_unlock(&qca->hci_memdump_lock); 556 } 557 558 559 /* Initialize protocol */ 560 static int qca_open(struct hci_uart *hu) 561 { 562 struct qca_serdev *qcadev; 563 struct qca_data *qca; 564 565 BT_DBG("hu %p qca_open", hu); 566 567 if (!hci_uart_has_flow_control(hu)) 568 return -EOPNOTSUPP; 569 570 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); 571 if (!qca) 572 return -ENOMEM; 573 574 skb_queue_head_init(&qca->txq); 575 skb_queue_head_init(&qca->tx_wait_q); 576 skb_queue_head_init(&qca->rx_memdump_q); 577 spin_lock_init(&qca->hci_ibs_lock); 578 mutex_init(&qca->hci_memdump_lock); 579 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 580 if (!qca->workqueue) { 581 BT_ERR("QCA Workqueue not initialized properly"); 582 kfree(qca); 583 return -ENOMEM; 584 } 585 586 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 587 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 588 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 589 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 590 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 591 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 592 qca_controller_memdump_timeout); 593 init_waitqueue_head(&qca->suspend_wait_q); 594 595 qca->hu = hu; 596 init_completion(&qca->drop_ev_comp); 597 598 /* Assume we start with both sides asleep -- extra wakes OK */ 599 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 600 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 601 602 qca->vote_last_jif = jiffies; 603 604 hu->priv = qca; 605 606 if (hu->serdev) { 607 qcadev = serdev_device_get_drvdata(hu->serdev); 608 609 if (qca_is_wcn399x(qcadev->btsoc_type) || 610 qca_is_wcn6750(qcadev->btsoc_type)) 611 hu->init_speed = qcadev->init_speed; 612 613 if (qcadev->oper_speed) 614 hu->oper_speed = qcadev->oper_speed; 615 } 616 617 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 618 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 619 620 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 621 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 622 623 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 624 qca->tx_idle_delay, qca->wake_retrans); 625 626 return 0; 627 } 628 629 static void qca_debugfs_init(struct hci_dev *hdev) 630 { 631 struct hci_uart *hu = hci_get_drvdata(hdev); 632 struct qca_data *qca = hu->priv; 633 struct dentry *ibs_dir; 634 umode_t mode; 635 636 if (!hdev->debugfs) 637 return; 638 639 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 640 return; 641 642 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 643 644 /* read only */ 645 mode = 0444; 646 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 647 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 648 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 649 &qca->ibs_sent_slps); 650 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 651 &qca->ibs_sent_wakes); 652 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 653 &qca->ibs_sent_wacks); 654 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 655 &qca->ibs_recv_slps); 656 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 657 &qca->ibs_recv_wakes); 658 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 659 &qca->ibs_recv_wacks); 660 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 661 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 662 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 663 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 664 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 665 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 666 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 667 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 668 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 669 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 670 671 /* read/write */ 672 mode = 0644; 673 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 674 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 675 &qca->tx_idle_delay); 676 } 677 678 /* Flush protocol data */ 679 static int qca_flush(struct hci_uart *hu) 680 { 681 struct qca_data *qca = hu->priv; 682 683 BT_DBG("hu %p qca flush", hu); 684 685 skb_queue_purge(&qca->tx_wait_q); 686 skb_queue_purge(&qca->txq); 687 688 return 0; 689 } 690 691 /* Close protocol */ 692 static int qca_close(struct hci_uart *hu) 693 { 694 struct qca_data *qca = hu->priv; 695 696 BT_DBG("hu %p qca close", hu); 697 698 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 699 700 skb_queue_purge(&qca->tx_wait_q); 701 skb_queue_purge(&qca->txq); 702 skb_queue_purge(&qca->rx_memdump_q); 703 /* 704 * Shut the timers down so they can't be rearmed when 705 * destroy_workqueue() drains pending work which in turn might try 706 * to arm a timer. After shutdown rearm attempts are silently 707 * ignored by the timer core code. 708 */ 709 timer_shutdown_sync(&qca->tx_idle_timer); 710 timer_shutdown_sync(&qca->wake_retrans_timer); 711 destroy_workqueue(qca->workqueue); 712 qca->hu = NULL; 713 714 kfree_skb(qca->rx_skb); 715 716 hu->priv = NULL; 717 718 kfree(qca); 719 720 return 0; 721 } 722 723 /* Called upon a wake-up-indication from the device. 724 */ 725 static void device_want_to_wakeup(struct hci_uart *hu) 726 { 727 unsigned long flags; 728 struct qca_data *qca = hu->priv; 729 730 BT_DBG("hu %p want to wake up", hu); 731 732 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 733 734 qca->ibs_recv_wakes++; 735 736 /* Don't wake the rx up when suspending. */ 737 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 738 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 739 return; 740 } 741 742 switch (qca->rx_ibs_state) { 743 case HCI_IBS_RX_ASLEEP: 744 /* Make sure clock is on - we may have turned clock off since 745 * receiving the wake up indicator awake rx clock. 746 */ 747 queue_work(qca->workqueue, &qca->ws_awake_rx); 748 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 749 return; 750 751 case HCI_IBS_RX_AWAKE: 752 /* Always acknowledge device wake up, 753 * sending IBS message doesn't count as TX ON. 754 */ 755 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 756 BT_ERR("Failed to acknowledge device wake up"); 757 break; 758 } 759 qca->ibs_sent_wacks++; 760 break; 761 762 default: 763 /* Any other state is illegal */ 764 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 765 qca->rx_ibs_state); 766 break; 767 } 768 769 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 770 771 /* Actually send the packets */ 772 hci_uart_tx_wakeup(hu); 773 } 774 775 /* Called upon a sleep-indication from the device. 776 */ 777 static void device_want_to_sleep(struct hci_uart *hu) 778 { 779 unsigned long flags; 780 struct qca_data *qca = hu->priv; 781 782 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 783 784 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 785 786 qca->ibs_recv_slps++; 787 788 switch (qca->rx_ibs_state) { 789 case HCI_IBS_RX_AWAKE: 790 /* Update state */ 791 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 792 /* Vote off rx clock under workqueue */ 793 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 794 break; 795 796 case HCI_IBS_RX_ASLEEP: 797 break; 798 799 default: 800 /* Any other state is illegal */ 801 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 802 qca->rx_ibs_state); 803 break; 804 } 805 806 wake_up_interruptible(&qca->suspend_wait_q); 807 808 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 809 } 810 811 /* Called upon wake-up-acknowledgement from the device 812 */ 813 static void device_woke_up(struct hci_uart *hu) 814 { 815 unsigned long flags, idle_delay; 816 struct qca_data *qca = hu->priv; 817 struct sk_buff *skb = NULL; 818 819 BT_DBG("hu %p woke up", hu); 820 821 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 822 823 qca->ibs_recv_wacks++; 824 825 /* Don't react to the wake-up-acknowledgment when suspending. */ 826 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 827 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 828 return; 829 } 830 831 switch (qca->tx_ibs_state) { 832 case HCI_IBS_TX_AWAKE: 833 /* Expect one if we send 2 WAKEs */ 834 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 835 qca->tx_ibs_state); 836 break; 837 838 case HCI_IBS_TX_WAKING: 839 /* Send pending packets */ 840 while ((skb = skb_dequeue(&qca->tx_wait_q))) 841 skb_queue_tail(&qca->txq, skb); 842 843 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 844 del_timer(&qca->wake_retrans_timer); 845 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 846 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 847 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 848 break; 849 850 case HCI_IBS_TX_ASLEEP: 851 default: 852 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 853 qca->tx_ibs_state); 854 break; 855 } 856 857 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 858 859 /* Actually send the packets */ 860 hci_uart_tx_wakeup(hu); 861 } 862 863 /* Enqueue frame for transmittion (padding, crc, etc) may be called from 864 * two simultaneous tasklets. 865 */ 866 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 867 { 868 unsigned long flags = 0, idle_delay; 869 struct qca_data *qca = hu->priv; 870 871 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 872 qca->tx_ibs_state); 873 874 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 875 /* As SSR is in progress, ignore the packets */ 876 bt_dev_dbg(hu->hdev, "SSR is in progress"); 877 kfree_skb(skb); 878 return 0; 879 } 880 881 /* Prepend skb with frame type */ 882 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 883 884 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 885 886 /* Don't go to sleep in middle of patch download or 887 * Out-Of-Band(GPIOs control) sleep is selected. 888 * Don't wake the device up when suspending. 889 */ 890 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 891 test_bit(QCA_SUSPENDING, &qca->flags)) { 892 skb_queue_tail(&qca->txq, skb); 893 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 894 return 0; 895 } 896 897 /* Act according to current state */ 898 switch (qca->tx_ibs_state) { 899 case HCI_IBS_TX_AWAKE: 900 BT_DBG("Device awake, sending normally"); 901 skb_queue_tail(&qca->txq, skb); 902 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 903 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 904 break; 905 906 case HCI_IBS_TX_ASLEEP: 907 BT_DBG("Device asleep, waking up and queueing packet"); 908 /* Save packet for later */ 909 skb_queue_tail(&qca->tx_wait_q, skb); 910 911 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 912 /* Schedule a work queue to wake up device */ 913 queue_work(qca->workqueue, &qca->ws_awake_device); 914 break; 915 916 case HCI_IBS_TX_WAKING: 917 BT_DBG("Device waking up, queueing packet"); 918 /* Transient state; just keep packet for later */ 919 skb_queue_tail(&qca->tx_wait_q, skb); 920 break; 921 922 default: 923 BT_ERR("Illegal tx state: %d (losing packet)", 924 qca->tx_ibs_state); 925 dev_kfree_skb_irq(skb); 926 break; 927 } 928 929 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 930 931 return 0; 932 } 933 934 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 935 { 936 struct hci_uart *hu = hci_get_drvdata(hdev); 937 938 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 939 940 device_want_to_sleep(hu); 941 942 kfree_skb(skb); 943 return 0; 944 } 945 946 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 947 { 948 struct hci_uart *hu = hci_get_drvdata(hdev); 949 950 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 951 952 device_want_to_wakeup(hu); 953 954 kfree_skb(skb); 955 return 0; 956 } 957 958 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 959 { 960 struct hci_uart *hu = hci_get_drvdata(hdev); 961 962 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 963 964 device_woke_up(hu); 965 966 kfree_skb(skb); 967 return 0; 968 } 969 970 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 971 { 972 /* We receive debug logs from chip as an ACL packets. 973 * Instead of sending the data to ACL to decode the 974 * received data, we are pushing them to the above layers 975 * as a diagnostic packet. 976 */ 977 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 978 return hci_recv_diag(hdev, skb); 979 980 return hci_recv_frame(hdev, skb); 981 } 982 983 static void qca_controller_memdump(struct work_struct *work) 984 { 985 struct qca_data *qca = container_of(work, struct qca_data, 986 ctrl_memdump_evt); 987 struct hci_uart *hu = qca->hu; 988 struct sk_buff *skb; 989 struct qca_memdump_event_hdr *cmd_hdr; 990 struct qca_memdump_data *qca_memdump = qca->qca_memdump; 991 struct qca_dump_size *dump; 992 char *memdump_buf; 993 char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 }; 994 u16 seq_no; 995 u32 dump_size; 996 u32 rx_size; 997 enum qca_btsoc_type soc_type = qca_soc_type(hu); 998 999 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1000 1001 mutex_lock(&qca->hci_memdump_lock); 1002 /* Skip processing the received packets if timeout detected 1003 * or memdump collection completed. 1004 */ 1005 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1006 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1007 mutex_unlock(&qca->hci_memdump_lock); 1008 return; 1009 } 1010 1011 if (!qca_memdump) { 1012 qca_memdump = kzalloc(sizeof(struct qca_memdump_data), 1013 GFP_ATOMIC); 1014 if (!qca_memdump) { 1015 mutex_unlock(&qca->hci_memdump_lock); 1016 return; 1017 } 1018 1019 qca->qca_memdump = qca_memdump; 1020 } 1021 1022 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1023 cmd_hdr = (void *) skb->data; 1024 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1025 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1026 1027 if (!seq_no) { 1028 1029 /* This is the first frame of memdump packet from 1030 * the controller, Disable IBS to recevie dump 1031 * with out any interruption, ideally time required for 1032 * the controller to send the dump is 8 seconds. let us 1033 * start timer to handle this asynchronous activity. 1034 */ 1035 set_bit(QCA_IBS_DISABLED, &qca->flags); 1036 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1037 dump = (void *) skb->data; 1038 dump_size = __le32_to_cpu(dump->dump_size); 1039 if (!(dump_size)) { 1040 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1041 kfree(qca_memdump); 1042 kfree_skb(skb); 1043 qca->qca_memdump = NULL; 1044 mutex_unlock(&qca->hci_memdump_lock); 1045 return; 1046 } 1047 1048 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1049 dump_size); 1050 queue_delayed_work(qca->workqueue, 1051 &qca->ctrl_memdump_timeout, 1052 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS) 1053 ); 1054 1055 skb_pull(skb, sizeof(dump_size)); 1056 memdump_buf = vmalloc(dump_size); 1057 qca_memdump->ram_dump_size = dump_size; 1058 qca_memdump->memdump_buf_head = memdump_buf; 1059 qca_memdump->memdump_buf_tail = memdump_buf; 1060 } 1061 1062 memdump_buf = qca_memdump->memdump_buf_tail; 1063 1064 /* If sequence no 0 is missed then there is no point in 1065 * accepting the other sequences. 1066 */ 1067 if (!memdump_buf) { 1068 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1069 kfree(qca_memdump); 1070 kfree_skb(skb); 1071 qca->qca_memdump = NULL; 1072 mutex_unlock(&qca->hci_memdump_lock); 1073 return; 1074 } 1075 1076 /* There could be chance of missing some packets from 1077 * the controller. In such cases let us store the dummy 1078 * packets in the buffer. 1079 */ 1080 /* For QCA6390, controller does not lost packets but 1081 * sequence number field of packet sometimes has error 1082 * bits, so skip this checking for missing packet. 1083 */ 1084 while ((seq_no > qca_memdump->current_seq_no + 1) && 1085 (soc_type != QCA_QCA6390) && 1086 seq_no != QCA_LAST_SEQUENCE_NUM) { 1087 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1088 qca_memdump->current_seq_no); 1089 rx_size = qca_memdump->received_dump; 1090 rx_size += QCA_DUMP_PACKET_SIZE; 1091 if (rx_size > qca_memdump->ram_dump_size) { 1092 bt_dev_err(hu->hdev, 1093 "QCA memdump received %d, no space for missed packet", 1094 qca_memdump->received_dump); 1095 break; 1096 } 1097 memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE); 1098 memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE; 1099 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1100 qca_memdump->current_seq_no++; 1101 } 1102 1103 rx_size = qca_memdump->received_dump + skb->len; 1104 if (rx_size <= qca_memdump->ram_dump_size) { 1105 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1106 (seq_no != qca_memdump->current_seq_no)) 1107 bt_dev_err(hu->hdev, 1108 "QCA memdump unexpected packet %d", 1109 seq_no); 1110 bt_dev_dbg(hu->hdev, 1111 "QCA memdump packet %d with length %d", 1112 seq_no, skb->len); 1113 memcpy(memdump_buf, (unsigned char *)skb->data, 1114 skb->len); 1115 memdump_buf = memdump_buf + skb->len; 1116 qca_memdump->memdump_buf_tail = memdump_buf; 1117 qca_memdump->current_seq_no = seq_no + 1; 1118 qca_memdump->received_dump += skb->len; 1119 } else { 1120 bt_dev_err(hu->hdev, 1121 "QCA memdump received %d, no space for packet %d", 1122 qca_memdump->received_dump, seq_no); 1123 } 1124 qca->qca_memdump = qca_memdump; 1125 kfree_skb(skb); 1126 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1127 bt_dev_info(hu->hdev, 1128 "QCA memdump Done, received %d, total %d", 1129 qca_memdump->received_dump, 1130 qca_memdump->ram_dump_size); 1131 memdump_buf = qca_memdump->memdump_buf_head; 1132 dev_coredumpv(&hu->serdev->dev, memdump_buf, 1133 qca_memdump->received_dump, GFP_KERNEL); 1134 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1135 kfree(qca->qca_memdump); 1136 qca->qca_memdump = NULL; 1137 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1138 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1139 } 1140 1141 mutex_unlock(&qca->hci_memdump_lock); 1142 } 1143 1144 } 1145 1146 static int qca_controller_memdump_event(struct hci_dev *hdev, 1147 struct sk_buff *skb) 1148 { 1149 struct hci_uart *hu = hci_get_drvdata(hdev); 1150 struct qca_data *qca = hu->priv; 1151 1152 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1153 skb_queue_tail(&qca->rx_memdump_q, skb); 1154 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1155 1156 return 0; 1157 } 1158 1159 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1160 { 1161 struct hci_uart *hu = hci_get_drvdata(hdev); 1162 struct qca_data *qca = hu->priv; 1163 1164 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1165 struct hci_event_hdr *hdr = (void *)skb->data; 1166 1167 /* For the WCN3990 the vendor command for a baudrate change 1168 * isn't sent as synchronous HCI command, because the 1169 * controller sends the corresponding vendor event with the 1170 * new baudrate. The event is received and properly decoded 1171 * after changing the baudrate of the host port. It needs to 1172 * be dropped, otherwise it can be misinterpreted as 1173 * response to a later firmware download command (also a 1174 * vendor command). 1175 */ 1176 1177 if (hdr->evt == HCI_EV_VENDOR) 1178 complete(&qca->drop_ev_comp); 1179 1180 kfree_skb(skb); 1181 1182 return 0; 1183 } 1184 /* We receive chip memory dump as an event packet, With a dedicated 1185 * handler followed by a hardware error event. When this event is 1186 * received we store dump into a file before closing hci. This 1187 * dump will help in triaging the issues. 1188 */ 1189 if ((skb->data[0] == HCI_VENDOR_PKT) && 1190 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1191 return qca_controller_memdump_event(hdev, skb); 1192 1193 return hci_recv_frame(hdev, skb); 1194 } 1195 1196 #define QCA_IBS_SLEEP_IND_EVENT \ 1197 .type = HCI_IBS_SLEEP_IND, \ 1198 .hlen = 0, \ 1199 .loff = 0, \ 1200 .lsize = 0, \ 1201 .maxlen = HCI_MAX_IBS_SIZE 1202 1203 #define QCA_IBS_WAKE_IND_EVENT \ 1204 .type = HCI_IBS_WAKE_IND, \ 1205 .hlen = 0, \ 1206 .loff = 0, \ 1207 .lsize = 0, \ 1208 .maxlen = HCI_MAX_IBS_SIZE 1209 1210 #define QCA_IBS_WAKE_ACK_EVENT \ 1211 .type = HCI_IBS_WAKE_ACK, \ 1212 .hlen = 0, \ 1213 .loff = 0, \ 1214 .lsize = 0, \ 1215 .maxlen = HCI_MAX_IBS_SIZE 1216 1217 static const struct h4_recv_pkt qca_recv_pkts[] = { 1218 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1219 { H4_RECV_SCO, .recv = hci_recv_frame }, 1220 { H4_RECV_EVENT, .recv = qca_recv_event }, 1221 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1222 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1223 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1224 }; 1225 1226 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1227 { 1228 struct qca_data *qca = hu->priv; 1229 1230 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1231 return -EUNATCH; 1232 1233 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1234 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1235 if (IS_ERR(qca->rx_skb)) { 1236 int err = PTR_ERR(qca->rx_skb); 1237 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1238 qca->rx_skb = NULL; 1239 return err; 1240 } 1241 1242 return count; 1243 } 1244 1245 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1246 { 1247 struct qca_data *qca = hu->priv; 1248 1249 return skb_dequeue(&qca->txq); 1250 } 1251 1252 static uint8_t qca_get_baudrate_value(int speed) 1253 { 1254 switch (speed) { 1255 case 9600: 1256 return QCA_BAUDRATE_9600; 1257 case 19200: 1258 return QCA_BAUDRATE_19200; 1259 case 38400: 1260 return QCA_BAUDRATE_38400; 1261 case 57600: 1262 return QCA_BAUDRATE_57600; 1263 case 115200: 1264 return QCA_BAUDRATE_115200; 1265 case 230400: 1266 return QCA_BAUDRATE_230400; 1267 case 460800: 1268 return QCA_BAUDRATE_460800; 1269 case 500000: 1270 return QCA_BAUDRATE_500000; 1271 case 921600: 1272 return QCA_BAUDRATE_921600; 1273 case 1000000: 1274 return QCA_BAUDRATE_1000000; 1275 case 2000000: 1276 return QCA_BAUDRATE_2000000; 1277 case 3000000: 1278 return QCA_BAUDRATE_3000000; 1279 case 3200000: 1280 return QCA_BAUDRATE_3200000; 1281 case 3500000: 1282 return QCA_BAUDRATE_3500000; 1283 default: 1284 return QCA_BAUDRATE_115200; 1285 } 1286 } 1287 1288 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1289 { 1290 struct hci_uart *hu = hci_get_drvdata(hdev); 1291 struct qca_data *qca = hu->priv; 1292 struct sk_buff *skb; 1293 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1294 1295 if (baudrate > QCA_BAUDRATE_3200000) 1296 return -EINVAL; 1297 1298 cmd[4] = baudrate; 1299 1300 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1301 if (!skb) { 1302 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1303 return -ENOMEM; 1304 } 1305 1306 /* Assign commands to change baudrate and packet type. */ 1307 skb_put_data(skb, cmd, sizeof(cmd)); 1308 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1309 1310 skb_queue_tail(&qca->txq, skb); 1311 hci_uart_tx_wakeup(hu); 1312 1313 /* Wait for the baudrate change request to be sent */ 1314 1315 while (!skb_queue_empty(&qca->txq)) 1316 usleep_range(100, 200); 1317 1318 if (hu->serdev) 1319 serdev_device_wait_until_sent(hu->serdev, 1320 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1321 1322 /* Give the controller time to process the request */ 1323 if (qca_is_wcn399x(qca_soc_type(hu)) || 1324 qca_is_wcn6750(qca_soc_type(hu)) || 1325 qca_is_wcn6855(qca_soc_type(hu))) 1326 usleep_range(1000, 10000); 1327 else 1328 msleep(300); 1329 1330 return 0; 1331 } 1332 1333 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1334 { 1335 if (hu->serdev) 1336 serdev_device_set_baudrate(hu->serdev, speed); 1337 else 1338 hci_uart_set_baudrate(hu, speed); 1339 } 1340 1341 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1342 { 1343 int ret; 1344 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1345 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1346 1347 /* These power pulses are single byte command which are sent 1348 * at required baudrate to wcn3990. On wcn3990, we have an external 1349 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1350 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1351 * and also we use the same power inputs to turn on and off for 1352 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1353 * we send a power on pulse at 115200 bps. This algorithm will help to 1354 * save power. Disabling hardware flow control is mandatory while 1355 * sending power pulses to SoC. 1356 */ 1357 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1358 1359 serdev_device_write_flush(hu->serdev); 1360 hci_uart_set_flow_control(hu, true); 1361 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1362 if (ret < 0) { 1363 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1364 return ret; 1365 } 1366 1367 serdev_device_wait_until_sent(hu->serdev, timeout); 1368 hci_uart_set_flow_control(hu, false); 1369 1370 /* Give to controller time to boot/shutdown */ 1371 if (on) 1372 msleep(100); 1373 else 1374 usleep_range(1000, 10000); 1375 1376 return 0; 1377 } 1378 1379 static unsigned int qca_get_speed(struct hci_uart *hu, 1380 enum qca_speed_type speed_type) 1381 { 1382 unsigned int speed = 0; 1383 1384 if (speed_type == QCA_INIT_SPEED) { 1385 if (hu->init_speed) 1386 speed = hu->init_speed; 1387 else if (hu->proto->init_speed) 1388 speed = hu->proto->init_speed; 1389 } else { 1390 if (hu->oper_speed) 1391 speed = hu->oper_speed; 1392 else if (hu->proto->oper_speed) 1393 speed = hu->proto->oper_speed; 1394 } 1395 1396 return speed; 1397 } 1398 1399 static int qca_check_speeds(struct hci_uart *hu) 1400 { 1401 if (qca_is_wcn399x(qca_soc_type(hu)) || 1402 qca_is_wcn6750(qca_soc_type(hu)) || 1403 qca_is_wcn6855(qca_soc_type(hu))) { 1404 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1405 !qca_get_speed(hu, QCA_OPER_SPEED)) 1406 return -EINVAL; 1407 } else { 1408 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1409 !qca_get_speed(hu, QCA_OPER_SPEED)) 1410 return -EINVAL; 1411 } 1412 1413 return 0; 1414 } 1415 1416 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1417 { 1418 unsigned int speed, qca_baudrate; 1419 struct qca_data *qca = hu->priv; 1420 int ret = 0; 1421 1422 if (speed_type == QCA_INIT_SPEED) { 1423 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1424 if (speed) 1425 host_set_baudrate(hu, speed); 1426 } else { 1427 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1428 1429 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1430 if (!speed) 1431 return 0; 1432 1433 /* Disable flow control for wcn3990 to deassert RTS while 1434 * changing the baudrate of chip and host. 1435 */ 1436 if (qca_is_wcn399x(soc_type) || 1437 qca_is_wcn6750(soc_type) || 1438 qca_is_wcn6855(soc_type)) 1439 hci_uart_set_flow_control(hu, true); 1440 1441 if (soc_type == QCA_WCN3990) { 1442 reinit_completion(&qca->drop_ev_comp); 1443 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1444 } 1445 1446 qca_baudrate = qca_get_baudrate_value(speed); 1447 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1448 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1449 if (ret) 1450 goto error; 1451 1452 host_set_baudrate(hu, speed); 1453 1454 error: 1455 if (qca_is_wcn399x(soc_type) || 1456 qca_is_wcn6750(soc_type) || 1457 qca_is_wcn6855(soc_type)) 1458 hci_uart_set_flow_control(hu, false); 1459 1460 if (soc_type == QCA_WCN3990) { 1461 /* Wait for the controller to send the vendor event 1462 * for the baudrate change command. 1463 */ 1464 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1465 msecs_to_jiffies(100))) { 1466 bt_dev_err(hu->hdev, 1467 "Failed to change controller baudrate\n"); 1468 ret = -ETIMEDOUT; 1469 } 1470 1471 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1472 } 1473 } 1474 1475 return ret; 1476 } 1477 1478 static int qca_send_crashbuffer(struct hci_uart *hu) 1479 { 1480 struct qca_data *qca = hu->priv; 1481 struct sk_buff *skb; 1482 1483 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1484 if (!skb) { 1485 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1486 return -ENOMEM; 1487 } 1488 1489 /* We forcefully crash the controller, by sending 0xfb byte for 1490 * 1024 times. We also might have chance of losing data, To be 1491 * on safer side we send 1096 bytes to the SoC. 1492 */ 1493 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1494 QCA_CRASHBYTE_PACKET_LEN); 1495 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1496 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1497 skb_queue_tail(&qca->txq, skb); 1498 hci_uart_tx_wakeup(hu); 1499 1500 return 0; 1501 } 1502 1503 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1504 { 1505 struct hci_uart *hu = hci_get_drvdata(hdev); 1506 struct qca_data *qca = hu->priv; 1507 1508 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1509 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1510 1511 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1512 } 1513 1514 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1515 { 1516 struct hci_uart *hu = hci_get_drvdata(hdev); 1517 struct qca_data *qca = hu->priv; 1518 1519 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1520 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1521 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1522 1523 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1524 /* If hardware error event received for other than QCA 1525 * soc memory dump event, then we need to crash the SOC 1526 * and wait here for 8 seconds to get the dump packets. 1527 * This will block main thread to be on hold until we 1528 * collect dump. 1529 */ 1530 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1531 qca_send_crashbuffer(hu); 1532 qca_wait_for_dump_collection(hdev); 1533 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1534 /* Let us wait here until memory dump collected or 1535 * memory dump timer expired. 1536 */ 1537 bt_dev_info(hdev, "waiting for dump to complete"); 1538 qca_wait_for_dump_collection(hdev); 1539 } 1540 1541 mutex_lock(&qca->hci_memdump_lock); 1542 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1543 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1544 if (qca->qca_memdump) { 1545 vfree(qca->qca_memdump->memdump_buf_head); 1546 kfree(qca->qca_memdump); 1547 qca->qca_memdump = NULL; 1548 } 1549 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1550 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1551 } 1552 mutex_unlock(&qca->hci_memdump_lock); 1553 1554 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1555 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1556 cancel_work_sync(&qca->ctrl_memdump_evt); 1557 skb_queue_purge(&qca->rx_memdump_q); 1558 } 1559 1560 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1561 } 1562 1563 static void qca_cmd_timeout(struct hci_dev *hdev) 1564 { 1565 struct hci_uart *hu = hci_get_drvdata(hdev); 1566 struct qca_data *qca = hu->priv; 1567 1568 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1569 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1570 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1571 qca_send_crashbuffer(hu); 1572 qca_wait_for_dump_collection(hdev); 1573 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1574 /* Let us wait here until memory dump collected or 1575 * memory dump timer expired. 1576 */ 1577 bt_dev_info(hdev, "waiting for dump to complete"); 1578 qca_wait_for_dump_collection(hdev); 1579 } 1580 1581 mutex_lock(&qca->hci_memdump_lock); 1582 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1583 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1584 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1585 /* Inject hw error event to reset the device 1586 * and driver. 1587 */ 1588 hci_reset_dev(hu->hdev); 1589 } 1590 } 1591 mutex_unlock(&qca->hci_memdump_lock); 1592 } 1593 1594 static bool qca_wakeup(struct hci_dev *hdev) 1595 { 1596 struct hci_uart *hu = hci_get_drvdata(hdev); 1597 bool wakeup; 1598 1599 /* BT SoC attached through the serial bus is handled by the serdev driver. 1600 * So we need to use the device handle of the serdev driver to get the 1601 * status of device may wakeup. 1602 */ 1603 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1604 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1605 1606 return wakeup; 1607 } 1608 1609 static int qca_regulator_init(struct hci_uart *hu) 1610 { 1611 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1612 struct qca_serdev *qcadev; 1613 int ret; 1614 bool sw_ctrl_state; 1615 1616 /* Check for vregs status, may be hci down has turned 1617 * off the voltage regulator. 1618 */ 1619 qcadev = serdev_device_get_drvdata(hu->serdev); 1620 if (!qcadev->bt_power->vregs_on) { 1621 serdev_device_close(hu->serdev); 1622 ret = qca_regulator_enable(qcadev); 1623 if (ret) 1624 return ret; 1625 1626 ret = serdev_device_open(hu->serdev); 1627 if (ret) { 1628 bt_dev_err(hu->hdev, "failed to open port"); 1629 return ret; 1630 } 1631 } 1632 1633 if (qca_is_wcn399x(soc_type)) { 1634 /* Forcefully enable wcn399x to enter in to boot mode. */ 1635 host_set_baudrate(hu, 2400); 1636 ret = qca_send_power_pulse(hu, false); 1637 if (ret) 1638 return ret; 1639 } 1640 1641 /* For wcn6750 need to enable gpio bt_en */ 1642 if (qcadev->bt_en) { 1643 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1644 msleep(50); 1645 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1646 msleep(50); 1647 if (qcadev->sw_ctrl) { 1648 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1649 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1650 } 1651 } 1652 1653 qca_set_speed(hu, QCA_INIT_SPEED); 1654 1655 if (qca_is_wcn399x(soc_type)) { 1656 ret = qca_send_power_pulse(hu, true); 1657 if (ret) 1658 return ret; 1659 } 1660 1661 /* Now the device is in ready state to communicate with host. 1662 * To sync host with device we need to reopen port. 1663 * Without this, we will have RTS and CTS synchronization 1664 * issues. 1665 */ 1666 serdev_device_close(hu->serdev); 1667 ret = serdev_device_open(hu->serdev); 1668 if (ret) { 1669 bt_dev_err(hu->hdev, "failed to open port"); 1670 return ret; 1671 } 1672 1673 hci_uart_set_flow_control(hu, false); 1674 1675 return 0; 1676 } 1677 1678 static int qca_power_on(struct hci_dev *hdev) 1679 { 1680 struct hci_uart *hu = hci_get_drvdata(hdev); 1681 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1682 struct qca_serdev *qcadev; 1683 struct qca_data *qca = hu->priv; 1684 int ret = 0; 1685 1686 /* Non-serdev device usually is powered by external power 1687 * and don't need additional action in driver for power on 1688 */ 1689 if (!hu->serdev) 1690 return 0; 1691 1692 if (qca_is_wcn399x(soc_type) || 1693 qca_is_wcn6750(soc_type) || 1694 qca_is_wcn6855(soc_type)) { 1695 ret = qca_regulator_init(hu); 1696 } else { 1697 qcadev = serdev_device_get_drvdata(hu->serdev); 1698 if (qcadev->bt_en) { 1699 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1700 /* Controller needs time to bootup. */ 1701 msleep(150); 1702 } 1703 } 1704 1705 clear_bit(QCA_BT_OFF, &qca->flags); 1706 return ret; 1707 } 1708 1709 static int qca_setup(struct hci_uart *hu) 1710 { 1711 struct hci_dev *hdev = hu->hdev; 1712 struct qca_data *qca = hu->priv; 1713 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1714 unsigned int retries = 0; 1715 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1716 const char *firmware_name = qca_get_firmware_name(hu); 1717 int ret; 1718 struct qca_btsoc_version ver; 1719 1720 ret = qca_check_speeds(hu); 1721 if (ret) 1722 return ret; 1723 1724 clear_bit(QCA_ROM_FW, &qca->flags); 1725 /* Patch downloading has to be done without IBS mode */ 1726 set_bit(QCA_IBS_DISABLED, &qca->flags); 1727 1728 /* Enable controller to do both LE scan and BR/EDR inquiry 1729 * simultaneously. 1730 */ 1731 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1732 1733 bt_dev_info(hdev, "setting up %s", 1734 qca_is_wcn399x(soc_type) ? "wcn399x" : 1735 (soc_type == QCA_WCN6750) ? "wcn6750" : 1736 (soc_type == QCA_WCN6855) ? "wcn6855" : "ROME/QCA6390"); 1737 1738 qca->memdump_state = QCA_MEMDUMP_IDLE; 1739 1740 retry: 1741 ret = qca_power_on(hdev); 1742 if (ret) 1743 goto out; 1744 1745 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1746 1747 if (qca_is_wcn399x(soc_type) || 1748 qca_is_wcn6750(soc_type) || 1749 qca_is_wcn6855(soc_type)) { 1750 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); 1751 hci_set_aosp_capable(hdev); 1752 1753 ret = qca_read_soc_version(hdev, &ver, soc_type); 1754 if (ret) 1755 goto out; 1756 } else { 1757 qca_set_speed(hu, QCA_INIT_SPEED); 1758 } 1759 1760 /* Setup user speed if needed */ 1761 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1762 if (speed) { 1763 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1764 if (ret) 1765 goto out; 1766 1767 qca_baudrate = qca_get_baudrate_value(speed); 1768 } 1769 1770 if (!(qca_is_wcn399x(soc_type) || 1771 qca_is_wcn6750(soc_type) || 1772 qca_is_wcn6855(soc_type))) { 1773 /* Get QCA version information */ 1774 ret = qca_read_soc_version(hdev, &ver, soc_type); 1775 if (ret) 1776 goto out; 1777 } 1778 1779 /* Setup patch / NVM configurations */ 1780 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 1781 firmware_name); 1782 if (!ret) { 1783 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1784 qca_debugfs_init(hdev); 1785 hu->hdev->hw_error = qca_hw_error; 1786 hu->hdev->cmd_timeout = qca_cmd_timeout; 1787 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 1788 hu->hdev->wakeup = qca_wakeup; 1789 } else if (ret == -ENOENT) { 1790 /* No patch/nvm-config found, run with original fw/config */ 1791 set_bit(QCA_ROM_FW, &qca->flags); 1792 ret = 0; 1793 } else if (ret == -EAGAIN) { 1794 /* 1795 * Userspace firmware loader will return -EAGAIN in case no 1796 * patch/nvm-config is found, so run with original fw/config. 1797 */ 1798 set_bit(QCA_ROM_FW, &qca->flags); 1799 ret = 0; 1800 } 1801 1802 out: 1803 if (ret && retries < MAX_INIT_RETRIES) { 1804 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 1805 qca_power_shutdown(hu); 1806 if (hu->serdev) { 1807 serdev_device_close(hu->serdev); 1808 ret = serdev_device_open(hu->serdev); 1809 if (ret) { 1810 bt_dev_err(hdev, "failed to open port"); 1811 return ret; 1812 } 1813 } 1814 retries++; 1815 goto retry; 1816 } 1817 1818 /* Setup bdaddr */ 1819 if (soc_type == QCA_ROME) 1820 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 1821 else 1822 hu->hdev->set_bdaddr = qca_set_bdaddr; 1823 1824 return ret; 1825 } 1826 1827 static const struct hci_uart_proto qca_proto = { 1828 .id = HCI_UART_QCA, 1829 .name = "QCA", 1830 .manufacturer = 29, 1831 .init_speed = 115200, 1832 .oper_speed = 3000000, 1833 .open = qca_open, 1834 .close = qca_close, 1835 .flush = qca_flush, 1836 .setup = qca_setup, 1837 .recv = qca_recv, 1838 .enqueue = qca_enqueue, 1839 .dequeue = qca_dequeue, 1840 }; 1841 1842 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 1843 .soc_type = QCA_WCN3990, 1844 .vregs = (struct qca_vreg []) { 1845 { "vddio", 15000 }, 1846 { "vddxo", 80000 }, 1847 { "vddrf", 300000 }, 1848 { "vddch0", 450000 }, 1849 }, 1850 .num_vregs = 4, 1851 }; 1852 1853 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 1854 .soc_type = QCA_WCN3991, 1855 .vregs = (struct qca_vreg []) { 1856 { "vddio", 15000 }, 1857 { "vddxo", 80000 }, 1858 { "vddrf", 300000 }, 1859 { "vddch0", 450000 }, 1860 }, 1861 .num_vregs = 4, 1862 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 1863 }; 1864 1865 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 1866 .soc_type = QCA_WCN3998, 1867 .vregs = (struct qca_vreg []) { 1868 { "vddio", 10000 }, 1869 { "vddxo", 80000 }, 1870 { "vddrf", 300000 }, 1871 { "vddch0", 450000 }, 1872 }, 1873 .num_vregs = 4, 1874 }; 1875 1876 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 1877 .soc_type = QCA_QCA6390, 1878 .num_vregs = 0, 1879 }; 1880 1881 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 1882 .soc_type = QCA_WCN6750, 1883 .vregs = (struct qca_vreg []) { 1884 { "vddio", 5000 }, 1885 { "vddaon", 26000 }, 1886 { "vddbtcxmx", 126000 }, 1887 { "vddrfacmn", 12500 }, 1888 { "vddrfa0p8", 102000 }, 1889 { "vddrfa1p7", 302000 }, 1890 { "vddrfa1p2", 257000 }, 1891 { "vddrfa2p2", 1700000 }, 1892 { "vddasd", 200 }, 1893 }, 1894 .num_vregs = 9, 1895 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 1896 }; 1897 1898 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 1899 .soc_type = QCA_WCN6855, 1900 .vregs = (struct qca_vreg []) { 1901 { "vddio", 5000 }, 1902 { "vddbtcxmx", 126000 }, 1903 { "vddrfacmn", 12500 }, 1904 { "vddrfa0p8", 102000 }, 1905 { "vddrfa1p7", 302000 }, 1906 { "vddrfa1p2", 257000 }, 1907 }, 1908 .num_vregs = 6, 1909 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 1910 }; 1911 1912 static void qca_power_shutdown(struct hci_uart *hu) 1913 { 1914 struct qca_serdev *qcadev; 1915 struct qca_data *qca = hu->priv; 1916 unsigned long flags; 1917 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1918 bool sw_ctrl_state; 1919 1920 /* From this point we go into power off state. But serial port is 1921 * still open, stop queueing the IBS data and flush all the buffered 1922 * data in skb's. 1923 */ 1924 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 1925 set_bit(QCA_IBS_DISABLED, &qca->flags); 1926 qca_flush(hu); 1927 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 1928 1929 /* Non-serdev device usually is powered by external power 1930 * and don't need additional action in driver for power down 1931 */ 1932 if (!hu->serdev) 1933 return; 1934 1935 qcadev = serdev_device_get_drvdata(hu->serdev); 1936 1937 if (qca_is_wcn399x(soc_type)) { 1938 host_set_baudrate(hu, 2400); 1939 qca_send_power_pulse(hu, false); 1940 qca_regulator_disable(qcadev); 1941 } else if (soc_type == QCA_WCN6750 || soc_type == QCA_WCN6855) { 1942 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1943 msleep(100); 1944 qca_regulator_disable(qcadev); 1945 if (qcadev->sw_ctrl) { 1946 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1947 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1948 } 1949 } else if (qcadev->bt_en) { 1950 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1951 } 1952 1953 set_bit(QCA_BT_OFF, &qca->flags); 1954 } 1955 1956 static int qca_power_off(struct hci_dev *hdev) 1957 { 1958 struct hci_uart *hu = hci_get_drvdata(hdev); 1959 struct qca_data *qca = hu->priv; 1960 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1961 1962 hu->hdev->hw_error = NULL; 1963 hu->hdev->cmd_timeout = NULL; 1964 1965 del_timer_sync(&qca->wake_retrans_timer); 1966 del_timer_sync(&qca->tx_idle_timer); 1967 1968 /* Stop sending shutdown command if soc crashes. */ 1969 if (soc_type != QCA_ROME 1970 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 1971 qca_send_pre_shutdown_cmd(hdev); 1972 usleep_range(8000, 10000); 1973 } 1974 1975 qca_power_shutdown(hu); 1976 return 0; 1977 } 1978 1979 static int qca_regulator_enable(struct qca_serdev *qcadev) 1980 { 1981 struct qca_power *power = qcadev->bt_power; 1982 int ret; 1983 1984 /* Already enabled */ 1985 if (power->vregs_on) 1986 return 0; 1987 1988 BT_DBG("enabling %d regulators)", power->num_vregs); 1989 1990 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 1991 if (ret) 1992 return ret; 1993 1994 power->vregs_on = true; 1995 1996 ret = clk_prepare_enable(qcadev->susclk); 1997 if (ret) 1998 qca_regulator_disable(qcadev); 1999 2000 return ret; 2001 } 2002 2003 static void qca_regulator_disable(struct qca_serdev *qcadev) 2004 { 2005 struct qca_power *power; 2006 2007 if (!qcadev) 2008 return; 2009 2010 power = qcadev->bt_power; 2011 2012 /* Already disabled? */ 2013 if (!power->vregs_on) 2014 return; 2015 2016 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2017 power->vregs_on = false; 2018 2019 clk_disable_unprepare(qcadev->susclk); 2020 } 2021 2022 static int qca_init_regulators(struct qca_power *qca, 2023 const struct qca_vreg *vregs, size_t num_vregs) 2024 { 2025 struct regulator_bulk_data *bulk; 2026 int ret; 2027 int i; 2028 2029 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2030 if (!bulk) 2031 return -ENOMEM; 2032 2033 for (i = 0; i < num_vregs; i++) 2034 bulk[i].supply = vregs[i].name; 2035 2036 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2037 if (ret < 0) 2038 return ret; 2039 2040 for (i = 0; i < num_vregs; i++) { 2041 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2042 if (ret) 2043 return ret; 2044 } 2045 2046 qca->vreg_bulk = bulk; 2047 qca->num_vregs = num_vregs; 2048 2049 return 0; 2050 } 2051 2052 static int qca_serdev_probe(struct serdev_device *serdev) 2053 { 2054 struct qca_serdev *qcadev; 2055 struct hci_dev *hdev; 2056 const struct qca_device_data *data; 2057 int err; 2058 bool power_ctrl_enabled = true; 2059 2060 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2061 if (!qcadev) 2062 return -ENOMEM; 2063 2064 qcadev->serdev_hu.serdev = serdev; 2065 data = device_get_match_data(&serdev->dev); 2066 serdev_device_set_drvdata(serdev, qcadev); 2067 device_property_read_string(&serdev->dev, "firmware-name", 2068 &qcadev->firmware_name); 2069 device_property_read_u32(&serdev->dev, "max-speed", 2070 &qcadev->oper_speed); 2071 if (!qcadev->oper_speed) 2072 BT_DBG("UART will pick default operating speed"); 2073 2074 if (data && 2075 (qca_is_wcn399x(data->soc_type) || 2076 qca_is_wcn6750(data->soc_type) || 2077 qca_is_wcn6855(data->soc_type))) { 2078 qcadev->btsoc_type = data->soc_type; 2079 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2080 sizeof(struct qca_power), 2081 GFP_KERNEL); 2082 if (!qcadev->bt_power) 2083 return -ENOMEM; 2084 2085 qcadev->bt_power->dev = &serdev->dev; 2086 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2087 data->num_vregs); 2088 if (err) { 2089 BT_ERR("Failed to init regulators:%d", err); 2090 return err; 2091 } 2092 2093 qcadev->bt_power->vregs_on = false; 2094 2095 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2096 GPIOD_OUT_LOW); 2097 if (IS_ERR_OR_NULL(qcadev->bt_en) && 2098 (data->soc_type == QCA_WCN6750 || 2099 data->soc_type == QCA_WCN6855)) { 2100 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); 2101 power_ctrl_enabled = false; 2102 } 2103 2104 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2105 GPIOD_IN); 2106 if (IS_ERR_OR_NULL(qcadev->sw_ctrl) && 2107 (data->soc_type == QCA_WCN6750 || 2108 data->soc_type == QCA_WCN6855)) 2109 dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2110 2111 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2112 if (IS_ERR(qcadev->susclk)) { 2113 dev_err(&serdev->dev, "failed to acquire clk\n"); 2114 return PTR_ERR(qcadev->susclk); 2115 } 2116 2117 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2118 if (err) { 2119 BT_ERR("wcn3990 serdev registration failed"); 2120 return err; 2121 } 2122 } else { 2123 if (data) 2124 qcadev->btsoc_type = data->soc_type; 2125 else 2126 qcadev->btsoc_type = QCA_ROME; 2127 2128 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2129 GPIOD_OUT_LOW); 2130 if (IS_ERR_OR_NULL(qcadev->bt_en)) { 2131 dev_warn(&serdev->dev, "failed to acquire enable gpio\n"); 2132 power_ctrl_enabled = false; 2133 } 2134 2135 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2136 if (IS_ERR(qcadev->susclk)) { 2137 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2138 return PTR_ERR(qcadev->susclk); 2139 } 2140 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); 2141 if (err) 2142 return err; 2143 2144 err = clk_prepare_enable(qcadev->susclk); 2145 if (err) 2146 return err; 2147 2148 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2149 if (err) { 2150 BT_ERR("Rome serdev registration failed"); 2151 clk_disable_unprepare(qcadev->susclk); 2152 return err; 2153 } 2154 } 2155 2156 hdev = qcadev->serdev_hu.hdev; 2157 2158 if (power_ctrl_enabled) { 2159 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 2160 hdev->shutdown = qca_power_off; 2161 } 2162 2163 if (data) { 2164 /* Wideband speech support must be set per driver since it can't 2165 * be queried via hci. Same with the valid le states quirk. 2166 */ 2167 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2168 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, 2169 &hdev->quirks); 2170 2171 if (data->capabilities & QCA_CAP_VALID_LE_STATES) 2172 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); 2173 } 2174 2175 return 0; 2176 } 2177 2178 static void qca_serdev_remove(struct serdev_device *serdev) 2179 { 2180 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2181 struct qca_power *power = qcadev->bt_power; 2182 2183 if ((qca_is_wcn399x(qcadev->btsoc_type) || 2184 qca_is_wcn6750(qcadev->btsoc_type) || 2185 qca_is_wcn6855(qcadev->btsoc_type)) && 2186 power->vregs_on) 2187 qca_power_shutdown(&qcadev->serdev_hu); 2188 else if (qcadev->susclk) 2189 clk_disable_unprepare(qcadev->susclk); 2190 2191 hci_uart_unregister_device(&qcadev->serdev_hu); 2192 } 2193 2194 static void qca_serdev_shutdown(struct device *dev) 2195 { 2196 int ret; 2197 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2198 struct serdev_device *serdev = to_serdev_device(dev); 2199 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2200 struct hci_uart *hu = &qcadev->serdev_hu; 2201 struct hci_dev *hdev = hu->hdev; 2202 struct qca_data *qca = hu->priv; 2203 const u8 ibs_wake_cmd[] = { 0xFD }; 2204 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2205 2206 if (qcadev->btsoc_type == QCA_QCA6390) { 2207 if (test_bit(QCA_BT_OFF, &qca->flags) || 2208 !test_bit(HCI_RUNNING, &hdev->flags)) 2209 return; 2210 2211 serdev_device_write_flush(serdev); 2212 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2213 sizeof(ibs_wake_cmd)); 2214 if (ret < 0) { 2215 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2216 return; 2217 } 2218 serdev_device_wait_until_sent(serdev, timeout); 2219 usleep_range(8000, 10000); 2220 2221 serdev_device_write_flush(serdev); 2222 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2223 sizeof(edl_reset_soc_cmd)); 2224 if (ret < 0) { 2225 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2226 return; 2227 } 2228 serdev_device_wait_until_sent(serdev, timeout); 2229 usleep_range(8000, 10000); 2230 } 2231 } 2232 2233 static int __maybe_unused qca_suspend(struct device *dev) 2234 { 2235 struct serdev_device *serdev = to_serdev_device(dev); 2236 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2237 struct hci_uart *hu = &qcadev->serdev_hu; 2238 struct qca_data *qca = hu->priv; 2239 unsigned long flags; 2240 bool tx_pending = false; 2241 int ret = 0; 2242 u8 cmd; 2243 u32 wait_timeout = 0; 2244 2245 set_bit(QCA_SUSPENDING, &qca->flags); 2246 2247 /* if BT SoC is running with default firmware then it does not 2248 * support in-band sleep 2249 */ 2250 if (test_bit(QCA_ROM_FW, &qca->flags)) 2251 return 0; 2252 2253 /* During SSR after memory dump collection, controller will be 2254 * powered off and then powered on.If controller is powered off 2255 * during SSR then we should wait until SSR is completed. 2256 */ 2257 if (test_bit(QCA_BT_OFF, &qca->flags) && 2258 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2259 return 0; 2260 2261 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2262 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2263 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2264 IBS_DISABLE_SSR_TIMEOUT_MS : 2265 FW_DOWNLOAD_TIMEOUT_MS; 2266 2267 /* QCA_IBS_DISABLED flag is set to true, During FW download 2268 * and during memory dump collection. It is reset to false, 2269 * After FW download complete. 2270 */ 2271 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2272 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2273 2274 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2275 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2276 ret = -ETIMEDOUT; 2277 goto error; 2278 } 2279 } 2280 2281 cancel_work_sync(&qca->ws_awake_device); 2282 cancel_work_sync(&qca->ws_awake_rx); 2283 2284 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2285 flags, SINGLE_DEPTH_NESTING); 2286 2287 switch (qca->tx_ibs_state) { 2288 case HCI_IBS_TX_WAKING: 2289 del_timer(&qca->wake_retrans_timer); 2290 fallthrough; 2291 case HCI_IBS_TX_AWAKE: 2292 del_timer(&qca->tx_idle_timer); 2293 2294 serdev_device_write_flush(hu->serdev); 2295 cmd = HCI_IBS_SLEEP_IND; 2296 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2297 2298 if (ret < 0) { 2299 BT_ERR("Failed to send SLEEP to device"); 2300 break; 2301 } 2302 2303 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2304 qca->ibs_sent_slps++; 2305 tx_pending = true; 2306 break; 2307 2308 case HCI_IBS_TX_ASLEEP: 2309 break; 2310 2311 default: 2312 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2313 ret = -EINVAL; 2314 break; 2315 } 2316 2317 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2318 2319 if (ret < 0) 2320 goto error; 2321 2322 if (tx_pending) { 2323 serdev_device_wait_until_sent(hu->serdev, 2324 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2325 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2326 } 2327 2328 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2329 * to sleep, so that the packet does not wake the system later. 2330 */ 2331 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2332 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2333 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2334 if (ret == 0) { 2335 ret = -ETIMEDOUT; 2336 goto error; 2337 } 2338 2339 return 0; 2340 2341 error: 2342 clear_bit(QCA_SUSPENDING, &qca->flags); 2343 2344 return ret; 2345 } 2346 2347 static int __maybe_unused qca_resume(struct device *dev) 2348 { 2349 struct serdev_device *serdev = to_serdev_device(dev); 2350 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2351 struct hci_uart *hu = &qcadev->serdev_hu; 2352 struct qca_data *qca = hu->priv; 2353 2354 clear_bit(QCA_SUSPENDING, &qca->flags); 2355 2356 return 0; 2357 } 2358 2359 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2360 2361 #ifdef CONFIG_OF 2362 static const struct of_device_id qca_bluetooth_of_match[] = { 2363 { .compatible = "qcom,qca6174-bt" }, 2364 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2365 { .compatible = "qcom,qca9377-bt" }, 2366 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2367 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2368 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2369 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2370 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2371 { /* sentinel */ } 2372 }; 2373 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2374 #endif 2375 2376 #ifdef CONFIG_ACPI 2377 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2378 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2379 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2380 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2381 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2382 { }, 2383 }; 2384 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2385 #endif 2386 2387 2388 static struct serdev_device_driver qca_serdev_driver = { 2389 .probe = qca_serdev_probe, 2390 .remove = qca_serdev_remove, 2391 .driver = { 2392 .name = "hci_uart_qca", 2393 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2394 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2395 .shutdown = qca_serdev_shutdown, 2396 .pm = &qca_pm_ops, 2397 }, 2398 }; 2399 2400 int __init qca_init(void) 2401 { 2402 serdev_device_driver_register(&qca_serdev_driver); 2403 2404 return hci_uart_register_proto(&qca_proto); 2405 } 2406 2407 int __exit qca_deinit(void) 2408 { 2409 serdev_device_driver_unregister(&qca_serdev_driver); 2410 2411 return hci_uart_unregister_proto(&qca_proto); 2412 } 2413