1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of_device.h> 29 #include <linux/platform_device.h> 30 #include <linux/regulator/consumer.h> 31 #include <linux/serdev.h> 32 #include <linux/mutex.h> 33 #include <asm/unaligned.h> 34 35 #include <net/bluetooth/bluetooth.h> 36 #include <net/bluetooth/hci_core.h> 37 38 #include "hci_uart.h" 39 #include "btqca.h" 40 41 /* HCI_IBS protocol messages */ 42 #define HCI_IBS_SLEEP_IND 0xFE 43 #define HCI_IBS_WAKE_IND 0xFD 44 #define HCI_IBS_WAKE_ACK 0xFC 45 #define HCI_MAX_IBS_SIZE 10 46 47 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 48 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 40 49 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 50 #define CMD_TRANS_TIMEOUT_MS 100 51 #define MEMDUMP_TIMEOUT_MS 8000 52 53 /* susclk rate */ 54 #define SUSCLK_RATE_32KHZ 32768 55 56 /* Controller debug log header */ 57 #define QCA_DEBUG_HANDLE 0x2EDC 58 59 /* max retry count when init fails */ 60 #define MAX_INIT_RETRIES 3 61 62 /* Controller dump header */ 63 #define QCA_SSR_DUMP_HANDLE 0x0108 64 #define QCA_DUMP_PACKET_SIZE 255 65 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 66 #define QCA_CRASHBYTE_PACKET_LEN 1096 67 #define QCA_MEMDUMP_BYTE 0xFB 68 69 enum qca_flags { 70 QCA_IBS_ENABLED, 71 QCA_DROP_VENDOR_EVENT, 72 QCA_SUSPENDING, 73 QCA_MEMDUMP_COLLECTION, 74 QCA_HW_ERROR_EVENT 75 }; 76 77 78 /* HCI_IBS transmit side sleep protocol states */ 79 enum tx_ibs_states { 80 HCI_IBS_TX_ASLEEP, 81 HCI_IBS_TX_WAKING, 82 HCI_IBS_TX_AWAKE, 83 }; 84 85 /* HCI_IBS receive side sleep protocol states */ 86 enum rx_states { 87 HCI_IBS_RX_ASLEEP, 88 HCI_IBS_RX_AWAKE, 89 }; 90 91 /* HCI_IBS transmit and receive side clock state vote */ 92 enum hci_ibs_clock_state_vote { 93 HCI_IBS_VOTE_STATS_UPDATE, 94 HCI_IBS_TX_VOTE_CLOCK_ON, 95 HCI_IBS_TX_VOTE_CLOCK_OFF, 96 HCI_IBS_RX_VOTE_CLOCK_ON, 97 HCI_IBS_RX_VOTE_CLOCK_OFF, 98 }; 99 100 /* Controller memory dump states */ 101 enum qca_memdump_states { 102 QCA_MEMDUMP_IDLE, 103 QCA_MEMDUMP_COLLECTING, 104 QCA_MEMDUMP_COLLECTED, 105 QCA_MEMDUMP_TIMEOUT, 106 }; 107 108 struct qca_memdump_data { 109 char *memdump_buf_head; 110 char *memdump_buf_tail; 111 u32 current_seq_no; 112 u32 received_dump; 113 }; 114 115 struct qca_memdump_event_hdr { 116 __u8 evt; 117 __u8 plen; 118 __u16 opcode; 119 __u16 seq_no; 120 __u8 reserved; 121 } __packed; 122 123 124 struct qca_dump_size { 125 u32 dump_size; 126 } __packed; 127 128 struct qca_data { 129 struct hci_uart *hu; 130 struct sk_buff *rx_skb; 131 struct sk_buff_head txq; 132 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 133 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 134 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 135 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 136 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 137 bool tx_vote; /* Clock must be on for TX */ 138 bool rx_vote; /* Clock must be on for RX */ 139 struct timer_list tx_idle_timer; 140 u32 tx_idle_delay; 141 struct timer_list wake_retrans_timer; 142 u32 wake_retrans; 143 struct workqueue_struct *workqueue; 144 struct work_struct ws_awake_rx; 145 struct work_struct ws_awake_device; 146 struct work_struct ws_rx_vote_off; 147 struct work_struct ws_tx_vote_off; 148 struct work_struct ctrl_memdump_evt; 149 struct delayed_work ctrl_memdump_timeout; 150 struct qca_memdump_data *qca_memdump; 151 unsigned long flags; 152 struct completion drop_ev_comp; 153 wait_queue_head_t suspend_wait_q; 154 enum qca_memdump_states memdump_state; 155 struct mutex hci_memdump_lock; 156 157 /* For debugging purpose */ 158 u64 ibs_sent_wacks; 159 u64 ibs_sent_slps; 160 u64 ibs_sent_wakes; 161 u64 ibs_recv_wacks; 162 u64 ibs_recv_slps; 163 u64 ibs_recv_wakes; 164 u64 vote_last_jif; 165 u32 vote_on_ms; 166 u32 vote_off_ms; 167 u64 tx_votes_on; 168 u64 rx_votes_on; 169 u64 tx_votes_off; 170 u64 rx_votes_off; 171 u64 votes_on; 172 u64 votes_off; 173 }; 174 175 enum qca_speed_type { 176 QCA_INIT_SPEED = 1, 177 QCA_OPER_SPEED 178 }; 179 180 /* 181 * Voltage regulator information required for configuring the 182 * QCA Bluetooth chipset 183 */ 184 struct qca_vreg { 185 const char *name; 186 unsigned int load_uA; 187 }; 188 189 struct qca_vreg_data { 190 enum qca_btsoc_type soc_type; 191 struct qca_vreg *vregs; 192 size_t num_vregs; 193 }; 194 195 /* 196 * Platform data for the QCA Bluetooth power driver. 197 */ 198 struct qca_power { 199 struct device *dev; 200 struct regulator_bulk_data *vreg_bulk; 201 int num_vregs; 202 bool vregs_on; 203 }; 204 205 struct qca_serdev { 206 struct hci_uart serdev_hu; 207 struct gpio_desc *bt_en; 208 struct clk *susclk; 209 enum qca_btsoc_type btsoc_type; 210 struct qca_power *bt_power; 211 u32 init_speed; 212 u32 oper_speed; 213 const char *firmware_name; 214 }; 215 216 static int qca_regulator_enable(struct qca_serdev *qcadev); 217 static void qca_regulator_disable(struct qca_serdev *qcadev); 218 static void qca_power_shutdown(struct hci_uart *hu); 219 static int qca_power_off(struct hci_dev *hdev); 220 static void qca_controller_memdump(struct work_struct *work); 221 222 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 223 { 224 enum qca_btsoc_type soc_type; 225 226 if (hu->serdev) { 227 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 228 229 soc_type = qsd->btsoc_type; 230 } else { 231 soc_type = QCA_ROME; 232 } 233 234 return soc_type; 235 } 236 237 static const char *qca_get_firmware_name(struct hci_uart *hu) 238 { 239 if (hu->serdev) { 240 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 241 242 return qsd->firmware_name; 243 } else { 244 return NULL; 245 } 246 } 247 248 static void __serial_clock_on(struct tty_struct *tty) 249 { 250 /* TODO: Some chipset requires to enable UART clock on client 251 * side to save power consumption or manual work is required. 252 * Please put your code to control UART clock here if needed 253 */ 254 } 255 256 static void __serial_clock_off(struct tty_struct *tty) 257 { 258 /* TODO: Some chipset requires to disable UART clock on client 259 * side to save power consumption or manual work is required. 260 * Please put your code to control UART clock off here if needed 261 */ 262 } 263 264 /* serial_clock_vote needs to be called with the ibs lock held */ 265 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 266 { 267 struct qca_data *qca = hu->priv; 268 unsigned int diff; 269 270 bool old_vote = (qca->tx_vote | qca->rx_vote); 271 bool new_vote; 272 273 switch (vote) { 274 case HCI_IBS_VOTE_STATS_UPDATE: 275 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 276 277 if (old_vote) 278 qca->vote_off_ms += diff; 279 else 280 qca->vote_on_ms += diff; 281 return; 282 283 case HCI_IBS_TX_VOTE_CLOCK_ON: 284 qca->tx_vote = true; 285 qca->tx_votes_on++; 286 new_vote = true; 287 break; 288 289 case HCI_IBS_RX_VOTE_CLOCK_ON: 290 qca->rx_vote = true; 291 qca->rx_votes_on++; 292 new_vote = true; 293 break; 294 295 case HCI_IBS_TX_VOTE_CLOCK_OFF: 296 qca->tx_vote = false; 297 qca->tx_votes_off++; 298 new_vote = qca->rx_vote | qca->tx_vote; 299 break; 300 301 case HCI_IBS_RX_VOTE_CLOCK_OFF: 302 qca->rx_vote = false; 303 qca->rx_votes_off++; 304 new_vote = qca->rx_vote | qca->tx_vote; 305 break; 306 307 default: 308 BT_ERR("Voting irregularity"); 309 return; 310 } 311 312 if (new_vote != old_vote) { 313 if (new_vote) 314 __serial_clock_on(hu->tty); 315 else 316 __serial_clock_off(hu->tty); 317 318 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", 319 vote ? "true" : "false"); 320 321 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 322 323 if (new_vote) { 324 qca->votes_on++; 325 qca->vote_off_ms += diff; 326 } else { 327 qca->votes_off++; 328 qca->vote_on_ms += diff; 329 } 330 qca->vote_last_jif = jiffies; 331 } 332 } 333 334 /* Builds and sends an HCI_IBS command packet. 335 * These are very simple packets with only 1 cmd byte. 336 */ 337 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 338 { 339 int err = 0; 340 struct sk_buff *skb = NULL; 341 struct qca_data *qca = hu->priv; 342 343 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 344 345 skb = bt_skb_alloc(1, GFP_ATOMIC); 346 if (!skb) { 347 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 348 return -ENOMEM; 349 } 350 351 /* Assign HCI_IBS type */ 352 skb_put_u8(skb, cmd); 353 354 skb_queue_tail(&qca->txq, skb); 355 356 return err; 357 } 358 359 static void qca_wq_awake_device(struct work_struct *work) 360 { 361 struct qca_data *qca = container_of(work, struct qca_data, 362 ws_awake_device); 363 struct hci_uart *hu = qca->hu; 364 unsigned long retrans_delay; 365 unsigned long flags; 366 367 BT_DBG("hu %p wq awake device", hu); 368 369 /* Vote for serial clock */ 370 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 371 372 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 373 374 /* Send wake indication to device */ 375 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 376 BT_ERR("Failed to send WAKE to device"); 377 378 qca->ibs_sent_wakes++; 379 380 /* Start retransmit timer */ 381 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 382 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 383 384 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 385 386 /* Actually send the packets */ 387 hci_uart_tx_wakeup(hu); 388 } 389 390 static void qca_wq_awake_rx(struct work_struct *work) 391 { 392 struct qca_data *qca = container_of(work, struct qca_data, 393 ws_awake_rx); 394 struct hci_uart *hu = qca->hu; 395 unsigned long flags; 396 397 BT_DBG("hu %p wq awake rx", hu); 398 399 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 400 401 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 402 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 403 404 /* Always acknowledge device wake up, 405 * sending IBS message doesn't count as TX ON. 406 */ 407 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 408 BT_ERR("Failed to acknowledge device wake up"); 409 410 qca->ibs_sent_wacks++; 411 412 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 413 414 /* Actually send the packets */ 415 hci_uart_tx_wakeup(hu); 416 } 417 418 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 419 { 420 struct qca_data *qca = container_of(work, struct qca_data, 421 ws_rx_vote_off); 422 struct hci_uart *hu = qca->hu; 423 424 BT_DBG("hu %p rx clock vote off", hu); 425 426 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 427 } 428 429 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 430 { 431 struct qca_data *qca = container_of(work, struct qca_data, 432 ws_tx_vote_off); 433 struct hci_uart *hu = qca->hu; 434 435 BT_DBG("hu %p tx clock vote off", hu); 436 437 /* Run HCI tx handling unlocked */ 438 hci_uart_tx_wakeup(hu); 439 440 /* Now that message queued to tty driver, vote for tty clocks off. 441 * It is up to the tty driver to pend the clocks off until tx done. 442 */ 443 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 444 } 445 446 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 447 { 448 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 449 struct hci_uart *hu = qca->hu; 450 unsigned long flags; 451 452 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 453 454 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 455 flags, SINGLE_DEPTH_NESTING); 456 457 switch (qca->tx_ibs_state) { 458 case HCI_IBS_TX_AWAKE: 459 /* TX_IDLE, go to SLEEP */ 460 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 461 BT_ERR("Failed to send SLEEP to device"); 462 break; 463 } 464 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 465 qca->ibs_sent_slps++; 466 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 467 break; 468 469 case HCI_IBS_TX_ASLEEP: 470 case HCI_IBS_TX_WAKING: 471 /* Fall through */ 472 473 default: 474 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 475 break; 476 } 477 478 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 479 } 480 481 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 482 { 483 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 484 struct hci_uart *hu = qca->hu; 485 unsigned long flags, retrans_delay; 486 bool retransmit = false; 487 488 BT_DBG("hu %p wake retransmit timeout in %d state", 489 hu, qca->tx_ibs_state); 490 491 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 492 flags, SINGLE_DEPTH_NESTING); 493 494 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 495 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 496 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 497 return; 498 } 499 500 switch (qca->tx_ibs_state) { 501 case HCI_IBS_TX_WAKING: 502 /* No WAKE_ACK, retransmit WAKE */ 503 retransmit = true; 504 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 505 BT_ERR("Failed to acknowledge device wake up"); 506 break; 507 } 508 qca->ibs_sent_wakes++; 509 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 510 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 511 break; 512 513 case HCI_IBS_TX_ASLEEP: 514 case HCI_IBS_TX_AWAKE: 515 /* Fall through */ 516 517 default: 518 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 519 break; 520 } 521 522 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 523 524 if (retransmit) 525 hci_uart_tx_wakeup(hu); 526 } 527 528 529 static void qca_controller_memdump_timeout(struct work_struct *work) 530 { 531 struct qca_data *qca = container_of(work, struct qca_data, 532 ctrl_memdump_timeout.work); 533 struct hci_uart *hu = qca->hu; 534 535 mutex_lock(&qca->hci_memdump_lock); 536 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 537 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 538 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 539 /* Inject hw error event to reset the device 540 * and driver. 541 */ 542 hci_reset_dev(hu->hdev); 543 } 544 } 545 546 mutex_unlock(&qca->hci_memdump_lock); 547 } 548 549 550 /* Initialize protocol */ 551 static int qca_open(struct hci_uart *hu) 552 { 553 struct qca_serdev *qcadev; 554 struct qca_data *qca; 555 556 BT_DBG("hu %p qca_open", hu); 557 558 if (!hci_uart_has_flow_control(hu)) 559 return -EOPNOTSUPP; 560 561 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); 562 if (!qca) 563 return -ENOMEM; 564 565 skb_queue_head_init(&qca->txq); 566 skb_queue_head_init(&qca->tx_wait_q); 567 skb_queue_head_init(&qca->rx_memdump_q); 568 spin_lock_init(&qca->hci_ibs_lock); 569 mutex_init(&qca->hci_memdump_lock); 570 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 571 if (!qca->workqueue) { 572 BT_ERR("QCA Workqueue not initialized properly"); 573 kfree(qca); 574 return -ENOMEM; 575 } 576 577 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 578 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 579 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 580 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 581 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 582 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 583 qca_controller_memdump_timeout); 584 init_waitqueue_head(&qca->suspend_wait_q); 585 586 qca->hu = hu; 587 init_completion(&qca->drop_ev_comp); 588 589 /* Assume we start with both sides asleep -- extra wakes OK */ 590 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 591 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 592 593 qca->vote_last_jif = jiffies; 594 595 hu->priv = qca; 596 597 if (hu->serdev) { 598 qcadev = serdev_device_get_drvdata(hu->serdev); 599 if (qca_is_wcn399x(qcadev->btsoc_type)) { 600 hu->init_speed = qcadev->init_speed; 601 hu->oper_speed = qcadev->oper_speed; 602 } 603 } 604 605 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 606 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 607 608 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 609 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 610 611 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 612 qca->tx_idle_delay, qca->wake_retrans); 613 614 return 0; 615 } 616 617 static void qca_debugfs_init(struct hci_dev *hdev) 618 { 619 struct hci_uart *hu = hci_get_drvdata(hdev); 620 struct qca_data *qca = hu->priv; 621 struct dentry *ibs_dir; 622 umode_t mode; 623 624 if (!hdev->debugfs) 625 return; 626 627 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 628 629 /* read only */ 630 mode = S_IRUGO; 631 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 632 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 633 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 634 &qca->ibs_sent_slps); 635 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 636 &qca->ibs_sent_wakes); 637 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 638 &qca->ibs_sent_wacks); 639 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 640 &qca->ibs_recv_slps); 641 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 642 &qca->ibs_recv_wakes); 643 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 644 &qca->ibs_recv_wacks); 645 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 646 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 647 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 648 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 649 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 650 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 651 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 652 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 653 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 654 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 655 656 /* read/write */ 657 mode = S_IRUGO | S_IWUSR; 658 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 659 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 660 &qca->tx_idle_delay); 661 } 662 663 /* Flush protocol data */ 664 static int qca_flush(struct hci_uart *hu) 665 { 666 struct qca_data *qca = hu->priv; 667 668 BT_DBG("hu %p qca flush", hu); 669 670 skb_queue_purge(&qca->tx_wait_q); 671 skb_queue_purge(&qca->txq); 672 673 return 0; 674 } 675 676 /* Close protocol */ 677 static int qca_close(struct hci_uart *hu) 678 { 679 struct qca_data *qca = hu->priv; 680 681 BT_DBG("hu %p qca close", hu); 682 683 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 684 685 skb_queue_purge(&qca->tx_wait_q); 686 skb_queue_purge(&qca->txq); 687 skb_queue_purge(&qca->rx_memdump_q); 688 del_timer(&qca->tx_idle_timer); 689 del_timer(&qca->wake_retrans_timer); 690 destroy_workqueue(qca->workqueue); 691 qca->hu = NULL; 692 693 qca_power_shutdown(hu); 694 695 kfree_skb(qca->rx_skb); 696 697 hu->priv = NULL; 698 699 kfree(qca); 700 701 return 0; 702 } 703 704 /* Called upon a wake-up-indication from the device. 705 */ 706 static void device_want_to_wakeup(struct hci_uart *hu) 707 { 708 unsigned long flags; 709 struct qca_data *qca = hu->priv; 710 711 BT_DBG("hu %p want to wake up", hu); 712 713 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 714 715 qca->ibs_recv_wakes++; 716 717 /* Don't wake the rx up when suspending. */ 718 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 719 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 720 return; 721 } 722 723 switch (qca->rx_ibs_state) { 724 case HCI_IBS_RX_ASLEEP: 725 /* Make sure clock is on - we may have turned clock off since 726 * receiving the wake up indicator awake rx clock. 727 */ 728 queue_work(qca->workqueue, &qca->ws_awake_rx); 729 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 730 return; 731 732 case HCI_IBS_RX_AWAKE: 733 /* Always acknowledge device wake up, 734 * sending IBS message doesn't count as TX ON. 735 */ 736 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 737 BT_ERR("Failed to acknowledge device wake up"); 738 break; 739 } 740 qca->ibs_sent_wacks++; 741 break; 742 743 default: 744 /* Any other state is illegal */ 745 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 746 qca->rx_ibs_state); 747 break; 748 } 749 750 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 751 752 /* Actually send the packets */ 753 hci_uart_tx_wakeup(hu); 754 } 755 756 /* Called upon a sleep-indication from the device. 757 */ 758 static void device_want_to_sleep(struct hci_uart *hu) 759 { 760 unsigned long flags; 761 struct qca_data *qca = hu->priv; 762 763 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 764 765 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 766 767 qca->ibs_recv_slps++; 768 769 switch (qca->rx_ibs_state) { 770 case HCI_IBS_RX_AWAKE: 771 /* Update state */ 772 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 773 /* Vote off rx clock under workqueue */ 774 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 775 break; 776 777 case HCI_IBS_RX_ASLEEP: 778 break; 779 780 default: 781 /* Any other state is illegal */ 782 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 783 qca->rx_ibs_state); 784 break; 785 } 786 787 wake_up_interruptible(&qca->suspend_wait_q); 788 789 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 790 } 791 792 /* Called upon wake-up-acknowledgement from the device 793 */ 794 static void device_woke_up(struct hci_uart *hu) 795 { 796 unsigned long flags, idle_delay; 797 struct qca_data *qca = hu->priv; 798 struct sk_buff *skb = NULL; 799 800 BT_DBG("hu %p woke up", hu); 801 802 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 803 804 qca->ibs_recv_wacks++; 805 806 /* Don't react to the wake-up-acknowledgment when suspending. */ 807 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 808 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 809 return; 810 } 811 812 switch (qca->tx_ibs_state) { 813 case HCI_IBS_TX_AWAKE: 814 /* Expect one if we send 2 WAKEs */ 815 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 816 qca->tx_ibs_state); 817 break; 818 819 case HCI_IBS_TX_WAKING: 820 /* Send pending packets */ 821 while ((skb = skb_dequeue(&qca->tx_wait_q))) 822 skb_queue_tail(&qca->txq, skb); 823 824 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 825 del_timer(&qca->wake_retrans_timer); 826 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 827 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 828 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 829 break; 830 831 case HCI_IBS_TX_ASLEEP: 832 /* Fall through */ 833 834 default: 835 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 836 qca->tx_ibs_state); 837 break; 838 } 839 840 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 841 842 /* Actually send the packets */ 843 hci_uart_tx_wakeup(hu); 844 } 845 846 /* Enqueue frame for transmittion (padding, crc, etc) may be called from 847 * two simultaneous tasklets. 848 */ 849 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 850 { 851 unsigned long flags = 0, idle_delay; 852 struct qca_data *qca = hu->priv; 853 854 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 855 qca->tx_ibs_state); 856 857 /* Prepend skb with frame type */ 858 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 859 860 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 861 862 /* Don't go to sleep in middle of patch download or 863 * Out-Of-Band(GPIOs control) sleep is selected. 864 * Don't wake the device up when suspending. 865 */ 866 if (!test_bit(QCA_IBS_ENABLED, &qca->flags) || 867 test_bit(QCA_SUSPENDING, &qca->flags)) { 868 skb_queue_tail(&qca->txq, skb); 869 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 870 return 0; 871 } 872 873 /* Act according to current state */ 874 switch (qca->tx_ibs_state) { 875 case HCI_IBS_TX_AWAKE: 876 BT_DBG("Device awake, sending normally"); 877 skb_queue_tail(&qca->txq, skb); 878 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 879 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 880 break; 881 882 case HCI_IBS_TX_ASLEEP: 883 BT_DBG("Device asleep, waking up and queueing packet"); 884 /* Save packet for later */ 885 skb_queue_tail(&qca->tx_wait_q, skb); 886 887 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 888 /* Schedule a work queue to wake up device */ 889 queue_work(qca->workqueue, &qca->ws_awake_device); 890 break; 891 892 case HCI_IBS_TX_WAKING: 893 BT_DBG("Device waking up, queueing packet"); 894 /* Transient state; just keep packet for later */ 895 skb_queue_tail(&qca->tx_wait_q, skb); 896 break; 897 898 default: 899 BT_ERR("Illegal tx state: %d (losing packet)", 900 qca->tx_ibs_state); 901 kfree_skb(skb); 902 break; 903 } 904 905 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 906 907 return 0; 908 } 909 910 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 911 { 912 struct hci_uart *hu = hci_get_drvdata(hdev); 913 914 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 915 916 device_want_to_sleep(hu); 917 918 kfree_skb(skb); 919 return 0; 920 } 921 922 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 923 { 924 struct hci_uart *hu = hci_get_drvdata(hdev); 925 926 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 927 928 device_want_to_wakeup(hu); 929 930 kfree_skb(skb); 931 return 0; 932 } 933 934 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 935 { 936 struct hci_uart *hu = hci_get_drvdata(hdev); 937 938 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 939 940 device_woke_up(hu); 941 942 kfree_skb(skb); 943 return 0; 944 } 945 946 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 947 { 948 /* We receive debug logs from chip as an ACL packets. 949 * Instead of sending the data to ACL to decode the 950 * received data, we are pushing them to the above layers 951 * as a diagnostic packet. 952 */ 953 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 954 return hci_recv_diag(hdev, skb); 955 956 return hci_recv_frame(hdev, skb); 957 } 958 959 static void qca_controller_memdump(struct work_struct *work) 960 { 961 struct qca_data *qca = container_of(work, struct qca_data, 962 ctrl_memdump_evt); 963 struct hci_uart *hu = qca->hu; 964 struct sk_buff *skb; 965 struct qca_memdump_event_hdr *cmd_hdr; 966 struct qca_memdump_data *qca_memdump = qca->qca_memdump; 967 struct qca_dump_size *dump; 968 char *memdump_buf; 969 char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 }; 970 u16 seq_no; 971 u32 dump_size; 972 973 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 974 975 mutex_lock(&qca->hci_memdump_lock); 976 /* Skip processing the received packets if timeout detected. */ 977 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT) { 978 mutex_unlock(&qca->hci_memdump_lock); 979 return; 980 } 981 982 if (!qca_memdump) { 983 qca_memdump = kzalloc(sizeof(struct qca_memdump_data), 984 GFP_ATOMIC); 985 if (!qca_memdump) { 986 mutex_unlock(&qca->hci_memdump_lock); 987 return; 988 } 989 990 qca->qca_memdump = qca_memdump; 991 } 992 993 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 994 cmd_hdr = (void *) skb->data; 995 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 996 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 997 998 if (!seq_no) { 999 1000 /* This is the first frame of memdump packet from 1001 * the controller, Disable IBS to recevie dump 1002 * with out any interruption, ideally time required for 1003 * the controller to send the dump is 8 seconds. let us 1004 * start timer to handle this asynchronous activity. 1005 */ 1006 clear_bit(QCA_IBS_ENABLED, &qca->flags); 1007 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1008 dump = (void *) skb->data; 1009 dump_size = __le32_to_cpu(dump->dump_size); 1010 if (!(dump_size)) { 1011 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1012 kfree_skb(skb); 1013 mutex_unlock(&qca->hci_memdump_lock); 1014 return; 1015 } 1016 1017 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1018 dump_size); 1019 queue_delayed_work(qca->workqueue, 1020 &qca->ctrl_memdump_timeout, 1021 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1022 1023 skb_pull(skb, sizeof(dump_size)); 1024 memdump_buf = vmalloc(dump_size); 1025 qca_memdump->memdump_buf_head = memdump_buf; 1026 qca_memdump->memdump_buf_tail = memdump_buf; 1027 } 1028 1029 memdump_buf = qca_memdump->memdump_buf_tail; 1030 1031 /* If sequence no 0 is missed then there is no point in 1032 * accepting the other sequences. 1033 */ 1034 if (!memdump_buf) { 1035 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1036 kfree(qca_memdump); 1037 kfree_skb(skb); 1038 qca->qca_memdump = NULL; 1039 mutex_unlock(&qca->hci_memdump_lock); 1040 return; 1041 } 1042 1043 /* There could be chance of missing some packets from 1044 * the controller. In such cases let us store the dummy 1045 * packets in the buffer. 1046 */ 1047 while ((seq_no > qca_memdump->current_seq_no + 1) && 1048 seq_no != QCA_LAST_SEQUENCE_NUM) { 1049 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1050 qca_memdump->current_seq_no); 1051 memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE); 1052 memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE; 1053 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1054 qca_memdump->current_seq_no++; 1055 } 1056 1057 memcpy(memdump_buf, (unsigned char *) skb->data, skb->len); 1058 memdump_buf = memdump_buf + skb->len; 1059 qca_memdump->memdump_buf_tail = memdump_buf; 1060 qca_memdump->current_seq_no = seq_no + 1; 1061 qca_memdump->received_dump += skb->len; 1062 qca->qca_memdump = qca_memdump; 1063 kfree_skb(skb); 1064 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1065 bt_dev_info(hu->hdev, "QCA writing crash dump of size %d bytes", 1066 qca_memdump->received_dump); 1067 memdump_buf = qca_memdump->memdump_buf_head; 1068 dev_coredumpv(&hu->serdev->dev, memdump_buf, 1069 qca_memdump->received_dump, GFP_KERNEL); 1070 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1071 kfree(qca->qca_memdump); 1072 qca->qca_memdump = NULL; 1073 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1074 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1075 } 1076 1077 mutex_unlock(&qca->hci_memdump_lock); 1078 } 1079 1080 } 1081 1082 static int qca_controller_memdump_event(struct hci_dev *hdev, 1083 struct sk_buff *skb) 1084 { 1085 struct hci_uart *hu = hci_get_drvdata(hdev); 1086 struct qca_data *qca = hu->priv; 1087 1088 skb_queue_tail(&qca->rx_memdump_q, skb); 1089 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1090 1091 return 0; 1092 } 1093 1094 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1095 { 1096 struct hci_uart *hu = hci_get_drvdata(hdev); 1097 struct qca_data *qca = hu->priv; 1098 1099 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1100 struct hci_event_hdr *hdr = (void *)skb->data; 1101 1102 /* For the WCN3990 the vendor command for a baudrate change 1103 * isn't sent as synchronous HCI command, because the 1104 * controller sends the corresponding vendor event with the 1105 * new baudrate. The event is received and properly decoded 1106 * after changing the baudrate of the host port. It needs to 1107 * be dropped, otherwise it can be misinterpreted as 1108 * response to a later firmware download command (also a 1109 * vendor command). 1110 */ 1111 1112 if (hdr->evt == HCI_EV_VENDOR) 1113 complete(&qca->drop_ev_comp); 1114 1115 kfree_skb(skb); 1116 1117 return 0; 1118 } 1119 /* We receive chip memory dump as an event packet, With a dedicated 1120 * handler followed by a hardware error event. When this event is 1121 * received we store dump into a file before closing hci. This 1122 * dump will help in triaging the issues. 1123 */ 1124 if ((skb->data[0] == HCI_VENDOR_PKT) && 1125 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1126 return qca_controller_memdump_event(hdev, skb); 1127 1128 return hci_recv_frame(hdev, skb); 1129 } 1130 1131 #define QCA_IBS_SLEEP_IND_EVENT \ 1132 .type = HCI_IBS_SLEEP_IND, \ 1133 .hlen = 0, \ 1134 .loff = 0, \ 1135 .lsize = 0, \ 1136 .maxlen = HCI_MAX_IBS_SIZE 1137 1138 #define QCA_IBS_WAKE_IND_EVENT \ 1139 .type = HCI_IBS_WAKE_IND, \ 1140 .hlen = 0, \ 1141 .loff = 0, \ 1142 .lsize = 0, \ 1143 .maxlen = HCI_MAX_IBS_SIZE 1144 1145 #define QCA_IBS_WAKE_ACK_EVENT \ 1146 .type = HCI_IBS_WAKE_ACK, \ 1147 .hlen = 0, \ 1148 .loff = 0, \ 1149 .lsize = 0, \ 1150 .maxlen = HCI_MAX_IBS_SIZE 1151 1152 static const struct h4_recv_pkt qca_recv_pkts[] = { 1153 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1154 { H4_RECV_SCO, .recv = hci_recv_frame }, 1155 { H4_RECV_EVENT, .recv = qca_recv_event }, 1156 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1157 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1158 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1159 }; 1160 1161 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1162 { 1163 struct qca_data *qca = hu->priv; 1164 1165 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1166 return -EUNATCH; 1167 1168 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1169 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1170 if (IS_ERR(qca->rx_skb)) { 1171 int err = PTR_ERR(qca->rx_skb); 1172 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1173 qca->rx_skb = NULL; 1174 return err; 1175 } 1176 1177 return count; 1178 } 1179 1180 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1181 { 1182 struct qca_data *qca = hu->priv; 1183 1184 return skb_dequeue(&qca->txq); 1185 } 1186 1187 static uint8_t qca_get_baudrate_value(int speed) 1188 { 1189 switch (speed) { 1190 case 9600: 1191 return QCA_BAUDRATE_9600; 1192 case 19200: 1193 return QCA_BAUDRATE_19200; 1194 case 38400: 1195 return QCA_BAUDRATE_38400; 1196 case 57600: 1197 return QCA_BAUDRATE_57600; 1198 case 115200: 1199 return QCA_BAUDRATE_115200; 1200 case 230400: 1201 return QCA_BAUDRATE_230400; 1202 case 460800: 1203 return QCA_BAUDRATE_460800; 1204 case 500000: 1205 return QCA_BAUDRATE_500000; 1206 case 921600: 1207 return QCA_BAUDRATE_921600; 1208 case 1000000: 1209 return QCA_BAUDRATE_1000000; 1210 case 2000000: 1211 return QCA_BAUDRATE_2000000; 1212 case 3000000: 1213 return QCA_BAUDRATE_3000000; 1214 case 3200000: 1215 return QCA_BAUDRATE_3200000; 1216 case 3500000: 1217 return QCA_BAUDRATE_3500000; 1218 default: 1219 return QCA_BAUDRATE_115200; 1220 } 1221 } 1222 1223 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1224 { 1225 struct hci_uart *hu = hci_get_drvdata(hdev); 1226 struct qca_data *qca = hu->priv; 1227 struct sk_buff *skb; 1228 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1229 1230 if (baudrate > QCA_BAUDRATE_3200000) 1231 return -EINVAL; 1232 1233 cmd[4] = baudrate; 1234 1235 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1236 if (!skb) { 1237 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1238 return -ENOMEM; 1239 } 1240 1241 /* Assign commands to change baudrate and packet type. */ 1242 skb_put_data(skb, cmd, sizeof(cmd)); 1243 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1244 1245 skb_queue_tail(&qca->txq, skb); 1246 hci_uart_tx_wakeup(hu); 1247 1248 /* Wait for the baudrate change request to be sent */ 1249 1250 while (!skb_queue_empty(&qca->txq)) 1251 usleep_range(100, 200); 1252 1253 if (hu->serdev) 1254 serdev_device_wait_until_sent(hu->serdev, 1255 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1256 1257 /* Give the controller time to process the request */ 1258 if (qca_is_wcn399x(qca_soc_type(hu))) 1259 msleep(10); 1260 else 1261 msleep(300); 1262 1263 return 0; 1264 } 1265 1266 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1267 { 1268 if (hu->serdev) 1269 serdev_device_set_baudrate(hu->serdev, speed); 1270 else 1271 hci_uart_set_baudrate(hu, speed); 1272 } 1273 1274 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1275 { 1276 int ret; 1277 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1278 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1279 1280 /* These power pulses are single byte command which are sent 1281 * at required baudrate to wcn3990. On wcn3990, we have an external 1282 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1283 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1284 * and also we use the same power inputs to turn on and off for 1285 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1286 * we send a power on pulse at 115200 bps. This algorithm will help to 1287 * save power. Disabling hardware flow control is mandatory while 1288 * sending power pulses to SoC. 1289 */ 1290 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1291 1292 serdev_device_write_flush(hu->serdev); 1293 hci_uart_set_flow_control(hu, true); 1294 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1295 if (ret < 0) { 1296 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1297 return ret; 1298 } 1299 1300 serdev_device_wait_until_sent(hu->serdev, timeout); 1301 hci_uart_set_flow_control(hu, false); 1302 1303 /* Give to controller time to boot/shutdown */ 1304 if (on) 1305 msleep(100); 1306 else 1307 msleep(10); 1308 1309 return 0; 1310 } 1311 1312 static unsigned int qca_get_speed(struct hci_uart *hu, 1313 enum qca_speed_type speed_type) 1314 { 1315 unsigned int speed = 0; 1316 1317 if (speed_type == QCA_INIT_SPEED) { 1318 if (hu->init_speed) 1319 speed = hu->init_speed; 1320 else if (hu->proto->init_speed) 1321 speed = hu->proto->init_speed; 1322 } else { 1323 if (hu->oper_speed) 1324 speed = hu->oper_speed; 1325 else if (hu->proto->oper_speed) 1326 speed = hu->proto->oper_speed; 1327 } 1328 1329 return speed; 1330 } 1331 1332 static int qca_check_speeds(struct hci_uart *hu) 1333 { 1334 if (qca_is_wcn399x(qca_soc_type(hu))) { 1335 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1336 !qca_get_speed(hu, QCA_OPER_SPEED)) 1337 return -EINVAL; 1338 } else { 1339 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1340 !qca_get_speed(hu, QCA_OPER_SPEED)) 1341 return -EINVAL; 1342 } 1343 1344 return 0; 1345 } 1346 1347 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1348 { 1349 unsigned int speed, qca_baudrate; 1350 struct qca_data *qca = hu->priv; 1351 int ret = 0; 1352 1353 if (speed_type == QCA_INIT_SPEED) { 1354 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1355 if (speed) 1356 host_set_baudrate(hu, speed); 1357 } else { 1358 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1359 1360 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1361 if (!speed) 1362 return 0; 1363 1364 /* Disable flow control for wcn3990 to deassert RTS while 1365 * changing the baudrate of chip and host. 1366 */ 1367 if (qca_is_wcn399x(soc_type)) 1368 hci_uart_set_flow_control(hu, true); 1369 1370 if (soc_type == QCA_WCN3990) { 1371 reinit_completion(&qca->drop_ev_comp); 1372 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1373 } 1374 1375 qca_baudrate = qca_get_baudrate_value(speed); 1376 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1377 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1378 if (ret) 1379 goto error; 1380 1381 host_set_baudrate(hu, speed); 1382 1383 error: 1384 if (qca_is_wcn399x(soc_type)) 1385 hci_uart_set_flow_control(hu, false); 1386 1387 if (soc_type == QCA_WCN3990) { 1388 /* Wait for the controller to send the vendor event 1389 * for the baudrate change command. 1390 */ 1391 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1392 msecs_to_jiffies(100))) { 1393 bt_dev_err(hu->hdev, 1394 "Failed to change controller baudrate\n"); 1395 ret = -ETIMEDOUT; 1396 } 1397 1398 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1399 } 1400 } 1401 1402 return ret; 1403 } 1404 1405 static int qca_send_crashbuffer(struct hci_uart *hu) 1406 { 1407 struct qca_data *qca = hu->priv; 1408 struct sk_buff *skb; 1409 1410 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1411 if (!skb) { 1412 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1413 return -ENOMEM; 1414 } 1415 1416 /* We forcefully crash the controller, by sending 0xfb byte for 1417 * 1024 times. We also might have chance of losing data, To be 1418 * on safer side we send 1096 bytes to the SoC. 1419 */ 1420 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1421 QCA_CRASHBYTE_PACKET_LEN); 1422 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1423 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1424 skb_queue_tail(&qca->txq, skb); 1425 hci_uart_tx_wakeup(hu); 1426 1427 return 0; 1428 } 1429 1430 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1431 { 1432 struct hci_uart *hu = hci_get_drvdata(hdev); 1433 struct qca_data *qca = hu->priv; 1434 1435 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1436 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1437 1438 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1439 } 1440 1441 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1442 { 1443 struct hci_uart *hu = hci_get_drvdata(hdev); 1444 struct qca_data *qca = hu->priv; 1445 struct qca_memdump_data *qca_memdump = qca->qca_memdump; 1446 char *memdump_buf = NULL; 1447 1448 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1449 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1450 1451 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1452 /* If hardware error event received for other than QCA 1453 * soc memory dump event, then we need to crash the SOC 1454 * and wait here for 8 seconds to get the dump packets. 1455 * This will block main thread to be on hold until we 1456 * collect dump. 1457 */ 1458 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1459 qca_send_crashbuffer(hu); 1460 qca_wait_for_dump_collection(hdev); 1461 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1462 /* Let us wait here until memory dump collected or 1463 * memory dump timer expired. 1464 */ 1465 bt_dev_info(hdev, "waiting for dump to complete"); 1466 qca_wait_for_dump_collection(hdev); 1467 } 1468 1469 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1470 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1471 mutex_lock(&qca->hci_memdump_lock); 1472 if (qca_memdump) 1473 memdump_buf = qca_memdump->memdump_buf_head; 1474 vfree(memdump_buf); 1475 kfree(qca_memdump); 1476 qca->qca_memdump = NULL; 1477 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1478 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1479 skb_queue_purge(&qca->rx_memdump_q); 1480 mutex_unlock(&qca->hci_memdump_lock); 1481 cancel_work_sync(&qca->ctrl_memdump_evt); 1482 } 1483 1484 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1485 } 1486 1487 static void qca_cmd_timeout(struct hci_dev *hdev) 1488 { 1489 struct hci_uart *hu = hci_get_drvdata(hdev); 1490 struct qca_data *qca = hu->priv; 1491 1492 if (qca->memdump_state == QCA_MEMDUMP_IDLE) 1493 qca_send_crashbuffer(hu); 1494 else 1495 bt_dev_info(hdev, "Dump collection is in process"); 1496 } 1497 1498 static int qca_wcn3990_init(struct hci_uart *hu) 1499 { 1500 struct qca_serdev *qcadev; 1501 int ret; 1502 1503 /* Check for vregs status, may be hci down has turned 1504 * off the voltage regulator. 1505 */ 1506 qcadev = serdev_device_get_drvdata(hu->serdev); 1507 if (!qcadev->bt_power->vregs_on) { 1508 serdev_device_close(hu->serdev); 1509 ret = qca_regulator_enable(qcadev); 1510 if (ret) 1511 return ret; 1512 1513 ret = serdev_device_open(hu->serdev); 1514 if (ret) { 1515 bt_dev_err(hu->hdev, "failed to open port"); 1516 return ret; 1517 } 1518 } 1519 1520 /* Forcefully enable wcn3990 to enter in to boot mode. */ 1521 host_set_baudrate(hu, 2400); 1522 ret = qca_send_power_pulse(hu, false); 1523 if (ret) 1524 return ret; 1525 1526 qca_set_speed(hu, QCA_INIT_SPEED); 1527 ret = qca_send_power_pulse(hu, true); 1528 if (ret) 1529 return ret; 1530 1531 /* Now the device is in ready state to communicate with host. 1532 * To sync host with device we need to reopen port. 1533 * Without this, we will have RTS and CTS synchronization 1534 * issues. 1535 */ 1536 serdev_device_close(hu->serdev); 1537 ret = serdev_device_open(hu->serdev); 1538 if (ret) { 1539 bt_dev_err(hu->hdev, "failed to open port"); 1540 return ret; 1541 } 1542 1543 hci_uart_set_flow_control(hu, false); 1544 1545 return 0; 1546 } 1547 1548 static int qca_power_on(struct hci_dev *hdev) 1549 { 1550 struct hci_uart *hu = hci_get_drvdata(hdev); 1551 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1552 struct qca_serdev *qcadev; 1553 int ret = 0; 1554 1555 /* Non-serdev device usually is powered by external power 1556 * and don't need additional action in driver for power on 1557 */ 1558 if (!hu->serdev) 1559 return 0; 1560 1561 if (qca_is_wcn399x(soc_type)) { 1562 ret = qca_wcn3990_init(hu); 1563 } else { 1564 qcadev = serdev_device_get_drvdata(hu->serdev); 1565 if (qcadev->bt_en) { 1566 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1567 /* Controller needs time to bootup. */ 1568 msleep(150); 1569 } 1570 } 1571 1572 return ret; 1573 } 1574 1575 static int qca_setup(struct hci_uart *hu) 1576 { 1577 struct hci_dev *hdev = hu->hdev; 1578 struct qca_data *qca = hu->priv; 1579 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1580 unsigned int retries = 0; 1581 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1582 const char *firmware_name = qca_get_firmware_name(hu); 1583 int ret; 1584 int soc_ver = 0; 1585 1586 ret = qca_check_speeds(hu); 1587 if (ret) 1588 return ret; 1589 1590 /* Patch downloading has to be done without IBS mode */ 1591 clear_bit(QCA_IBS_ENABLED, &qca->flags); 1592 1593 /* Enable controller to do both LE scan and BR/EDR inquiry 1594 * simultaneously. 1595 */ 1596 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1597 1598 bt_dev_info(hdev, "setting up %s", 1599 qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME"); 1600 1601 retry: 1602 ret = qca_power_on(hdev); 1603 if (ret) 1604 return ret; 1605 1606 if (qca_is_wcn399x(soc_type)) { 1607 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); 1608 1609 ret = qca_read_soc_version(hdev, &soc_ver, soc_type); 1610 if (ret) 1611 return ret; 1612 } else { 1613 qca_set_speed(hu, QCA_INIT_SPEED); 1614 } 1615 1616 /* Setup user speed if needed */ 1617 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1618 if (speed) { 1619 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1620 if (ret) 1621 return ret; 1622 1623 qca_baudrate = qca_get_baudrate_value(speed); 1624 } 1625 1626 if (!qca_is_wcn399x(soc_type)) { 1627 /* Get QCA version information */ 1628 ret = qca_read_soc_version(hdev, &soc_ver, soc_type); 1629 if (ret) 1630 return ret; 1631 } 1632 1633 bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver); 1634 /* Setup patch / NVM configurations */ 1635 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver, 1636 firmware_name); 1637 if (!ret) { 1638 set_bit(QCA_IBS_ENABLED, &qca->flags); 1639 qca_debugfs_init(hdev); 1640 hu->hdev->hw_error = qca_hw_error; 1641 hu->hdev->cmd_timeout = qca_cmd_timeout; 1642 } else if (ret == -ENOENT) { 1643 /* No patch/nvm-config found, run with original fw/config */ 1644 ret = 0; 1645 } else if (ret == -EAGAIN) { 1646 /* 1647 * Userspace firmware loader will return -EAGAIN in case no 1648 * patch/nvm-config is found, so run with original fw/config. 1649 */ 1650 ret = 0; 1651 } else { 1652 if (retries < MAX_INIT_RETRIES) { 1653 qca_power_shutdown(hu); 1654 if (hu->serdev) { 1655 serdev_device_close(hu->serdev); 1656 ret = serdev_device_open(hu->serdev); 1657 if (ret) { 1658 bt_dev_err(hdev, "failed to open port"); 1659 return ret; 1660 } 1661 } 1662 retries++; 1663 goto retry; 1664 } 1665 } 1666 1667 /* Setup bdaddr */ 1668 if (qca_is_wcn399x(soc_type)) 1669 hu->hdev->set_bdaddr = qca_set_bdaddr; 1670 else 1671 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 1672 1673 return ret; 1674 } 1675 1676 static const struct hci_uart_proto qca_proto = { 1677 .id = HCI_UART_QCA, 1678 .name = "QCA", 1679 .manufacturer = 29, 1680 .init_speed = 115200, 1681 .oper_speed = 3000000, 1682 .open = qca_open, 1683 .close = qca_close, 1684 .flush = qca_flush, 1685 .setup = qca_setup, 1686 .recv = qca_recv, 1687 .enqueue = qca_enqueue, 1688 .dequeue = qca_dequeue, 1689 }; 1690 1691 static const struct qca_vreg_data qca_soc_data_wcn3990 = { 1692 .soc_type = QCA_WCN3990, 1693 .vregs = (struct qca_vreg []) { 1694 { "vddio", 15000 }, 1695 { "vddxo", 80000 }, 1696 { "vddrf", 300000 }, 1697 { "vddch0", 450000 }, 1698 }, 1699 .num_vregs = 4, 1700 }; 1701 1702 static const struct qca_vreg_data qca_soc_data_wcn3991 = { 1703 .soc_type = QCA_WCN3991, 1704 .vregs = (struct qca_vreg []) { 1705 { "vddio", 15000 }, 1706 { "vddxo", 80000 }, 1707 { "vddrf", 300000 }, 1708 { "vddch0", 450000 }, 1709 }, 1710 .num_vregs = 4, 1711 }; 1712 1713 static const struct qca_vreg_data qca_soc_data_wcn3998 = { 1714 .soc_type = QCA_WCN3998, 1715 .vregs = (struct qca_vreg []) { 1716 { "vddio", 10000 }, 1717 { "vddxo", 80000 }, 1718 { "vddrf", 300000 }, 1719 { "vddch0", 450000 }, 1720 }, 1721 .num_vregs = 4, 1722 }; 1723 1724 static void qca_power_shutdown(struct hci_uart *hu) 1725 { 1726 struct qca_serdev *qcadev; 1727 struct qca_data *qca = hu->priv; 1728 unsigned long flags; 1729 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1730 1731 qcadev = serdev_device_get_drvdata(hu->serdev); 1732 1733 /* From this point we go into power off state. But serial port is 1734 * still open, stop queueing the IBS data and flush all the buffered 1735 * data in skb's. 1736 */ 1737 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 1738 clear_bit(QCA_IBS_ENABLED, &qca->flags); 1739 qca_flush(hu); 1740 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 1741 1742 hu->hdev->hw_error = NULL; 1743 hu->hdev->cmd_timeout = NULL; 1744 1745 /* Non-serdev device usually is powered by external power 1746 * and don't need additional action in driver for power down 1747 */ 1748 if (!hu->serdev) 1749 return; 1750 1751 if (qca_is_wcn399x(soc_type)) { 1752 host_set_baudrate(hu, 2400); 1753 qca_send_power_pulse(hu, false); 1754 qca_regulator_disable(qcadev); 1755 } else if (qcadev->bt_en) { 1756 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1757 } 1758 } 1759 1760 static int qca_power_off(struct hci_dev *hdev) 1761 { 1762 struct hci_uart *hu = hci_get_drvdata(hdev); 1763 struct qca_data *qca = hu->priv; 1764 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1765 1766 /* Stop sending shutdown command if soc crashes. */ 1767 if (qca_is_wcn399x(soc_type) 1768 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 1769 qca_send_pre_shutdown_cmd(hdev); 1770 usleep_range(8000, 10000); 1771 } 1772 1773 qca->memdump_state = QCA_MEMDUMP_IDLE; 1774 qca_power_shutdown(hu); 1775 return 0; 1776 } 1777 1778 static int qca_regulator_enable(struct qca_serdev *qcadev) 1779 { 1780 struct qca_power *power = qcadev->bt_power; 1781 int ret; 1782 1783 /* Already enabled */ 1784 if (power->vregs_on) 1785 return 0; 1786 1787 BT_DBG("enabling %d regulators)", power->num_vregs); 1788 1789 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 1790 if (ret) 1791 return ret; 1792 1793 power->vregs_on = true; 1794 1795 ret = clk_prepare_enable(qcadev->susclk); 1796 if (ret) 1797 qca_regulator_disable(qcadev); 1798 1799 return ret; 1800 } 1801 1802 static void qca_regulator_disable(struct qca_serdev *qcadev) 1803 { 1804 struct qca_power *power; 1805 1806 if (!qcadev) 1807 return; 1808 1809 power = qcadev->bt_power; 1810 1811 /* Already disabled? */ 1812 if (!power->vregs_on) 1813 return; 1814 1815 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 1816 power->vregs_on = false; 1817 1818 clk_disable_unprepare(qcadev->susclk); 1819 } 1820 1821 static int qca_init_regulators(struct qca_power *qca, 1822 const struct qca_vreg *vregs, size_t num_vregs) 1823 { 1824 struct regulator_bulk_data *bulk; 1825 int ret; 1826 int i; 1827 1828 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 1829 if (!bulk) 1830 return -ENOMEM; 1831 1832 for (i = 0; i < num_vregs; i++) 1833 bulk[i].supply = vregs[i].name; 1834 1835 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 1836 if (ret < 0) 1837 return ret; 1838 1839 for (i = 0; i < num_vregs; i++) { 1840 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 1841 if (ret) 1842 return ret; 1843 } 1844 1845 qca->vreg_bulk = bulk; 1846 qca->num_vregs = num_vregs; 1847 1848 return 0; 1849 } 1850 1851 static int qca_serdev_probe(struct serdev_device *serdev) 1852 { 1853 struct qca_serdev *qcadev; 1854 struct hci_dev *hdev; 1855 const struct qca_vreg_data *data; 1856 int err; 1857 bool power_ctrl_enabled = true; 1858 1859 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 1860 if (!qcadev) 1861 return -ENOMEM; 1862 1863 qcadev->serdev_hu.serdev = serdev; 1864 data = device_get_match_data(&serdev->dev); 1865 serdev_device_set_drvdata(serdev, qcadev); 1866 device_property_read_string(&serdev->dev, "firmware-name", 1867 &qcadev->firmware_name); 1868 if (data && qca_is_wcn399x(data->soc_type)) { 1869 qcadev->btsoc_type = data->soc_type; 1870 qcadev->bt_power = devm_kzalloc(&serdev->dev, 1871 sizeof(struct qca_power), 1872 GFP_KERNEL); 1873 if (!qcadev->bt_power) 1874 return -ENOMEM; 1875 1876 qcadev->bt_power->dev = &serdev->dev; 1877 err = qca_init_regulators(qcadev->bt_power, data->vregs, 1878 data->num_vregs); 1879 if (err) { 1880 BT_ERR("Failed to init regulators:%d", err); 1881 return err; 1882 } 1883 1884 qcadev->bt_power->vregs_on = false; 1885 1886 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 1887 if (IS_ERR(qcadev->susclk)) { 1888 dev_err(&serdev->dev, "failed to acquire clk\n"); 1889 return PTR_ERR(qcadev->susclk); 1890 } 1891 1892 device_property_read_u32(&serdev->dev, "max-speed", 1893 &qcadev->oper_speed); 1894 if (!qcadev->oper_speed) 1895 BT_DBG("UART will pick default operating speed"); 1896 1897 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 1898 if (err) { 1899 BT_ERR("wcn3990 serdev registration failed"); 1900 return err; 1901 } 1902 } else { 1903 qcadev->btsoc_type = QCA_ROME; 1904 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 1905 GPIOD_OUT_LOW); 1906 if (!qcadev->bt_en) { 1907 dev_warn(&serdev->dev, "failed to acquire enable gpio\n"); 1908 power_ctrl_enabled = false; 1909 } 1910 1911 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 1912 if (!qcadev->susclk) { 1913 dev_warn(&serdev->dev, "failed to acquire clk\n"); 1914 } else { 1915 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); 1916 if (err) 1917 return err; 1918 1919 err = clk_prepare_enable(qcadev->susclk); 1920 if (err) 1921 return err; 1922 } 1923 1924 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 1925 if (err) { 1926 BT_ERR("Rome serdev registration failed"); 1927 if (qcadev->susclk) 1928 clk_disable_unprepare(qcadev->susclk); 1929 return err; 1930 } 1931 } 1932 1933 if (power_ctrl_enabled) { 1934 hdev = qcadev->serdev_hu.hdev; 1935 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 1936 hdev->shutdown = qca_power_off; 1937 } 1938 1939 return 0; 1940 } 1941 1942 static void qca_serdev_remove(struct serdev_device *serdev) 1943 { 1944 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 1945 1946 if (qca_is_wcn399x(qcadev->btsoc_type)) 1947 qca_power_shutdown(&qcadev->serdev_hu); 1948 else if (qcadev->susclk) 1949 clk_disable_unprepare(qcadev->susclk); 1950 1951 hci_uart_unregister_device(&qcadev->serdev_hu); 1952 } 1953 1954 static int __maybe_unused qca_suspend(struct device *dev) 1955 { 1956 struct hci_dev *hdev = container_of(dev, struct hci_dev, dev); 1957 struct hci_uart *hu = hci_get_drvdata(hdev); 1958 struct qca_data *qca = hu->priv; 1959 unsigned long flags; 1960 int ret = 0; 1961 u8 cmd; 1962 1963 set_bit(QCA_SUSPENDING, &qca->flags); 1964 1965 /* Device is downloading patch or doesn't support in-band sleep. */ 1966 if (!test_bit(QCA_IBS_ENABLED, &qca->flags)) 1967 return 0; 1968 1969 cancel_work_sync(&qca->ws_awake_device); 1970 cancel_work_sync(&qca->ws_awake_rx); 1971 1972 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 1973 flags, SINGLE_DEPTH_NESTING); 1974 1975 switch (qca->tx_ibs_state) { 1976 case HCI_IBS_TX_WAKING: 1977 del_timer(&qca->wake_retrans_timer); 1978 /* Fall through */ 1979 case HCI_IBS_TX_AWAKE: 1980 del_timer(&qca->tx_idle_timer); 1981 1982 serdev_device_write_flush(hu->serdev); 1983 cmd = HCI_IBS_SLEEP_IND; 1984 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1985 1986 if (ret < 0) { 1987 BT_ERR("Failed to send SLEEP to device"); 1988 break; 1989 } 1990 1991 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 1992 qca->ibs_sent_slps++; 1993 1994 qca_wq_serial_tx_clock_vote_off(&qca->ws_tx_vote_off); 1995 break; 1996 1997 case HCI_IBS_TX_ASLEEP: 1998 break; 1999 2000 default: 2001 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2002 ret = -EINVAL; 2003 break; 2004 } 2005 2006 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2007 2008 if (ret < 0) 2009 goto error; 2010 2011 serdev_device_wait_until_sent(hu->serdev, 2012 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2013 2014 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2015 * to sleep, so that the packet does not wake the system later. 2016 */ 2017 2018 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2019 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2020 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2021 2022 if (ret > 0) 2023 return 0; 2024 2025 if (ret == 0) 2026 ret = -ETIMEDOUT; 2027 2028 error: 2029 clear_bit(QCA_SUSPENDING, &qca->flags); 2030 2031 return ret; 2032 } 2033 2034 static int __maybe_unused qca_resume(struct device *dev) 2035 { 2036 struct hci_dev *hdev = container_of(dev, struct hci_dev, dev); 2037 struct hci_uart *hu = hci_get_drvdata(hdev); 2038 struct qca_data *qca = hu->priv; 2039 2040 clear_bit(QCA_SUSPENDING, &qca->flags); 2041 2042 return 0; 2043 } 2044 2045 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2046 2047 static const struct of_device_id qca_bluetooth_of_match[] = { 2048 { .compatible = "qcom,qca6174-bt" }, 2049 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2050 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2051 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2052 { /* sentinel */ } 2053 }; 2054 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2055 2056 static struct serdev_device_driver qca_serdev_driver = { 2057 .probe = qca_serdev_probe, 2058 .remove = qca_serdev_remove, 2059 .driver = { 2060 .name = "hci_uart_qca", 2061 .of_match_table = qca_bluetooth_of_match, 2062 .pm = &qca_pm_ops, 2063 }, 2064 }; 2065 2066 int __init qca_init(void) 2067 { 2068 serdev_device_driver_register(&qca_serdev_driver); 2069 2070 return hci_uart_register_proto(&qca_proto); 2071 } 2072 2073 int __exit qca_deinit(void) 2074 { 2075 serdev_device_driver_unregister(&qca_serdev_driver); 2076 2077 return hci_uart_unregister_proto(&qca_proto); 2078 } 2079