1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by 4 * Traverse Technologies -- https://www.traverse.com.au/ 5 * Xrio Limited -- http://www.xrio.com/ 6 * 7 * Copyright © 2008 Traverse Technologies 8 * Copyright © 2008 Intel Corporation 9 * 10 * Authors: Nathan Williams <nathan@traverse.com.au> 11 * David Woodhouse <dwmw2@infradead.org> 12 * Treker Chen <treker@xrio.com> 13 */ 14 15 #define DEBUG 16 #define VERBOSE_DEBUG 17 18 #include <linux/interrupt.h> 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/errno.h> 22 #include <linux/ioport.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/atm.h> 26 #include <linux/atmdev.h> 27 #include <linux/skbuff.h> 28 #include <linux/sysfs.h> 29 #include <linux/device.h> 30 #include <linux/kobject.h> 31 #include <linux/firmware.h> 32 #include <linux/ctype.h> 33 #include <linux/swab.h> 34 #include <linux/slab.h> 35 36 #define VERSION "1.04" 37 #define DRIVER_VERSION 0x01 38 #define PTAG "solos-pci" 39 40 #define CONFIG_RAM_SIZE 128 41 #define FLAGS_ADDR 0x7C 42 #define IRQ_EN_ADDR 0x78 43 #define FPGA_VER 0x74 44 #define IRQ_CLEAR 0x70 45 #define WRITE_FLASH 0x6C 46 #define PORTS 0x68 47 #define FLASH_BLOCK 0x64 48 #define FLASH_BUSY 0x60 49 #define FPGA_MODE 0x5C 50 #define FLASH_MODE 0x58 51 #define GPIO_STATUS 0x54 52 #define DRIVER_VER 0x50 53 #define TX_DMA_ADDR(port) (0x40 + (4 * (port))) 54 #define RX_DMA_ADDR(port) (0x30 + (4 * (port))) 55 56 #define DATA_RAM_SIZE 32768 57 #define BUF_SIZE 2048 58 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/ 59 /* Old boards use ATMEL AD45DB161D flash */ 60 #define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/ 61 #define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/ 62 #define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/ 63 #define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/ 64 /* Current boards use M25P/M25PE SPI flash */ 65 #define SPI_FLASH_BLOCK (256 * 64) 66 67 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2) 68 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size)) 69 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2) 70 71 #define RX_DMA_SIZE 2048 72 73 #define FPGA_VERSION(a,b) (((a) << 8) + (b)) 74 #define LEGACY_BUFFERS 2 75 #define DMA_SUPPORTED 4 76 77 static int reset = 0; 78 static int atmdebug = 0; 79 static int firmware_upgrade = 0; 80 static int fpga_upgrade = 0; 81 static int db_firmware_upgrade = 0; 82 static int db_fpga_upgrade = 0; 83 84 struct pkt_hdr { 85 __le16 size; 86 __le16 vpi; 87 __le16 vci; 88 __le16 type; 89 }; 90 91 struct solos_skb_cb { 92 struct atm_vcc *vcc; 93 uint32_t dma_addr; 94 }; 95 96 97 #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb) 98 99 #define PKT_DATA 0 100 #define PKT_COMMAND 1 101 #define PKT_POPEN 3 102 #define PKT_PCLOSE 4 103 #define PKT_STATUS 5 104 105 struct solos_card { 106 void __iomem *config_regs; 107 void __iomem *buffers; 108 int nr_ports; 109 int tx_mask; 110 struct pci_dev *dev; 111 struct atm_dev *atmdev[4]; 112 struct tasklet_struct tlet; 113 spinlock_t tx_lock; 114 spinlock_t tx_queue_lock; 115 spinlock_t cli_queue_lock; 116 spinlock_t param_queue_lock; 117 struct list_head param_queue; 118 struct sk_buff_head tx_queue[4]; 119 struct sk_buff_head cli_queue[4]; 120 struct sk_buff *tx_skb[4]; 121 struct sk_buff *rx_skb[4]; 122 unsigned char *dma_bounce; 123 wait_queue_head_t param_wq; 124 wait_queue_head_t fw_wq; 125 int using_dma; 126 int dma_alignment; 127 int fpga_version; 128 int buffer_size; 129 int atmel_flash; 130 }; 131 132 133 struct solos_param { 134 struct list_head list; 135 pid_t pid; 136 int port; 137 struct sk_buff *response; 138 }; 139 140 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data) 141 142 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>"); 143 MODULE_DESCRIPTION("Solos PCI driver"); 144 MODULE_VERSION(VERSION); 145 MODULE_LICENSE("GPL"); 146 MODULE_FIRMWARE("solos-FPGA.bin"); 147 MODULE_FIRMWARE("solos-Firmware.bin"); 148 MODULE_FIRMWARE("solos-db-FPGA.bin"); 149 MODULE_PARM_DESC(reset, "Reset Solos chips on startup"); 150 MODULE_PARM_DESC(atmdebug, "Print ATM data"); 151 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade"); 152 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade"); 153 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade"); 154 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade"); 155 module_param(reset, int, 0444); 156 module_param(atmdebug, int, 0644); 157 module_param(firmware_upgrade, int, 0444); 158 module_param(fpga_upgrade, int, 0444); 159 module_param(db_firmware_upgrade, int, 0444); 160 module_param(db_fpga_upgrade, int, 0444); 161 162 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 163 struct atm_vcc *vcc); 164 static uint32_t fpga_tx(struct solos_card *); 165 static irqreturn_t solos_irq(int irq, void *dev_id); 166 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci); 167 static int atm_init(struct solos_card *, struct device *); 168 static void atm_remove(struct solos_card *); 169 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size); 170 static void solos_bh(unsigned long); 171 static int print_buffer(struct sk_buff *buf); 172 173 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb) 174 { 175 if (vcc->pop) 176 vcc->pop(vcc, skb); 177 else 178 dev_kfree_skb_any(skb); 179 } 180 181 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr, 182 char *buf) 183 { 184 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 185 struct solos_card *card = atmdev->dev_data; 186 struct solos_param prm; 187 struct sk_buff *skb; 188 struct pkt_hdr *header; 189 int buflen; 190 191 buflen = strlen(attr->attr.name) + 10; 192 193 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 194 if (!skb) { 195 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n"); 196 return -ENOMEM; 197 } 198 199 header = skb_put(skb, sizeof(*header)); 200 201 buflen = snprintf((void *)&header[1], buflen - 1, 202 "L%05d\n%s\n", current->pid, attr->attr.name); 203 skb_put(skb, buflen); 204 205 header->size = cpu_to_le16(buflen); 206 header->vpi = cpu_to_le16(0); 207 header->vci = cpu_to_le16(0); 208 header->type = cpu_to_le16(PKT_COMMAND); 209 210 prm.pid = current->pid; 211 prm.response = NULL; 212 prm.port = SOLOS_CHAN(atmdev); 213 214 spin_lock_irq(&card->param_queue_lock); 215 list_add(&prm.list, &card->param_queue); 216 spin_unlock_irq(&card->param_queue_lock); 217 218 fpga_queue(card, prm.port, skb, NULL); 219 220 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 221 222 spin_lock_irq(&card->param_queue_lock); 223 list_del(&prm.list); 224 spin_unlock_irq(&card->param_queue_lock); 225 226 if (!prm.response) 227 return -EIO; 228 229 buflen = prm.response->len; 230 memcpy(buf, prm.response->data, buflen); 231 kfree_skb(prm.response); 232 233 return buflen; 234 } 235 236 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr, 237 const char *buf, size_t count) 238 { 239 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 240 struct solos_card *card = atmdev->dev_data; 241 struct solos_param prm; 242 struct sk_buff *skb; 243 struct pkt_hdr *header; 244 int buflen; 245 ssize_t ret; 246 247 buflen = strlen(attr->attr.name) + 11 + count; 248 249 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 250 if (!skb) { 251 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n"); 252 return -ENOMEM; 253 } 254 255 header = skb_put(skb, sizeof(*header)); 256 257 buflen = snprintf((void *)&header[1], buflen - 1, 258 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf); 259 260 skb_put(skb, buflen); 261 header->size = cpu_to_le16(buflen); 262 header->vpi = cpu_to_le16(0); 263 header->vci = cpu_to_le16(0); 264 header->type = cpu_to_le16(PKT_COMMAND); 265 266 prm.pid = current->pid; 267 prm.response = NULL; 268 prm.port = SOLOS_CHAN(atmdev); 269 270 spin_lock_irq(&card->param_queue_lock); 271 list_add(&prm.list, &card->param_queue); 272 spin_unlock_irq(&card->param_queue_lock); 273 274 fpga_queue(card, prm.port, skb, NULL); 275 276 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 277 278 spin_lock_irq(&card->param_queue_lock); 279 list_del(&prm.list); 280 spin_unlock_irq(&card->param_queue_lock); 281 282 skb = prm.response; 283 284 if (!skb) 285 return -EIO; 286 287 buflen = skb->len; 288 289 /* Sometimes it has a newline, sometimes it doesn't. */ 290 if (skb->data[buflen - 1] == '\n') 291 buflen--; 292 293 if (buflen == 2 && !strncmp(skb->data, "OK", 2)) 294 ret = count; 295 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5)) 296 ret = -EIO; 297 else { 298 /* We know we have enough space allocated for this; we allocated 299 it ourselves */ 300 skb->data[buflen] = 0; 301 302 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n", 303 skb->data); 304 ret = -EIO; 305 } 306 kfree_skb(skb); 307 308 return ret; 309 } 310 311 static char *next_string(struct sk_buff *skb) 312 { 313 int i = 0; 314 char *this = skb->data; 315 316 for (i = 0; i < skb->len; i++) { 317 if (this[i] == '\n') { 318 this[i] = 0; 319 skb_pull(skb, i + 1); 320 return this; 321 } 322 if (!isprint(this[i])) 323 return NULL; 324 } 325 return NULL; 326 } 327 328 /* 329 * Status packet has fields separated by \n, starting with a version number 330 * for the information therein. Fields are.... 331 * 332 * packet version 333 * RxBitRate (version >= 1) 334 * TxBitRate (version >= 1) 335 * State (version >= 1) 336 * LocalSNRMargin (version >= 1) 337 * LocalLineAttn (version >= 1) 338 */ 339 static int process_status(struct solos_card *card, int port, struct sk_buff *skb) 340 { 341 char *str, *state_str, *snr, *attn; 342 int ver, rate_up, rate_down, err; 343 344 if (!card->atmdev[port]) 345 return -ENODEV; 346 347 str = next_string(skb); 348 if (!str) 349 return -EIO; 350 351 err = kstrtoint(str, 10, &ver); 352 if (err) { 353 dev_warn(&card->dev->dev, "Unexpected status interrupt version\n"); 354 return err; 355 } 356 if (ver < 1) { 357 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n", 358 ver); 359 return -EIO; 360 } 361 362 str = next_string(skb); 363 if (!str) 364 return -EIO; 365 if (!strcmp(str, "ERROR")) { 366 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n", 367 port); 368 return 0; 369 } 370 371 err = kstrtoint(str, 10, &rate_down); 372 if (err) 373 return err; 374 375 str = next_string(skb); 376 if (!str) 377 return -EIO; 378 err = kstrtoint(str, 10, &rate_up); 379 if (err) 380 return err; 381 382 state_str = next_string(skb); 383 if (!state_str) 384 return -EIO; 385 386 /* Anything but 'Showtime' is down */ 387 if (strcmp(state_str, "Showtime")) { 388 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST); 389 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str); 390 return 0; 391 } 392 393 snr = next_string(skb); 394 if (!snr) 395 return -EIO; 396 attn = next_string(skb); 397 if (!attn) 398 return -EIO; 399 400 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n", 401 port, state_str, rate_down/1000, rate_up/1000, 402 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn); 403 404 card->atmdev[port]->link_rate = rate_down / 424; 405 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND); 406 407 return 0; 408 } 409 410 static int process_command(struct solos_card *card, int port, struct sk_buff *skb) 411 { 412 struct solos_param *prm; 413 unsigned long flags; 414 int cmdpid; 415 int found = 0, err; 416 417 if (skb->len < 7) 418 return 0; 419 420 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) || 421 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) || 422 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) || 423 skb->data[6] != '\n') 424 return 0; 425 426 err = kstrtoint(&skb->data[1], 10, &cmdpid); 427 if (err) 428 return err; 429 430 spin_lock_irqsave(&card->param_queue_lock, flags); 431 list_for_each_entry(prm, &card->param_queue, list) { 432 if (prm->port == port && prm->pid == cmdpid) { 433 prm->response = skb; 434 skb_pull(skb, 7); 435 wake_up(&card->param_wq); 436 found = 1; 437 break; 438 } 439 } 440 spin_unlock_irqrestore(&card->param_queue_lock, flags); 441 return found; 442 } 443 444 static ssize_t console_show(struct device *dev, struct device_attribute *attr, 445 char *buf) 446 { 447 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 448 struct solos_card *card = atmdev->dev_data; 449 struct sk_buff *skb; 450 unsigned int len; 451 452 spin_lock_bh(&card->cli_queue_lock); 453 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); 454 spin_unlock_bh(&card->cli_queue_lock); 455 if(skb == NULL) 456 return sprintf(buf, "No data.\n"); 457 458 len = skb->len; 459 memcpy(buf, skb->data, len); 460 461 kfree_skb(skb); 462 return len; 463 } 464 465 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) 466 { 467 struct sk_buff *skb; 468 struct pkt_hdr *header; 469 470 if (size > (BUF_SIZE - sizeof(*header))) { 471 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n"); 472 return 0; 473 } 474 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC); 475 if (!skb) { 476 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n"); 477 return 0; 478 } 479 480 header = skb_put(skb, sizeof(*header)); 481 482 header->size = cpu_to_le16(size); 483 header->vpi = cpu_to_le16(0); 484 header->vci = cpu_to_le16(0); 485 header->type = cpu_to_le16(PKT_COMMAND); 486 487 skb_put_data(skb, buf, size); 488 489 fpga_queue(card, dev, skb, NULL); 490 491 return 0; 492 } 493 494 static ssize_t console_store(struct device *dev, struct device_attribute *attr, 495 const char *buf, size_t count) 496 { 497 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 498 struct solos_card *card = atmdev->dev_data; 499 int err; 500 501 err = send_command(card, SOLOS_CHAN(atmdev), buf, count); 502 503 return err?:count; 504 } 505 506 struct geos_gpio_attr { 507 struct device_attribute attr; 508 int offset; 509 }; 510 511 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \ 512 struct geos_gpio_attr gpio_attr_##_name = { \ 513 .attr = __ATTR(_name, _mode, _show, _store), \ 514 .offset = _offset } 515 516 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr, 517 const char *buf, size_t count) 518 { 519 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 520 struct solos_card *card = dev_get_drvdata(dev); 521 uint32_t data32; 522 523 if (count != 1 && (count != 2 || buf[1] != '\n')) 524 return -EINVAL; 525 526 spin_lock_irq(&card->param_queue_lock); 527 data32 = ioread32(card->config_regs + GPIO_STATUS); 528 if (buf[0] == '1') { 529 data32 |= 1 << gattr->offset; 530 iowrite32(data32, card->config_regs + GPIO_STATUS); 531 } else if (buf[0] == '0') { 532 data32 &= ~(1 << gattr->offset); 533 iowrite32(data32, card->config_regs + GPIO_STATUS); 534 } else { 535 count = -EINVAL; 536 } 537 spin_unlock_irq(&card->param_queue_lock); 538 return count; 539 } 540 541 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr, 542 char *buf) 543 { 544 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 545 struct solos_card *card = dev_get_drvdata(dev); 546 uint32_t data32; 547 548 data32 = ioread32(card->config_regs + GPIO_STATUS); 549 data32 = (data32 >> gattr->offset) & 1; 550 551 return sprintf(buf, "%d\n", data32); 552 } 553 554 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr, 555 char *buf) 556 { 557 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 558 struct solos_card *card = dev_get_drvdata(dev); 559 uint32_t data32; 560 561 data32 = ioread32(card->config_regs + GPIO_STATUS); 562 switch (gattr->offset) { 563 case 0: 564 /* HardwareVersion */ 565 data32 = data32 & 0x1F; 566 break; 567 case 1: 568 /* HardwareVariant */ 569 data32 = (data32 >> 5) & 0x0F; 570 break; 571 } 572 return sprintf(buf, "%d\n", data32); 573 } 574 575 static DEVICE_ATTR_RW(console); 576 577 578 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL); 579 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store); 580 581 #include "solos-attrlist.c" 582 583 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9); 584 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10); 585 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11); 586 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12); 587 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13); 588 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14); 589 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0); 590 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1); 591 #undef SOLOS_ATTR_RO 592 #undef SOLOS_ATTR_RW 593 594 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr, 595 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr, 596 597 static struct attribute *solos_attrs[] = { 598 #include "solos-attrlist.c" 599 NULL 600 }; 601 602 static const struct attribute_group solos_attr_group = { 603 .attrs = solos_attrs, 604 .name = "parameters", 605 }; 606 607 static struct attribute *gpio_attrs[] = { 608 &gpio_attr_GPIO1.attr.attr, 609 &gpio_attr_GPIO2.attr.attr, 610 &gpio_attr_GPIO3.attr.attr, 611 &gpio_attr_GPIO4.attr.attr, 612 &gpio_attr_GPIO5.attr.attr, 613 &gpio_attr_PushButton.attr.attr, 614 &gpio_attr_HardwareVersion.attr.attr, 615 &gpio_attr_HardwareVariant.attr.attr, 616 NULL 617 }; 618 619 static const struct attribute_group gpio_attr_group = { 620 .attrs = gpio_attrs, 621 .name = "gpio", 622 }; 623 624 static int flash_upgrade(struct solos_card *card, int chip) 625 { 626 const struct firmware *fw; 627 const char *fw_name; 628 int blocksize = 0; 629 int numblocks = 0; 630 int offset; 631 632 switch (chip) { 633 case 0: 634 fw_name = "solos-FPGA.bin"; 635 if (card->atmel_flash) 636 blocksize = ATMEL_FPGA_BLOCK; 637 else 638 blocksize = SPI_FLASH_BLOCK; 639 break; 640 case 1: 641 fw_name = "solos-Firmware.bin"; 642 if (card->atmel_flash) 643 blocksize = ATMEL_SOLOS_BLOCK; 644 else 645 blocksize = SPI_FLASH_BLOCK; 646 break; 647 case 2: 648 if (card->fpga_version > LEGACY_BUFFERS){ 649 fw_name = "solos-db-FPGA.bin"; 650 if (card->atmel_flash) 651 blocksize = ATMEL_FPGA_BLOCK; 652 else 653 blocksize = SPI_FLASH_BLOCK; 654 } else { 655 dev_info(&card->dev->dev, "FPGA version doesn't support" 656 " daughter board upgrades\n"); 657 return -EPERM; 658 } 659 break; 660 case 3: 661 if (card->fpga_version > LEGACY_BUFFERS){ 662 fw_name = "solos-Firmware.bin"; 663 if (card->atmel_flash) 664 blocksize = ATMEL_SOLOS_BLOCK; 665 else 666 blocksize = SPI_FLASH_BLOCK; 667 } else { 668 dev_info(&card->dev->dev, "FPGA version doesn't support" 669 " daughter board upgrades\n"); 670 return -EPERM; 671 } 672 break; 673 default: 674 return -ENODEV; 675 } 676 677 if (request_firmware(&fw, fw_name, &card->dev->dev)) 678 return -ENOENT; 679 680 dev_info(&card->dev->dev, "Flash upgrade starting\n"); 681 682 /* New FPGAs require driver version before permitting flash upgrades */ 683 iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER); 684 685 numblocks = fw->size / blocksize; 686 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size); 687 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks); 688 689 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n"); 690 iowrite32(1, card->config_regs + FPGA_MODE); 691 (void) ioread32(card->config_regs + FPGA_MODE); 692 693 /* Set mode to Chip Erase */ 694 if(chip == 0 || chip == 2) 695 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n"); 696 if(chip == 1 || chip == 3) 697 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n"); 698 iowrite32((chip * 2), card->config_regs + FLASH_MODE); 699 700 701 iowrite32(1, card->config_regs + WRITE_FLASH); 702 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 703 704 for (offset = 0; offset < fw->size; offset += blocksize) { 705 int i; 706 707 /* Clear write flag */ 708 iowrite32(0, card->config_regs + WRITE_FLASH); 709 710 /* Set mode to Block Write */ 711 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */ 712 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE); 713 714 /* Copy block to buffer, swapping each 16 bits for Atmel flash */ 715 for(i = 0; i < blocksize; i += 4) { 716 uint32_t word; 717 if (card->atmel_flash) 718 word = swahb32p((uint32_t *)(fw->data + offset + i)); 719 else 720 word = *(uint32_t *)(fw->data + offset + i); 721 if(card->fpga_version > LEGACY_BUFFERS) 722 iowrite32(word, FLASH_BUF + i); 723 else 724 iowrite32(word, RX_BUF(card, 3) + i); 725 } 726 727 /* Specify block number and then trigger flash write */ 728 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK); 729 iowrite32(1, card->config_regs + WRITE_FLASH); 730 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 731 } 732 733 release_firmware(fw); 734 iowrite32(0, card->config_regs + WRITE_FLASH); 735 iowrite32(0, card->config_regs + FPGA_MODE); 736 iowrite32(0, card->config_regs + FLASH_MODE); 737 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n"); 738 return 0; 739 } 740 741 static irqreturn_t solos_irq(int irq, void *dev_id) 742 { 743 struct solos_card *card = dev_id; 744 int handled = 1; 745 746 iowrite32(0, card->config_regs + IRQ_CLEAR); 747 748 /* If we're up and running, just kick the tasklet to process TX/RX */ 749 if (card->atmdev[0]) 750 tasklet_schedule(&card->tlet); 751 else 752 wake_up(&card->fw_wq); 753 754 return IRQ_RETVAL(handled); 755 } 756 757 static void solos_bh(unsigned long card_arg) 758 { 759 struct solos_card *card = (void *)card_arg; 760 uint32_t card_flags; 761 uint32_t rx_done = 0; 762 int port; 763 764 /* 765 * Since fpga_tx() is going to need to read the flags under its lock, 766 * it can return them to us so that we don't have to hit PCI MMIO 767 * again for the same information 768 */ 769 card_flags = fpga_tx(card); 770 771 for (port = 0; port < card->nr_ports; port++) { 772 if (card_flags & (0x10 << port)) { 773 struct pkt_hdr _hdr, *header; 774 struct sk_buff *skb; 775 struct atm_vcc *vcc; 776 int size; 777 778 if (card->using_dma) { 779 skb = card->rx_skb[port]; 780 card->rx_skb[port] = NULL; 781 782 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 783 RX_DMA_SIZE, DMA_FROM_DEVICE); 784 785 header = (void *)skb->data; 786 size = le16_to_cpu(header->size); 787 skb_put(skb, size + sizeof(*header)); 788 skb_pull(skb, sizeof(*header)); 789 } else { 790 header = &_hdr; 791 792 rx_done |= 0x10 << port; 793 794 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header)); 795 796 size = le16_to_cpu(header->size); 797 if (size > (card->buffer_size - sizeof(*header))){ 798 dev_warn(&card->dev->dev, "Invalid buffer size\n"); 799 continue; 800 } 801 802 /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of 803 * headroom, and ensures we can route packets back out an 804 * Ethernet interface (for example) without having to 805 * reallocate. Adding NET_IP_ALIGN also ensures that both 806 * PPPoATM and PPPoEoBR2684 packets end up aligned. */ 807 skb = netdev_alloc_skb_ip_align(NULL, size + 1); 808 if (!skb) { 809 if (net_ratelimit()) 810 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n"); 811 continue; 812 } 813 814 memcpy_fromio(skb_put(skb, size), 815 RX_BUF(card, port) + sizeof(*header), 816 size); 817 } 818 if (atmdebug) { 819 dev_info(&card->dev->dev, "Received: port %d\n", port); 820 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 821 size, le16_to_cpu(header->vpi), 822 le16_to_cpu(header->vci)); 823 print_buffer(skb); 824 } 825 826 switch (le16_to_cpu(header->type)) { 827 case PKT_DATA: 828 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi), 829 le16_to_cpu(header->vci)); 830 if (!vcc) { 831 if (net_ratelimit()) 832 dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n", 833 le16_to_cpu(header->vpi), le16_to_cpu(header->vci), 834 port); 835 dev_kfree_skb_any(skb); 836 break; 837 } 838 atm_charge(vcc, skb->truesize); 839 vcc->push(vcc, skb); 840 atomic_inc(&vcc->stats->rx); 841 break; 842 843 case PKT_STATUS: 844 if (process_status(card, port, skb) && 845 net_ratelimit()) { 846 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port); 847 print_buffer(skb); 848 } 849 dev_kfree_skb_any(skb); 850 break; 851 852 case PKT_COMMAND: 853 default: /* FIXME: Not really, surely? */ 854 if (process_command(card, port, skb)) 855 break; 856 spin_lock(&card->cli_queue_lock); 857 if (skb_queue_len(&card->cli_queue[port]) > 10) { 858 if (net_ratelimit()) 859 dev_warn(&card->dev->dev, "Dropping console response on port %d\n", 860 port); 861 dev_kfree_skb_any(skb); 862 } else 863 skb_queue_tail(&card->cli_queue[port], skb); 864 spin_unlock(&card->cli_queue_lock); 865 break; 866 } 867 } 868 /* Allocate RX skbs for any ports which need them */ 869 if (card->using_dma && card->atmdev[port] && 870 !card->rx_skb[port]) { 871 /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN 872 * here; the FPGA can only DMA to addresses which are 873 * aligned to 4 bytes. */ 874 struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE); 875 if (skb) { 876 SKB_CB(skb)->dma_addr = 877 dma_map_single(&card->dev->dev, skb->data, 878 RX_DMA_SIZE, DMA_FROM_DEVICE); 879 iowrite32(SKB_CB(skb)->dma_addr, 880 card->config_regs + RX_DMA_ADDR(port)); 881 card->rx_skb[port] = skb; 882 } else { 883 if (net_ratelimit()) 884 dev_warn(&card->dev->dev, "Failed to allocate RX skb"); 885 886 /* We'll have to try again later */ 887 tasklet_schedule(&card->tlet); 888 } 889 } 890 } 891 if (rx_done) 892 iowrite32(rx_done, card->config_regs + FLAGS_ADDR); 893 894 return; 895 } 896 897 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci) 898 { 899 struct hlist_head *head; 900 struct atm_vcc *vcc = NULL; 901 struct sock *s; 902 903 read_lock(&vcc_sklist_lock); 904 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)]; 905 sk_for_each(s, head) { 906 vcc = atm_sk(s); 907 if (vcc->dev == dev && vcc->vci == vci && 908 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE && 909 test_bit(ATM_VF_READY, &vcc->flags)) 910 goto out; 911 } 912 vcc = NULL; 913 out: 914 read_unlock(&vcc_sklist_lock); 915 return vcc; 916 } 917 918 static int popen(struct atm_vcc *vcc) 919 { 920 struct solos_card *card = vcc->dev->dev_data; 921 struct sk_buff *skb; 922 struct pkt_hdr *header; 923 924 if (vcc->qos.aal != ATM_AAL5) { 925 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n", 926 vcc->qos.aal); 927 return -EINVAL; 928 } 929 930 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 931 if (!skb) { 932 if (net_ratelimit()) 933 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); 934 return -ENOMEM; 935 } 936 header = skb_put(skb, sizeof(*header)); 937 938 header->size = cpu_to_le16(0); 939 header->vpi = cpu_to_le16(vcc->vpi); 940 header->vci = cpu_to_le16(vcc->vci); 941 header->type = cpu_to_le16(PKT_POPEN); 942 943 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL); 944 945 set_bit(ATM_VF_ADDR, &vcc->flags); 946 set_bit(ATM_VF_READY, &vcc->flags); 947 948 return 0; 949 } 950 951 static void pclose(struct atm_vcc *vcc) 952 { 953 struct solos_card *card = vcc->dev->dev_data; 954 unsigned char port = SOLOS_CHAN(vcc->dev); 955 struct sk_buff *skb, *tmpskb; 956 struct pkt_hdr *header; 957 958 /* Remove any yet-to-be-transmitted packets from the pending queue */ 959 spin_lock_bh(&card->tx_queue_lock); 960 skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) { 961 if (SKB_CB(skb)->vcc == vcc) { 962 skb_unlink(skb, &card->tx_queue[port]); 963 solos_pop(vcc, skb); 964 } 965 } 966 spin_unlock_bh(&card->tx_queue_lock); 967 968 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 969 if (!skb) { 970 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n"); 971 return; 972 } 973 header = skb_put(skb, sizeof(*header)); 974 975 header->size = cpu_to_le16(0); 976 header->vpi = cpu_to_le16(vcc->vpi); 977 header->vci = cpu_to_le16(vcc->vci); 978 header->type = cpu_to_le16(PKT_PCLOSE); 979 980 skb_get(skb); 981 fpga_queue(card, port, skb, NULL); 982 983 if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ)) 984 dev_warn(&card->dev->dev, 985 "Timeout waiting for VCC close on port %d\n", port); 986 987 dev_kfree_skb(skb); 988 989 /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the 990 tasklet has finished processing any incoming packets (and, more to 991 the point, using the vcc pointer). */ 992 tasklet_unlock_wait(&card->tlet); 993 994 clear_bit(ATM_VF_ADDR, &vcc->flags); 995 996 return; 997 } 998 999 static int print_buffer(struct sk_buff *buf) 1000 { 1001 int len,i; 1002 char msg[500]; 1003 char item[10]; 1004 1005 len = buf->len; 1006 for (i = 0; i < len; i++){ 1007 if(i % 8 == 0) 1008 sprintf(msg, "%02X: ", i); 1009 1010 sprintf(item,"%02X ",*(buf->data + i)); 1011 strcat(msg, item); 1012 if(i % 8 == 7) { 1013 sprintf(item, "\n"); 1014 strcat(msg, item); 1015 printk(KERN_DEBUG "%s", msg); 1016 } 1017 } 1018 if (i % 8 != 0) { 1019 sprintf(item, "\n"); 1020 strcat(msg, item); 1021 printk(KERN_DEBUG "%s", msg); 1022 } 1023 printk(KERN_DEBUG "\n"); 1024 1025 return 0; 1026 } 1027 1028 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 1029 struct atm_vcc *vcc) 1030 { 1031 int old_len; 1032 unsigned long flags; 1033 1034 SKB_CB(skb)->vcc = vcc; 1035 1036 spin_lock_irqsave(&card->tx_queue_lock, flags); 1037 old_len = skb_queue_len(&card->tx_queue[port]); 1038 skb_queue_tail(&card->tx_queue[port], skb); 1039 if (!old_len) 1040 card->tx_mask |= (1 << port); 1041 spin_unlock_irqrestore(&card->tx_queue_lock, flags); 1042 1043 /* Theoretically we could just schedule the tasklet here, but 1044 that introduces latency we don't want -- it's noticeable */ 1045 if (!old_len) 1046 fpga_tx(card); 1047 } 1048 1049 static uint32_t fpga_tx(struct solos_card *card) 1050 { 1051 uint32_t tx_pending, card_flags; 1052 uint32_t tx_started = 0; 1053 struct sk_buff *skb; 1054 struct atm_vcc *vcc; 1055 unsigned char port; 1056 unsigned long flags; 1057 1058 spin_lock_irqsave(&card->tx_lock, flags); 1059 1060 card_flags = ioread32(card->config_regs + FLAGS_ADDR); 1061 /* 1062 * The queue lock is required for _writing_ to tx_mask, but we're 1063 * OK to read it here without locking. The only potential update 1064 * that we could race with is in fpga_queue() where it sets a bit 1065 * for a new port... but it's going to call this function again if 1066 * it's doing that, anyway. 1067 */ 1068 tx_pending = card->tx_mask & ~card_flags; 1069 1070 for (port = 0; tx_pending; tx_pending >>= 1, port++) { 1071 if (tx_pending & 1) { 1072 struct sk_buff *oldskb = card->tx_skb[port]; 1073 if (oldskb) { 1074 dma_unmap_single(&card->dev->dev, SKB_CB(oldskb)->dma_addr, 1075 oldskb->len, DMA_TO_DEVICE); 1076 card->tx_skb[port] = NULL; 1077 } 1078 spin_lock(&card->tx_queue_lock); 1079 skb = skb_dequeue(&card->tx_queue[port]); 1080 if (!skb) 1081 card->tx_mask &= ~(1 << port); 1082 spin_unlock(&card->tx_queue_lock); 1083 1084 if (skb && !card->using_dma) { 1085 memcpy_toio(TX_BUF(card, port), skb->data, skb->len); 1086 tx_started |= 1 << port; 1087 oldskb = skb; /* We're done with this skb already */ 1088 } else if (skb && card->using_dma) { 1089 unsigned char *data = skb->data; 1090 if ((unsigned long)data & card->dma_alignment) { 1091 data = card->dma_bounce + (BUF_SIZE * port); 1092 memcpy(data, skb->data, skb->len); 1093 } 1094 SKB_CB(skb)->dma_addr = dma_map_single(&card->dev->dev, data, 1095 skb->len, DMA_TO_DEVICE); 1096 card->tx_skb[port] = skb; 1097 iowrite32(SKB_CB(skb)->dma_addr, 1098 card->config_regs + TX_DMA_ADDR(port)); 1099 } 1100 1101 if (!oldskb) 1102 continue; 1103 1104 /* Clean up and free oldskb now it's gone */ 1105 if (atmdebug) { 1106 struct pkt_hdr *header = (void *)oldskb->data; 1107 int size = le16_to_cpu(header->size); 1108 1109 skb_pull(oldskb, sizeof(*header)); 1110 dev_info(&card->dev->dev, "Transmitted: port %d\n", 1111 port); 1112 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 1113 size, le16_to_cpu(header->vpi), 1114 le16_to_cpu(header->vci)); 1115 print_buffer(oldskb); 1116 } 1117 1118 vcc = SKB_CB(oldskb)->vcc; 1119 1120 if (vcc) { 1121 atomic_inc(&vcc->stats->tx); 1122 solos_pop(vcc, oldskb); 1123 } else { 1124 dev_kfree_skb_irq(oldskb); 1125 wake_up(&card->param_wq); 1126 } 1127 } 1128 } 1129 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */ 1130 if (tx_started) 1131 iowrite32(tx_started, card->config_regs + FLAGS_ADDR); 1132 1133 spin_unlock_irqrestore(&card->tx_lock, flags); 1134 return card_flags; 1135 } 1136 1137 static int psend(struct atm_vcc *vcc, struct sk_buff *skb) 1138 { 1139 struct solos_card *card = vcc->dev->dev_data; 1140 struct pkt_hdr *header; 1141 int pktlen; 1142 1143 pktlen = skb->len; 1144 if (pktlen > (BUF_SIZE - sizeof(*header))) { 1145 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n"); 1146 solos_pop(vcc, skb); 1147 return 0; 1148 } 1149 1150 if (!skb_clone_writable(skb, sizeof(*header))) { 1151 int expand_by = 0; 1152 int ret; 1153 1154 if (skb_headroom(skb) < sizeof(*header)) 1155 expand_by = sizeof(*header) - skb_headroom(skb); 1156 1157 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC); 1158 if (ret) { 1159 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n"); 1160 solos_pop(vcc, skb); 1161 return ret; 1162 } 1163 } 1164 1165 header = skb_push(skb, sizeof(*header)); 1166 1167 /* This does _not_ include the size of the header */ 1168 header->size = cpu_to_le16(pktlen); 1169 header->vpi = cpu_to_le16(vcc->vpi); 1170 header->vci = cpu_to_le16(vcc->vci); 1171 header->type = cpu_to_le16(PKT_DATA); 1172 1173 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc); 1174 1175 return 0; 1176 } 1177 1178 static const struct atmdev_ops fpga_ops = { 1179 .open = popen, 1180 .close = pclose, 1181 .ioctl = NULL, 1182 .send = psend, 1183 .send_oam = NULL, 1184 .phy_put = NULL, 1185 .phy_get = NULL, 1186 .change_qos = NULL, 1187 .proc_read = NULL, 1188 .owner = THIS_MODULE 1189 }; 1190 1191 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) 1192 { 1193 int err; 1194 uint16_t fpga_ver; 1195 uint8_t major_ver, minor_ver; 1196 uint32_t data32; 1197 struct solos_card *card; 1198 1199 card = kzalloc(sizeof(*card), GFP_KERNEL); 1200 if (!card) 1201 return -ENOMEM; 1202 1203 card->dev = dev; 1204 init_waitqueue_head(&card->fw_wq); 1205 init_waitqueue_head(&card->param_wq); 1206 1207 err = pci_enable_device(dev); 1208 if (err) { 1209 dev_warn(&dev->dev, "Failed to enable PCI device\n"); 1210 goto out; 1211 } 1212 1213 err = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); 1214 if (err) { 1215 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n"); 1216 goto out; 1217 } 1218 1219 err = pci_request_regions(dev, "solos"); 1220 if (err) { 1221 dev_warn(&dev->dev, "Failed to request regions\n"); 1222 goto out; 1223 } 1224 1225 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE); 1226 if (!card->config_regs) { 1227 dev_warn(&dev->dev, "Failed to ioremap config registers\n"); 1228 err = -ENOMEM; 1229 goto out_release_regions; 1230 } 1231 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE); 1232 if (!card->buffers) { 1233 dev_warn(&dev->dev, "Failed to ioremap data buffers\n"); 1234 err = -ENOMEM; 1235 goto out_unmap_config; 1236 } 1237 1238 if (reset) { 1239 iowrite32(1, card->config_regs + FPGA_MODE); 1240 ioread32(card->config_regs + FPGA_MODE); 1241 1242 iowrite32(0, card->config_regs + FPGA_MODE); 1243 ioread32(card->config_regs + FPGA_MODE); 1244 } 1245 1246 data32 = ioread32(card->config_regs + FPGA_VER); 1247 fpga_ver = (data32 & 0x0000FFFF); 1248 major_ver = ((data32 & 0xFF000000) >> 24); 1249 minor_ver = ((data32 & 0x00FF0000) >> 16); 1250 card->fpga_version = FPGA_VERSION(major_ver,minor_ver); 1251 if (card->fpga_version > LEGACY_BUFFERS) 1252 card->buffer_size = BUF_SIZE; 1253 else 1254 card->buffer_size = OLD_BUF_SIZE; 1255 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n", 1256 major_ver, minor_ver, fpga_ver); 1257 1258 if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade || 1259 db_fpga_upgrade || db_firmware_upgrade)) { 1260 dev_warn(&dev->dev, 1261 "FPGA too old; cannot upgrade flash. Use JTAG.\n"); 1262 fpga_upgrade = firmware_upgrade = 0; 1263 db_fpga_upgrade = db_firmware_upgrade = 0; 1264 } 1265 1266 /* Stopped using Atmel flash after 0.03-38 */ 1267 if (fpga_ver < 39) 1268 card->atmel_flash = 1; 1269 else 1270 card->atmel_flash = 0; 1271 1272 data32 = ioread32(card->config_regs + PORTS); 1273 card->nr_ports = (data32 & 0x000000FF); 1274 1275 if (card->fpga_version >= DMA_SUPPORTED) { 1276 pci_set_master(dev); 1277 card->using_dma = 1; 1278 if (1) { /* All known FPGA versions so far */ 1279 card->dma_alignment = 3; 1280 card->dma_bounce = kmalloc_array(card->nr_ports, 1281 BUF_SIZE, GFP_KERNEL); 1282 if (!card->dma_bounce) { 1283 dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n"); 1284 err = -ENOMEM; 1285 /* Fallback to MMIO doesn't work */ 1286 goto out_unmap_both; 1287 } 1288 } 1289 } else { 1290 card->using_dma = 0; 1291 /* Set RX empty flag for all ports */ 1292 iowrite32(0xF0, card->config_regs + FLAGS_ADDR); 1293 } 1294 1295 pci_set_drvdata(dev, card); 1296 1297 tasklet_init(&card->tlet, solos_bh, (unsigned long)card); 1298 spin_lock_init(&card->tx_lock); 1299 spin_lock_init(&card->tx_queue_lock); 1300 spin_lock_init(&card->cli_queue_lock); 1301 spin_lock_init(&card->param_queue_lock); 1302 INIT_LIST_HEAD(&card->param_queue); 1303 1304 err = request_irq(dev->irq, solos_irq, IRQF_SHARED, 1305 "solos-pci", card); 1306 if (err) { 1307 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq); 1308 goto out_unmap_both; 1309 } 1310 1311 iowrite32(1, card->config_regs + IRQ_EN_ADDR); 1312 1313 if (fpga_upgrade) 1314 flash_upgrade(card, 0); 1315 1316 if (firmware_upgrade) 1317 flash_upgrade(card, 1); 1318 1319 if (db_fpga_upgrade) 1320 flash_upgrade(card, 2); 1321 1322 if (db_firmware_upgrade) 1323 flash_upgrade(card, 3); 1324 1325 err = atm_init(card, &dev->dev); 1326 if (err) 1327 goto out_free_irq; 1328 1329 if (card->fpga_version >= DMA_SUPPORTED && 1330 sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group)) 1331 dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n"); 1332 1333 return 0; 1334 1335 out_free_irq: 1336 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1337 free_irq(dev->irq, card); 1338 tasklet_kill(&card->tlet); 1339 1340 out_unmap_both: 1341 kfree(card->dma_bounce); 1342 pci_iounmap(dev, card->buffers); 1343 out_unmap_config: 1344 pci_iounmap(dev, card->config_regs); 1345 out_release_regions: 1346 pci_release_regions(dev); 1347 out: 1348 kfree(card); 1349 return err; 1350 } 1351 1352 static int atm_init(struct solos_card *card, struct device *parent) 1353 { 1354 int i; 1355 1356 for (i = 0; i < card->nr_ports; i++) { 1357 struct sk_buff *skb; 1358 struct pkt_hdr *header; 1359 1360 skb_queue_head_init(&card->tx_queue[i]); 1361 skb_queue_head_init(&card->cli_queue[i]); 1362 1363 card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL); 1364 if (!card->atmdev[i]) { 1365 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i); 1366 atm_remove(card); 1367 return -ENODEV; 1368 } 1369 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console)) 1370 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i); 1371 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group)) 1372 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i); 1373 1374 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number); 1375 1376 card->atmdev[i]->ci_range.vpi_bits = 8; 1377 card->atmdev[i]->ci_range.vci_bits = 16; 1378 card->atmdev[i]->dev_data = card; 1379 card->atmdev[i]->phy_data = (void *)(unsigned long)i; 1380 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND); 1381 1382 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 1383 if (!skb) { 1384 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n"); 1385 continue; 1386 } 1387 1388 header = skb_put(skb, sizeof(*header)); 1389 1390 header->size = cpu_to_le16(0); 1391 header->vpi = cpu_to_le16(0); 1392 header->vci = cpu_to_le16(0); 1393 header->type = cpu_to_le16(PKT_STATUS); 1394 1395 fpga_queue(card, i, skb, NULL); 1396 } 1397 return 0; 1398 } 1399 1400 static void atm_remove(struct solos_card *card) 1401 { 1402 int i; 1403 1404 for (i = 0; i < card->nr_ports; i++) { 1405 if (card->atmdev[i]) { 1406 struct sk_buff *skb; 1407 1408 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number); 1409 1410 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group); 1411 atm_dev_deregister(card->atmdev[i]); 1412 1413 skb = card->rx_skb[i]; 1414 if (skb) { 1415 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 1416 RX_DMA_SIZE, DMA_FROM_DEVICE); 1417 dev_kfree_skb(skb); 1418 } 1419 skb = card->tx_skb[i]; 1420 if (skb) { 1421 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 1422 skb->len, DMA_TO_DEVICE); 1423 dev_kfree_skb(skb); 1424 } 1425 while ((skb = skb_dequeue(&card->tx_queue[i]))) 1426 dev_kfree_skb(skb); 1427 1428 } 1429 } 1430 } 1431 1432 static void fpga_remove(struct pci_dev *dev) 1433 { 1434 struct solos_card *card = pci_get_drvdata(dev); 1435 1436 /* Disable IRQs */ 1437 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1438 1439 /* Reset FPGA */ 1440 iowrite32(1, card->config_regs + FPGA_MODE); 1441 (void)ioread32(card->config_regs + FPGA_MODE); 1442 1443 if (card->fpga_version >= DMA_SUPPORTED) 1444 sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group); 1445 1446 atm_remove(card); 1447 1448 free_irq(dev->irq, card); 1449 tasklet_kill(&card->tlet); 1450 1451 kfree(card->dma_bounce); 1452 1453 /* Release device from reset */ 1454 iowrite32(0, card->config_regs + FPGA_MODE); 1455 (void)ioread32(card->config_regs + FPGA_MODE); 1456 1457 pci_iounmap(dev, card->buffers); 1458 pci_iounmap(dev, card->config_regs); 1459 1460 pci_release_regions(dev); 1461 pci_disable_device(dev); 1462 1463 kfree(card); 1464 } 1465 1466 static const struct pci_device_id fpga_pci_tbl[] = { 1467 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 1468 { 0, } 1469 }; 1470 1471 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl); 1472 1473 static struct pci_driver fpga_driver = { 1474 .name = "solos", 1475 .id_table = fpga_pci_tbl, 1476 .probe = fpga_probe, 1477 .remove = fpga_remove, 1478 }; 1479 1480 1481 static int __init solos_pci_init(void) 1482 { 1483 BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb)); 1484 1485 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION); 1486 return pci_register_driver(&fpga_driver); 1487 } 1488 1489 static void __exit solos_pci_exit(void) 1490 { 1491 pci_unregister_driver(&fpga_driver); 1492 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION); 1493 } 1494 1495 module_init(solos_pci_init); 1496 module_exit(solos_pci_exit); 1497