1 /* 2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by 3 * Traverse Technologies -- http://www.traverse.com.au/ 4 * Xrio Limited -- http://www.xrio.com/ 5 * 6 * 7 * Copyright © 2008 Traverse Technologies 8 * Copyright © 2008 Intel Corporation 9 * 10 * Authors: Nathan Williams <nathan@traverse.com.au> 11 * David Woodhouse <dwmw2@infradead.org> 12 * Treker Chen <treker@xrio.com> 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License 16 * version 2, as published by the Free Software Foundation. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 24 #define DEBUG 25 #define VERBOSE_DEBUG 26 27 #include <linux/interrupt.h> 28 #include <linux/module.h> 29 #include <linux/kernel.h> 30 #include <linux/errno.h> 31 #include <linux/ioport.h> 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/atm.h> 35 #include <linux/atmdev.h> 36 #include <linux/skbuff.h> 37 #include <linux/sysfs.h> 38 #include <linux/device.h> 39 #include <linux/kobject.h> 40 #include <linux/firmware.h> 41 #include <linux/ctype.h> 42 #include <linux/swab.h> 43 #include <linux/slab.h> 44 45 #define VERSION "0.07" 46 #define PTAG "solos-pci" 47 48 #define CONFIG_RAM_SIZE 128 49 #define FLAGS_ADDR 0x7C 50 #define IRQ_EN_ADDR 0x78 51 #define FPGA_VER 0x74 52 #define IRQ_CLEAR 0x70 53 #define WRITE_FLASH 0x6C 54 #define PORTS 0x68 55 #define FLASH_BLOCK 0x64 56 #define FLASH_BUSY 0x60 57 #define FPGA_MODE 0x5C 58 #define FLASH_MODE 0x58 59 #define GPIO_STATUS 0x54 60 #define TX_DMA_ADDR(port) (0x40 + (4 * (port))) 61 #define RX_DMA_ADDR(port) (0x30 + (4 * (port))) 62 63 #define DATA_RAM_SIZE 32768 64 #define BUF_SIZE 2048 65 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/ 66 #define FPGA_PAGE 528 /* FPGA flash page size*/ 67 #define SOLOS_PAGE 512 /* Solos flash page size*/ 68 #define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/ 69 #define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/ 70 71 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2) 72 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size)) 73 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2) 74 75 #define RX_DMA_SIZE 2048 76 77 #define FPGA_VERSION(a,b) (((a) << 8) + (b)) 78 #define LEGACY_BUFFERS 2 79 #define DMA_SUPPORTED 4 80 81 static int reset = 0; 82 static int atmdebug = 0; 83 static int firmware_upgrade = 0; 84 static int fpga_upgrade = 0; 85 static int db_firmware_upgrade = 0; 86 static int db_fpga_upgrade = 0; 87 88 struct pkt_hdr { 89 __le16 size; 90 __le16 vpi; 91 __le16 vci; 92 __le16 type; 93 }; 94 95 struct solos_skb_cb { 96 struct atm_vcc *vcc; 97 uint32_t dma_addr; 98 }; 99 100 101 #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb) 102 103 #define PKT_DATA 0 104 #define PKT_COMMAND 1 105 #define PKT_POPEN 3 106 #define PKT_PCLOSE 4 107 #define PKT_STATUS 5 108 109 struct solos_card { 110 void __iomem *config_regs; 111 void __iomem *buffers; 112 int nr_ports; 113 int tx_mask; 114 struct pci_dev *dev; 115 struct atm_dev *atmdev[4]; 116 struct tasklet_struct tlet; 117 spinlock_t tx_lock; 118 spinlock_t tx_queue_lock; 119 spinlock_t cli_queue_lock; 120 spinlock_t param_queue_lock; 121 struct list_head param_queue; 122 struct sk_buff_head tx_queue[4]; 123 struct sk_buff_head cli_queue[4]; 124 struct sk_buff *tx_skb[4]; 125 struct sk_buff *rx_skb[4]; 126 wait_queue_head_t param_wq; 127 wait_queue_head_t fw_wq; 128 int using_dma; 129 int fpga_version; 130 int buffer_size; 131 }; 132 133 134 struct solos_param { 135 struct list_head list; 136 pid_t pid; 137 int port; 138 struct sk_buff *response; 139 }; 140 141 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data) 142 143 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>"); 144 MODULE_DESCRIPTION("Solos PCI driver"); 145 MODULE_VERSION(VERSION); 146 MODULE_LICENSE("GPL"); 147 MODULE_FIRMWARE("solos-FPGA.bin"); 148 MODULE_FIRMWARE("solos-Firmware.bin"); 149 MODULE_FIRMWARE("solos-db-FPGA.bin"); 150 MODULE_PARM_DESC(reset, "Reset Solos chips on startup"); 151 MODULE_PARM_DESC(atmdebug, "Print ATM data"); 152 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade"); 153 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade"); 154 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade"); 155 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade"); 156 module_param(reset, int, 0444); 157 module_param(atmdebug, int, 0644); 158 module_param(firmware_upgrade, int, 0444); 159 module_param(fpga_upgrade, int, 0444); 160 module_param(db_firmware_upgrade, int, 0444); 161 module_param(db_fpga_upgrade, int, 0444); 162 163 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 164 struct atm_vcc *vcc); 165 static uint32_t fpga_tx(struct solos_card *); 166 static irqreturn_t solos_irq(int irq, void *dev_id); 167 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci); 168 static int atm_init(struct solos_card *, struct device *); 169 static void atm_remove(struct solos_card *); 170 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size); 171 static void solos_bh(unsigned long); 172 static int print_buffer(struct sk_buff *buf); 173 174 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb) 175 { 176 if (vcc->pop) 177 vcc->pop(vcc, skb); 178 else 179 dev_kfree_skb_any(skb); 180 } 181 182 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr, 183 char *buf) 184 { 185 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 186 struct solos_card *card = atmdev->dev_data; 187 struct solos_param prm; 188 struct sk_buff *skb; 189 struct pkt_hdr *header; 190 int buflen; 191 192 buflen = strlen(attr->attr.name) + 10; 193 194 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 195 if (!skb) { 196 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n"); 197 return -ENOMEM; 198 } 199 200 header = (void *)skb_put(skb, sizeof(*header)); 201 202 buflen = snprintf((void *)&header[1], buflen - 1, 203 "L%05d\n%s\n", current->pid, attr->attr.name); 204 skb_put(skb, buflen); 205 206 header->size = cpu_to_le16(buflen); 207 header->vpi = cpu_to_le16(0); 208 header->vci = cpu_to_le16(0); 209 header->type = cpu_to_le16(PKT_COMMAND); 210 211 prm.pid = current->pid; 212 prm.response = NULL; 213 prm.port = SOLOS_CHAN(atmdev); 214 215 spin_lock_irq(&card->param_queue_lock); 216 list_add(&prm.list, &card->param_queue); 217 spin_unlock_irq(&card->param_queue_lock); 218 219 fpga_queue(card, prm.port, skb, NULL); 220 221 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 222 223 spin_lock_irq(&card->param_queue_lock); 224 list_del(&prm.list); 225 spin_unlock_irq(&card->param_queue_lock); 226 227 if (!prm.response) 228 return -EIO; 229 230 buflen = prm.response->len; 231 memcpy(buf, prm.response->data, buflen); 232 kfree_skb(prm.response); 233 234 return buflen; 235 } 236 237 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr, 238 const char *buf, size_t count) 239 { 240 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 241 struct solos_card *card = atmdev->dev_data; 242 struct solos_param prm; 243 struct sk_buff *skb; 244 struct pkt_hdr *header; 245 int buflen; 246 ssize_t ret; 247 248 buflen = strlen(attr->attr.name) + 11 + count; 249 250 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 251 if (!skb) { 252 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n"); 253 return -ENOMEM; 254 } 255 256 header = (void *)skb_put(skb, sizeof(*header)); 257 258 buflen = snprintf((void *)&header[1], buflen - 1, 259 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf); 260 261 skb_put(skb, buflen); 262 header->size = cpu_to_le16(buflen); 263 header->vpi = cpu_to_le16(0); 264 header->vci = cpu_to_le16(0); 265 header->type = cpu_to_le16(PKT_COMMAND); 266 267 prm.pid = current->pid; 268 prm.response = NULL; 269 prm.port = SOLOS_CHAN(atmdev); 270 271 spin_lock_irq(&card->param_queue_lock); 272 list_add(&prm.list, &card->param_queue); 273 spin_unlock_irq(&card->param_queue_lock); 274 275 fpga_queue(card, prm.port, skb, NULL); 276 277 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 278 279 spin_lock_irq(&card->param_queue_lock); 280 list_del(&prm.list); 281 spin_unlock_irq(&card->param_queue_lock); 282 283 skb = prm.response; 284 285 if (!skb) 286 return -EIO; 287 288 buflen = skb->len; 289 290 /* Sometimes it has a newline, sometimes it doesn't. */ 291 if (skb->data[buflen - 1] == '\n') 292 buflen--; 293 294 if (buflen == 2 && !strncmp(skb->data, "OK", 2)) 295 ret = count; 296 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5)) 297 ret = -EIO; 298 else { 299 /* We know we have enough space allocated for this; we allocated 300 it ourselves */ 301 skb->data[buflen] = 0; 302 303 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n", 304 skb->data); 305 ret = -EIO; 306 } 307 kfree_skb(skb); 308 309 return ret; 310 } 311 312 static char *next_string(struct sk_buff *skb) 313 { 314 int i = 0; 315 char *this = skb->data; 316 317 for (i = 0; i < skb->len; i++) { 318 if (this[i] == '\n') { 319 this[i] = 0; 320 skb_pull(skb, i + 1); 321 return this; 322 } 323 if (!isprint(this[i])) 324 return NULL; 325 } 326 return NULL; 327 } 328 329 /* 330 * Status packet has fields separated by \n, starting with a version number 331 * for the information therein. Fields are.... 332 * 333 * packet version 334 * RxBitRate (version >= 1) 335 * TxBitRate (version >= 1) 336 * State (version >= 1) 337 * LocalSNRMargin (version >= 1) 338 * LocalLineAttn (version >= 1) 339 */ 340 static int process_status(struct solos_card *card, int port, struct sk_buff *skb) 341 { 342 char *str, *end, *state_str, *snr, *attn; 343 int ver, rate_up, rate_down; 344 345 if (!card->atmdev[port]) 346 return -ENODEV; 347 348 str = next_string(skb); 349 if (!str) 350 return -EIO; 351 352 ver = simple_strtol(str, NULL, 10); 353 if (ver < 1) { 354 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n", 355 ver); 356 return -EIO; 357 } 358 359 str = next_string(skb); 360 if (!str) 361 return -EIO; 362 if (!strcmp(str, "ERROR")) { 363 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n", 364 port); 365 return 0; 366 } 367 368 rate_down = simple_strtol(str, &end, 10); 369 if (*end) 370 return -EIO; 371 372 str = next_string(skb); 373 if (!str) 374 return -EIO; 375 rate_up = simple_strtol(str, &end, 10); 376 if (*end) 377 return -EIO; 378 379 state_str = next_string(skb); 380 if (!state_str) 381 return -EIO; 382 383 /* Anything but 'Showtime' is down */ 384 if (strcmp(state_str, "Showtime")) { 385 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST); 386 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str); 387 return 0; 388 } 389 390 snr = next_string(skb); 391 if (!snr) 392 return -EIO; 393 attn = next_string(skb); 394 if (!attn) 395 return -EIO; 396 397 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n", 398 port, state_str, rate_down/1000, rate_up/1000, 399 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn); 400 401 card->atmdev[port]->link_rate = rate_down / 424; 402 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND); 403 404 return 0; 405 } 406 407 static int process_command(struct solos_card *card, int port, struct sk_buff *skb) 408 { 409 struct solos_param *prm; 410 unsigned long flags; 411 int cmdpid; 412 int found = 0; 413 414 if (skb->len < 7) 415 return 0; 416 417 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) || 418 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) || 419 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) || 420 skb->data[6] != '\n') 421 return 0; 422 423 cmdpid = simple_strtol(&skb->data[1], NULL, 10); 424 425 spin_lock_irqsave(&card->param_queue_lock, flags); 426 list_for_each_entry(prm, &card->param_queue, list) { 427 if (prm->port == port && prm->pid == cmdpid) { 428 prm->response = skb; 429 skb_pull(skb, 7); 430 wake_up(&card->param_wq); 431 found = 1; 432 break; 433 } 434 } 435 spin_unlock_irqrestore(&card->param_queue_lock, flags); 436 return found; 437 } 438 439 static ssize_t console_show(struct device *dev, struct device_attribute *attr, 440 char *buf) 441 { 442 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 443 struct solos_card *card = atmdev->dev_data; 444 struct sk_buff *skb; 445 unsigned int len; 446 447 spin_lock(&card->cli_queue_lock); 448 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); 449 spin_unlock(&card->cli_queue_lock); 450 if(skb == NULL) 451 return sprintf(buf, "No data.\n"); 452 453 len = skb->len; 454 memcpy(buf, skb->data, len); 455 456 kfree_skb(skb); 457 return len; 458 } 459 460 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) 461 { 462 struct sk_buff *skb; 463 struct pkt_hdr *header; 464 465 if (size > (BUF_SIZE - sizeof(*header))) { 466 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n"); 467 return 0; 468 } 469 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC); 470 if (!skb) { 471 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n"); 472 return 0; 473 } 474 475 header = (void *)skb_put(skb, sizeof(*header)); 476 477 header->size = cpu_to_le16(size); 478 header->vpi = cpu_to_le16(0); 479 header->vci = cpu_to_le16(0); 480 header->type = cpu_to_le16(PKT_COMMAND); 481 482 memcpy(skb_put(skb, size), buf, size); 483 484 fpga_queue(card, dev, skb, NULL); 485 486 return 0; 487 } 488 489 static ssize_t console_store(struct device *dev, struct device_attribute *attr, 490 const char *buf, size_t count) 491 { 492 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 493 struct solos_card *card = atmdev->dev_data; 494 int err; 495 496 err = send_command(card, SOLOS_CHAN(atmdev), buf, count); 497 498 return err?:count; 499 } 500 501 struct geos_gpio_attr { 502 struct device_attribute attr; 503 int offset; 504 }; 505 506 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \ 507 struct geos_gpio_attr gpio_attr_##_name = { \ 508 .attr = __ATTR(_name, _mode, _show, _store), \ 509 .offset = _offset } 510 511 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr, 512 const char *buf, size_t count) 513 { 514 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); 515 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 516 struct solos_card *card = pci_get_drvdata(pdev); 517 uint32_t data32; 518 519 if (count != 1 && (count != 2 || buf[1] != '\n')) 520 return -EINVAL; 521 522 spin_lock_irq(&card->param_queue_lock); 523 data32 = ioread32(card->config_regs + GPIO_STATUS); 524 if (buf[0] == '1') { 525 data32 |= 1 << gattr->offset; 526 iowrite32(data32, card->config_regs + GPIO_STATUS); 527 } else if (buf[0] == '0') { 528 data32 &= ~(1 << gattr->offset); 529 iowrite32(data32, card->config_regs + GPIO_STATUS); 530 } else { 531 count = -EINVAL; 532 } 533 spin_lock_irq(&card->param_queue_lock); 534 return count; 535 } 536 537 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr, 538 char *buf) 539 { 540 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); 541 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 542 struct solos_card *card = pci_get_drvdata(pdev); 543 uint32_t data32; 544 545 data32 = ioread32(card->config_regs + GPIO_STATUS); 546 data32 = (data32 >> gattr->offset) & 1; 547 548 return sprintf(buf, "%d\n", data32); 549 } 550 551 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr, 552 char *buf) 553 { 554 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); 555 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 556 struct solos_card *card = pci_get_drvdata(pdev); 557 uint32_t data32; 558 559 data32 = ioread32(card->config_regs + GPIO_STATUS); 560 switch (gattr->offset) { 561 case 0: 562 /* HardwareVersion */ 563 data32 = data32 & 0x1F; 564 break; 565 case 1: 566 /* HardwareVariant */ 567 data32 = (data32 >> 5) & 0x0F; 568 break; 569 } 570 return sprintf(buf, "%d\n", data32); 571 } 572 573 static DEVICE_ATTR(console, 0644, console_show, console_store); 574 575 576 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL); 577 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store); 578 579 #include "solos-attrlist.c" 580 581 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9); 582 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10); 583 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11); 584 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12); 585 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13); 586 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14); 587 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0); 588 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1); 589 #undef SOLOS_ATTR_RO 590 #undef SOLOS_ATTR_RW 591 592 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr, 593 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr, 594 595 static struct attribute *solos_attrs[] = { 596 #include "solos-attrlist.c" 597 NULL 598 }; 599 600 static struct attribute_group solos_attr_group = { 601 .attrs = solos_attrs, 602 .name = "parameters", 603 }; 604 605 static struct attribute *gpio_attrs[] = { 606 &gpio_attr_GPIO1.attr.attr, 607 &gpio_attr_GPIO2.attr.attr, 608 &gpio_attr_GPIO3.attr.attr, 609 &gpio_attr_GPIO4.attr.attr, 610 &gpio_attr_GPIO5.attr.attr, 611 &gpio_attr_PushButton.attr.attr, 612 &gpio_attr_HardwareVersion.attr.attr, 613 &gpio_attr_HardwareVariant.attr.attr, 614 NULL 615 }; 616 617 static struct attribute_group gpio_attr_group = { 618 .attrs = gpio_attrs, 619 .name = "gpio", 620 }; 621 622 static int flash_upgrade(struct solos_card *card, int chip) 623 { 624 const struct firmware *fw; 625 const char *fw_name; 626 int blocksize = 0; 627 int numblocks = 0; 628 int offset; 629 630 switch (chip) { 631 case 0: 632 fw_name = "solos-FPGA.bin"; 633 blocksize = FPGA_BLOCK; 634 break; 635 case 1: 636 fw_name = "solos-Firmware.bin"; 637 blocksize = SOLOS_BLOCK; 638 break; 639 case 2: 640 if (card->fpga_version > LEGACY_BUFFERS){ 641 fw_name = "solos-db-FPGA.bin"; 642 blocksize = FPGA_BLOCK; 643 } else { 644 dev_info(&card->dev->dev, "FPGA version doesn't support" 645 " daughter board upgrades\n"); 646 return -EPERM; 647 } 648 break; 649 case 3: 650 if (card->fpga_version > LEGACY_BUFFERS){ 651 fw_name = "solos-Firmware.bin"; 652 blocksize = SOLOS_BLOCK; 653 } else { 654 dev_info(&card->dev->dev, "FPGA version doesn't support" 655 " daughter board upgrades\n"); 656 return -EPERM; 657 } 658 break; 659 default: 660 return -ENODEV; 661 } 662 663 if (request_firmware(&fw, fw_name, &card->dev->dev)) 664 return -ENOENT; 665 666 dev_info(&card->dev->dev, "Flash upgrade starting\n"); 667 668 numblocks = fw->size / blocksize; 669 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size); 670 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks); 671 672 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n"); 673 iowrite32(1, card->config_regs + FPGA_MODE); 674 (void) ioread32(card->config_regs + FPGA_MODE); 675 676 /* Set mode to Chip Erase */ 677 if(chip == 0 || chip == 2) 678 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n"); 679 if(chip == 1 || chip == 3) 680 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n"); 681 iowrite32((chip * 2), card->config_regs + FLASH_MODE); 682 683 684 iowrite32(1, card->config_regs + WRITE_FLASH); 685 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 686 687 for (offset = 0; offset < fw->size; offset += blocksize) { 688 int i; 689 690 /* Clear write flag */ 691 iowrite32(0, card->config_regs + WRITE_FLASH); 692 693 /* Set mode to Block Write */ 694 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */ 695 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE); 696 697 /* Copy block to buffer, swapping each 16 bits */ 698 for(i = 0; i < blocksize; i += 4) { 699 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i)); 700 if(card->fpga_version > LEGACY_BUFFERS) 701 iowrite32(word, FLASH_BUF + i); 702 else 703 iowrite32(word, RX_BUF(card, 3) + i); 704 } 705 706 /* Specify block number and then trigger flash write */ 707 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK); 708 iowrite32(1, card->config_regs + WRITE_FLASH); 709 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 710 } 711 712 release_firmware(fw); 713 iowrite32(0, card->config_regs + WRITE_FLASH); 714 iowrite32(0, card->config_regs + FPGA_MODE); 715 iowrite32(0, card->config_regs + FLASH_MODE); 716 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n"); 717 return 0; 718 } 719 720 static irqreturn_t solos_irq(int irq, void *dev_id) 721 { 722 struct solos_card *card = dev_id; 723 int handled = 1; 724 725 iowrite32(0, card->config_regs + IRQ_CLEAR); 726 727 /* If we're up and running, just kick the tasklet to process TX/RX */ 728 if (card->atmdev[0]) 729 tasklet_schedule(&card->tlet); 730 else 731 wake_up(&card->fw_wq); 732 733 return IRQ_RETVAL(handled); 734 } 735 736 void solos_bh(unsigned long card_arg) 737 { 738 struct solos_card *card = (void *)card_arg; 739 uint32_t card_flags; 740 uint32_t rx_done = 0; 741 int port; 742 743 /* 744 * Since fpga_tx() is going to need to read the flags under its lock, 745 * it can return them to us so that we don't have to hit PCI MMIO 746 * again for the same information 747 */ 748 card_flags = fpga_tx(card); 749 750 for (port = 0; port < card->nr_ports; port++) { 751 if (card_flags & (0x10 << port)) { 752 struct pkt_hdr _hdr, *header; 753 struct sk_buff *skb; 754 struct atm_vcc *vcc; 755 int size; 756 757 if (card->using_dma) { 758 skb = card->rx_skb[port]; 759 card->rx_skb[port] = NULL; 760 761 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 762 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 763 764 header = (void *)skb->data; 765 size = le16_to_cpu(header->size); 766 skb_put(skb, size + sizeof(*header)); 767 skb_pull(skb, sizeof(*header)); 768 } else { 769 header = &_hdr; 770 771 rx_done |= 0x10 << port; 772 773 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header)); 774 775 size = le16_to_cpu(header->size); 776 if (size > (card->buffer_size - sizeof(*header))){ 777 dev_warn(&card->dev->dev, "Invalid buffer size\n"); 778 continue; 779 } 780 781 skb = alloc_skb(size + 1, GFP_ATOMIC); 782 if (!skb) { 783 if (net_ratelimit()) 784 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n"); 785 continue; 786 } 787 788 memcpy_fromio(skb_put(skb, size), 789 RX_BUF(card, port) + sizeof(*header), 790 size); 791 } 792 if (atmdebug) { 793 dev_info(&card->dev->dev, "Received: port %d\n", port); 794 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 795 size, le16_to_cpu(header->vpi), 796 le16_to_cpu(header->vci)); 797 print_buffer(skb); 798 } 799 800 switch (le16_to_cpu(header->type)) { 801 case PKT_DATA: 802 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi), 803 le16_to_cpu(header->vci)); 804 if (!vcc) { 805 if (net_ratelimit()) 806 dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n", 807 le16_to_cpu(header->vpi), le16_to_cpu(header->vci), 808 port); 809 dev_kfree_skb_any(skb); 810 break; 811 } 812 atm_charge(vcc, skb->truesize); 813 vcc->push(vcc, skb); 814 atomic_inc(&vcc->stats->rx); 815 break; 816 817 case PKT_STATUS: 818 if (process_status(card, port, skb) && 819 net_ratelimit()) { 820 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port); 821 print_buffer(skb); 822 } 823 dev_kfree_skb_any(skb); 824 break; 825 826 case PKT_COMMAND: 827 default: /* FIXME: Not really, surely? */ 828 if (process_command(card, port, skb)) 829 break; 830 spin_lock(&card->cli_queue_lock); 831 if (skb_queue_len(&card->cli_queue[port]) > 10) { 832 if (net_ratelimit()) 833 dev_warn(&card->dev->dev, "Dropping console response on port %d\n", 834 port); 835 dev_kfree_skb_any(skb); 836 } else 837 skb_queue_tail(&card->cli_queue[port], skb); 838 spin_unlock(&card->cli_queue_lock); 839 break; 840 } 841 } 842 /* Allocate RX skbs for any ports which need them */ 843 if (card->using_dma && card->atmdev[port] && 844 !card->rx_skb[port]) { 845 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC); 846 if (skb) { 847 SKB_CB(skb)->dma_addr = 848 pci_map_single(card->dev, skb->data, 849 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 850 iowrite32(SKB_CB(skb)->dma_addr, 851 card->config_regs + RX_DMA_ADDR(port)); 852 card->rx_skb[port] = skb; 853 } else { 854 if (net_ratelimit()) 855 dev_warn(&card->dev->dev, "Failed to allocate RX skb"); 856 857 /* We'll have to try again later */ 858 tasklet_schedule(&card->tlet); 859 } 860 } 861 } 862 if (rx_done) 863 iowrite32(rx_done, card->config_regs + FLAGS_ADDR); 864 865 return; 866 } 867 868 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci) 869 { 870 struct hlist_head *head; 871 struct atm_vcc *vcc = NULL; 872 struct hlist_node *node; 873 struct sock *s; 874 875 read_lock(&vcc_sklist_lock); 876 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)]; 877 sk_for_each(s, node, head) { 878 vcc = atm_sk(s); 879 if (vcc->dev == dev && vcc->vci == vci && 880 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE && 881 test_bit(ATM_VF_READY, &vcc->flags)) 882 goto out; 883 } 884 vcc = NULL; 885 out: 886 read_unlock(&vcc_sklist_lock); 887 return vcc; 888 } 889 890 static int popen(struct atm_vcc *vcc) 891 { 892 struct solos_card *card = vcc->dev->dev_data; 893 struct sk_buff *skb; 894 struct pkt_hdr *header; 895 896 if (vcc->qos.aal != ATM_AAL5) { 897 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n", 898 vcc->qos.aal); 899 return -EINVAL; 900 } 901 902 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 903 if (!skb) { 904 if (net_ratelimit()) 905 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); 906 return -ENOMEM; 907 } 908 header = (void *)skb_put(skb, sizeof(*header)); 909 910 header->size = cpu_to_le16(0); 911 header->vpi = cpu_to_le16(vcc->vpi); 912 header->vci = cpu_to_le16(vcc->vci); 913 header->type = cpu_to_le16(PKT_POPEN); 914 915 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL); 916 917 set_bit(ATM_VF_ADDR, &vcc->flags); 918 set_bit(ATM_VF_READY, &vcc->flags); 919 920 return 0; 921 } 922 923 static void pclose(struct atm_vcc *vcc) 924 { 925 struct solos_card *card = vcc->dev->dev_data; 926 unsigned char port = SOLOS_CHAN(vcc->dev); 927 struct sk_buff *skb, *tmpskb; 928 struct pkt_hdr *header; 929 930 /* Remove any yet-to-be-transmitted packets from the pending queue */ 931 spin_lock(&card->tx_queue_lock); 932 skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) { 933 if (SKB_CB(skb)->vcc == vcc) { 934 skb_unlink(skb, &card->tx_queue[port]); 935 solos_pop(vcc, skb); 936 } 937 } 938 spin_unlock(&card->tx_queue_lock); 939 940 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 941 if (!skb) { 942 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n"); 943 return; 944 } 945 header = (void *)skb_put(skb, sizeof(*header)); 946 947 header->size = cpu_to_le16(0); 948 header->vpi = cpu_to_le16(vcc->vpi); 949 header->vci = cpu_to_le16(vcc->vci); 950 header->type = cpu_to_le16(PKT_PCLOSE); 951 952 skb_get(skb); 953 fpga_queue(card, port, skb, NULL); 954 955 if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ)) 956 dev_warn(&card->dev->dev, 957 "Timeout waiting for VCC close on port %d\n", port); 958 959 dev_kfree_skb(skb); 960 961 /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the 962 tasklet has finished processing any incoming packets (and, more to 963 the point, using the vcc pointer). */ 964 tasklet_unlock_wait(&card->tlet); 965 966 clear_bit(ATM_VF_ADDR, &vcc->flags); 967 968 return; 969 } 970 971 static int print_buffer(struct sk_buff *buf) 972 { 973 int len,i; 974 char msg[500]; 975 char item[10]; 976 977 len = buf->len; 978 for (i = 0; i < len; i++){ 979 if(i % 8 == 0) 980 sprintf(msg, "%02X: ", i); 981 982 sprintf(item,"%02X ",*(buf->data + i)); 983 strcat(msg, item); 984 if(i % 8 == 7) { 985 sprintf(item, "\n"); 986 strcat(msg, item); 987 printk(KERN_DEBUG "%s", msg); 988 } 989 } 990 if (i % 8 != 0) { 991 sprintf(item, "\n"); 992 strcat(msg, item); 993 printk(KERN_DEBUG "%s", msg); 994 } 995 printk(KERN_DEBUG "\n"); 996 997 return 0; 998 } 999 1000 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 1001 struct atm_vcc *vcc) 1002 { 1003 int old_len; 1004 unsigned long flags; 1005 1006 SKB_CB(skb)->vcc = vcc; 1007 1008 spin_lock_irqsave(&card->tx_queue_lock, flags); 1009 old_len = skb_queue_len(&card->tx_queue[port]); 1010 skb_queue_tail(&card->tx_queue[port], skb); 1011 if (!old_len) 1012 card->tx_mask |= (1 << port); 1013 spin_unlock_irqrestore(&card->tx_queue_lock, flags); 1014 1015 /* Theoretically we could just schedule the tasklet here, but 1016 that introduces latency we don't want -- it's noticeable */ 1017 if (!old_len) 1018 fpga_tx(card); 1019 } 1020 1021 static uint32_t fpga_tx(struct solos_card *card) 1022 { 1023 uint32_t tx_pending, card_flags; 1024 uint32_t tx_started = 0; 1025 struct sk_buff *skb; 1026 struct atm_vcc *vcc; 1027 unsigned char port; 1028 unsigned long flags; 1029 1030 spin_lock_irqsave(&card->tx_lock, flags); 1031 1032 card_flags = ioread32(card->config_regs + FLAGS_ADDR); 1033 /* 1034 * The queue lock is required for _writing_ to tx_mask, but we're 1035 * OK to read it here without locking. The only potential update 1036 * that we could race with is in fpga_queue() where it sets a bit 1037 * for a new port... but it's going to call this function again if 1038 * it's doing that, anyway. 1039 */ 1040 tx_pending = card->tx_mask & ~card_flags; 1041 1042 for (port = 0; tx_pending; tx_pending >>= 1, port++) { 1043 if (tx_pending & 1) { 1044 struct sk_buff *oldskb = card->tx_skb[port]; 1045 if (oldskb) { 1046 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr, 1047 oldskb->len, PCI_DMA_TODEVICE); 1048 card->tx_skb[port] = NULL; 1049 } 1050 spin_lock(&card->tx_queue_lock); 1051 skb = skb_dequeue(&card->tx_queue[port]); 1052 if (!skb) 1053 card->tx_mask &= ~(1 << port); 1054 spin_unlock(&card->tx_queue_lock); 1055 1056 if (skb && !card->using_dma) { 1057 memcpy_toio(TX_BUF(card, port), skb->data, skb->len); 1058 tx_started |= 1 << port; 1059 oldskb = skb; /* We're done with this skb already */ 1060 } else if (skb && card->using_dma) { 1061 SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data, 1062 skb->len, PCI_DMA_TODEVICE); 1063 card->tx_skb[port] = skb; 1064 iowrite32(SKB_CB(skb)->dma_addr, 1065 card->config_regs + TX_DMA_ADDR(port)); 1066 } 1067 1068 if (!oldskb) 1069 continue; 1070 1071 /* Clean up and free oldskb now it's gone */ 1072 if (atmdebug) { 1073 struct pkt_hdr *header = (void *)oldskb->data; 1074 int size = le16_to_cpu(header->size); 1075 1076 skb_pull(oldskb, sizeof(*header)); 1077 dev_info(&card->dev->dev, "Transmitted: port %d\n", 1078 port); 1079 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 1080 size, le16_to_cpu(header->vpi), 1081 le16_to_cpu(header->vci)); 1082 print_buffer(oldskb); 1083 } 1084 1085 vcc = SKB_CB(oldskb)->vcc; 1086 1087 if (vcc) { 1088 atomic_inc(&vcc->stats->tx); 1089 solos_pop(vcc, oldskb); 1090 } else { 1091 dev_kfree_skb_irq(oldskb); 1092 wake_up(&card->param_wq); 1093 } 1094 } 1095 } 1096 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */ 1097 if (tx_started) 1098 iowrite32(tx_started, card->config_regs + FLAGS_ADDR); 1099 1100 spin_unlock_irqrestore(&card->tx_lock, flags); 1101 return card_flags; 1102 } 1103 1104 static int psend(struct atm_vcc *vcc, struct sk_buff *skb) 1105 { 1106 struct solos_card *card = vcc->dev->dev_data; 1107 struct pkt_hdr *header; 1108 int pktlen; 1109 1110 pktlen = skb->len; 1111 if (pktlen > (BUF_SIZE - sizeof(*header))) { 1112 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n"); 1113 solos_pop(vcc, skb); 1114 return 0; 1115 } 1116 1117 if (!skb_clone_writable(skb, sizeof(*header))) { 1118 int expand_by = 0; 1119 int ret; 1120 1121 if (skb_headroom(skb) < sizeof(*header)) 1122 expand_by = sizeof(*header) - skb_headroom(skb); 1123 1124 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC); 1125 if (ret) { 1126 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n"); 1127 solos_pop(vcc, skb); 1128 return ret; 1129 } 1130 } 1131 1132 header = (void *)skb_push(skb, sizeof(*header)); 1133 1134 /* This does _not_ include the size of the header */ 1135 header->size = cpu_to_le16(pktlen); 1136 header->vpi = cpu_to_le16(vcc->vpi); 1137 header->vci = cpu_to_le16(vcc->vci); 1138 header->type = cpu_to_le16(PKT_DATA); 1139 1140 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc); 1141 1142 return 0; 1143 } 1144 1145 static struct atmdev_ops fpga_ops = { 1146 .open = popen, 1147 .close = pclose, 1148 .ioctl = NULL, 1149 .getsockopt = NULL, 1150 .setsockopt = NULL, 1151 .send = psend, 1152 .send_oam = NULL, 1153 .phy_put = NULL, 1154 .phy_get = NULL, 1155 .change_qos = NULL, 1156 .proc_read = NULL, 1157 .owner = THIS_MODULE 1158 }; 1159 1160 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) 1161 { 1162 int err; 1163 uint16_t fpga_ver; 1164 uint8_t major_ver, minor_ver; 1165 uint32_t data32; 1166 struct solos_card *card; 1167 1168 card = kzalloc(sizeof(*card), GFP_KERNEL); 1169 if (!card) 1170 return -ENOMEM; 1171 1172 card->dev = dev; 1173 init_waitqueue_head(&card->fw_wq); 1174 init_waitqueue_head(&card->param_wq); 1175 1176 err = pci_enable_device(dev); 1177 if (err) { 1178 dev_warn(&dev->dev, "Failed to enable PCI device\n"); 1179 goto out; 1180 } 1181 1182 err = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 1183 if (err) { 1184 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n"); 1185 goto out; 1186 } 1187 1188 err = pci_request_regions(dev, "solos"); 1189 if (err) { 1190 dev_warn(&dev->dev, "Failed to request regions\n"); 1191 goto out; 1192 } 1193 1194 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE); 1195 if (!card->config_regs) { 1196 dev_warn(&dev->dev, "Failed to ioremap config registers\n"); 1197 goto out_release_regions; 1198 } 1199 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE); 1200 if (!card->buffers) { 1201 dev_warn(&dev->dev, "Failed to ioremap data buffers\n"); 1202 goto out_unmap_config; 1203 } 1204 1205 if (reset) { 1206 iowrite32(1, card->config_regs + FPGA_MODE); 1207 data32 = ioread32(card->config_regs + FPGA_MODE); 1208 1209 iowrite32(0, card->config_regs + FPGA_MODE); 1210 data32 = ioread32(card->config_regs + FPGA_MODE); 1211 } 1212 1213 data32 = ioread32(card->config_regs + FPGA_VER); 1214 fpga_ver = (data32 & 0x0000FFFF); 1215 major_ver = ((data32 & 0xFF000000) >> 24); 1216 minor_ver = ((data32 & 0x00FF0000) >> 16); 1217 card->fpga_version = FPGA_VERSION(major_ver,minor_ver); 1218 if (card->fpga_version > LEGACY_BUFFERS) 1219 card->buffer_size = BUF_SIZE; 1220 else 1221 card->buffer_size = OLD_BUF_SIZE; 1222 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n", 1223 major_ver, minor_ver, fpga_ver); 1224 1225 if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade || 1226 db_fpga_upgrade || db_firmware_upgrade)) { 1227 dev_warn(&dev->dev, 1228 "FPGA too old; cannot upgrade flash. Use JTAG.\n"); 1229 fpga_upgrade = firmware_upgrade = 0; 1230 db_fpga_upgrade = db_firmware_upgrade = 0; 1231 } 1232 1233 if (card->fpga_version >= DMA_SUPPORTED) { 1234 pci_set_master(dev); 1235 card->using_dma = 1; 1236 } else { 1237 card->using_dma = 0; 1238 /* Set RX empty flag for all ports */ 1239 iowrite32(0xF0, card->config_regs + FLAGS_ADDR); 1240 } 1241 1242 data32 = ioread32(card->config_regs + PORTS); 1243 card->nr_ports = (data32 & 0x000000FF); 1244 1245 pci_set_drvdata(dev, card); 1246 1247 tasklet_init(&card->tlet, solos_bh, (unsigned long)card); 1248 spin_lock_init(&card->tx_lock); 1249 spin_lock_init(&card->tx_queue_lock); 1250 spin_lock_init(&card->cli_queue_lock); 1251 spin_lock_init(&card->param_queue_lock); 1252 INIT_LIST_HEAD(&card->param_queue); 1253 1254 err = request_irq(dev->irq, solos_irq, IRQF_SHARED, 1255 "solos-pci", card); 1256 if (err) { 1257 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq); 1258 goto out_unmap_both; 1259 } 1260 1261 iowrite32(1, card->config_regs + IRQ_EN_ADDR); 1262 1263 if (fpga_upgrade) 1264 flash_upgrade(card, 0); 1265 1266 if (firmware_upgrade) 1267 flash_upgrade(card, 1); 1268 1269 if (db_fpga_upgrade) 1270 flash_upgrade(card, 2); 1271 1272 if (db_firmware_upgrade) 1273 flash_upgrade(card, 3); 1274 1275 err = atm_init(card, &dev->dev); 1276 if (err) 1277 goto out_free_irq; 1278 1279 if (card->fpga_version >= DMA_SUPPORTED && 1280 sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group)) 1281 dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n"); 1282 1283 return 0; 1284 1285 out_free_irq: 1286 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1287 free_irq(dev->irq, card); 1288 tasklet_kill(&card->tlet); 1289 1290 out_unmap_both: 1291 pci_set_drvdata(dev, NULL); 1292 pci_iounmap(dev, card->buffers); 1293 out_unmap_config: 1294 pci_iounmap(dev, card->config_regs); 1295 out_release_regions: 1296 pci_release_regions(dev); 1297 out: 1298 kfree(card); 1299 return err; 1300 } 1301 1302 static int atm_init(struct solos_card *card, struct device *parent) 1303 { 1304 int i; 1305 1306 for (i = 0; i < card->nr_ports; i++) { 1307 struct sk_buff *skb; 1308 struct pkt_hdr *header; 1309 1310 skb_queue_head_init(&card->tx_queue[i]); 1311 skb_queue_head_init(&card->cli_queue[i]); 1312 1313 card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL); 1314 if (!card->atmdev[i]) { 1315 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i); 1316 atm_remove(card); 1317 return -ENODEV; 1318 } 1319 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console)) 1320 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i); 1321 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group)) 1322 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i); 1323 1324 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number); 1325 1326 card->atmdev[i]->ci_range.vpi_bits = 8; 1327 card->atmdev[i]->ci_range.vci_bits = 16; 1328 card->atmdev[i]->dev_data = card; 1329 card->atmdev[i]->phy_data = (void *)(unsigned long)i; 1330 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND); 1331 1332 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 1333 if (!skb) { 1334 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n"); 1335 continue; 1336 } 1337 1338 header = (void *)skb_put(skb, sizeof(*header)); 1339 1340 header->size = cpu_to_le16(0); 1341 header->vpi = cpu_to_le16(0); 1342 header->vci = cpu_to_le16(0); 1343 header->type = cpu_to_le16(PKT_STATUS); 1344 1345 fpga_queue(card, i, skb, NULL); 1346 } 1347 return 0; 1348 } 1349 1350 static void atm_remove(struct solos_card *card) 1351 { 1352 int i; 1353 1354 for (i = 0; i < card->nr_ports; i++) { 1355 if (card->atmdev[i]) { 1356 struct sk_buff *skb; 1357 1358 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number); 1359 1360 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group); 1361 atm_dev_deregister(card->atmdev[i]); 1362 1363 skb = card->rx_skb[i]; 1364 if (skb) { 1365 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 1366 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 1367 dev_kfree_skb(skb); 1368 } 1369 skb = card->tx_skb[i]; 1370 if (skb) { 1371 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 1372 skb->len, PCI_DMA_TODEVICE); 1373 dev_kfree_skb(skb); 1374 } 1375 while ((skb = skb_dequeue(&card->tx_queue[i]))) 1376 dev_kfree_skb(skb); 1377 1378 } 1379 } 1380 } 1381 1382 static void fpga_remove(struct pci_dev *dev) 1383 { 1384 struct solos_card *card = pci_get_drvdata(dev); 1385 1386 /* Disable IRQs */ 1387 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1388 1389 /* Reset FPGA */ 1390 iowrite32(1, card->config_regs + FPGA_MODE); 1391 (void)ioread32(card->config_regs + FPGA_MODE); 1392 1393 if (card->fpga_version >= DMA_SUPPORTED) 1394 sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group); 1395 1396 atm_remove(card); 1397 1398 free_irq(dev->irq, card); 1399 tasklet_kill(&card->tlet); 1400 1401 /* Release device from reset */ 1402 iowrite32(0, card->config_regs + FPGA_MODE); 1403 (void)ioread32(card->config_regs + FPGA_MODE); 1404 1405 pci_iounmap(dev, card->buffers); 1406 pci_iounmap(dev, card->config_regs); 1407 1408 pci_release_regions(dev); 1409 pci_disable_device(dev); 1410 1411 pci_set_drvdata(dev, NULL); 1412 kfree(card); 1413 } 1414 1415 static struct pci_device_id fpga_pci_tbl[] __devinitdata = { 1416 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 1417 { 0, } 1418 }; 1419 1420 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl); 1421 1422 static struct pci_driver fpga_driver = { 1423 .name = "solos", 1424 .id_table = fpga_pci_tbl, 1425 .probe = fpga_probe, 1426 .remove = fpga_remove, 1427 }; 1428 1429 1430 static int __init solos_pci_init(void) 1431 { 1432 BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb)); 1433 1434 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION); 1435 return pci_register_driver(&fpga_driver); 1436 } 1437 1438 static void __exit solos_pci_exit(void) 1439 { 1440 pci_unregister_driver(&fpga_driver); 1441 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION); 1442 } 1443 1444 module_init(solos_pci_init); 1445 module_exit(solos_pci_exit); 1446