1 /* 2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by 3 * Traverse Technologies -- http://www.traverse.com.au/ 4 * Xrio Limited -- http://www.xrio.com/ 5 * 6 * 7 * Copyright © 2008 Traverse Technologies 8 * Copyright © 2008 Intel Corporation 9 * 10 * Authors: Nathan Williams <nathan@traverse.com.au> 11 * David Woodhouse <dwmw2@infradead.org> 12 * Treker Chen <treker@xrio.com> 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License 16 * version 2, as published by the Free Software Foundation. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 24 #define DEBUG 25 #define VERBOSE_DEBUG 26 27 #include <linux/interrupt.h> 28 #include <linux/module.h> 29 #include <linux/kernel.h> 30 #include <linux/errno.h> 31 #include <linux/ioport.h> 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/atm.h> 35 #include <linux/atmdev.h> 36 #include <linux/skbuff.h> 37 #include <linux/sysfs.h> 38 #include <linux/device.h> 39 #include <linux/kobject.h> 40 #include <linux/firmware.h> 41 #include <linux/ctype.h> 42 #include <linux/swab.h> 43 #include <linux/slab.h> 44 45 #define VERSION "1.04" 46 #define DRIVER_VERSION 0x01 47 #define PTAG "solos-pci" 48 49 #define CONFIG_RAM_SIZE 128 50 #define FLAGS_ADDR 0x7C 51 #define IRQ_EN_ADDR 0x78 52 #define FPGA_VER 0x74 53 #define IRQ_CLEAR 0x70 54 #define WRITE_FLASH 0x6C 55 #define PORTS 0x68 56 #define FLASH_BLOCK 0x64 57 #define FLASH_BUSY 0x60 58 #define FPGA_MODE 0x5C 59 #define FLASH_MODE 0x58 60 #define GPIO_STATUS 0x54 61 #define DRIVER_VER 0x50 62 #define TX_DMA_ADDR(port) (0x40 + (4 * (port))) 63 #define RX_DMA_ADDR(port) (0x30 + (4 * (port))) 64 65 #define DATA_RAM_SIZE 32768 66 #define BUF_SIZE 2048 67 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/ 68 /* Old boards use ATMEL AD45DB161D flash */ 69 #define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/ 70 #define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/ 71 #define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/ 72 #define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/ 73 /* Current boards use M25P/M25PE SPI flash */ 74 #define SPI_FLASH_BLOCK (256 * 64) 75 76 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2) 77 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size)) 78 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2) 79 80 #define RX_DMA_SIZE 2048 81 82 #define FPGA_VERSION(a,b) (((a) << 8) + (b)) 83 #define LEGACY_BUFFERS 2 84 #define DMA_SUPPORTED 4 85 86 static int reset = 0; 87 static int atmdebug = 0; 88 static int firmware_upgrade = 0; 89 static int fpga_upgrade = 0; 90 static int db_firmware_upgrade = 0; 91 static int db_fpga_upgrade = 0; 92 93 struct pkt_hdr { 94 __le16 size; 95 __le16 vpi; 96 __le16 vci; 97 __le16 type; 98 }; 99 100 struct solos_skb_cb { 101 struct atm_vcc *vcc; 102 uint32_t dma_addr; 103 }; 104 105 106 #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb) 107 108 #define PKT_DATA 0 109 #define PKT_COMMAND 1 110 #define PKT_POPEN 3 111 #define PKT_PCLOSE 4 112 #define PKT_STATUS 5 113 114 struct solos_card { 115 void __iomem *config_regs; 116 void __iomem *buffers; 117 int nr_ports; 118 int tx_mask; 119 struct pci_dev *dev; 120 struct atm_dev *atmdev[4]; 121 struct tasklet_struct tlet; 122 spinlock_t tx_lock; 123 spinlock_t tx_queue_lock; 124 spinlock_t cli_queue_lock; 125 spinlock_t param_queue_lock; 126 struct list_head param_queue; 127 struct sk_buff_head tx_queue[4]; 128 struct sk_buff_head cli_queue[4]; 129 struct sk_buff *tx_skb[4]; 130 struct sk_buff *rx_skb[4]; 131 unsigned char *dma_bounce; 132 wait_queue_head_t param_wq; 133 wait_queue_head_t fw_wq; 134 int using_dma; 135 int dma_alignment; 136 int fpga_version; 137 int buffer_size; 138 int atmel_flash; 139 }; 140 141 142 struct solos_param { 143 struct list_head list; 144 pid_t pid; 145 int port; 146 struct sk_buff *response; 147 }; 148 149 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data) 150 151 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>"); 152 MODULE_DESCRIPTION("Solos PCI driver"); 153 MODULE_VERSION(VERSION); 154 MODULE_LICENSE("GPL"); 155 MODULE_FIRMWARE("solos-FPGA.bin"); 156 MODULE_FIRMWARE("solos-Firmware.bin"); 157 MODULE_FIRMWARE("solos-db-FPGA.bin"); 158 MODULE_PARM_DESC(reset, "Reset Solos chips on startup"); 159 MODULE_PARM_DESC(atmdebug, "Print ATM data"); 160 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade"); 161 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade"); 162 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade"); 163 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade"); 164 module_param(reset, int, 0444); 165 module_param(atmdebug, int, 0644); 166 module_param(firmware_upgrade, int, 0444); 167 module_param(fpga_upgrade, int, 0444); 168 module_param(db_firmware_upgrade, int, 0444); 169 module_param(db_fpga_upgrade, int, 0444); 170 171 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 172 struct atm_vcc *vcc); 173 static uint32_t fpga_tx(struct solos_card *); 174 static irqreturn_t solos_irq(int irq, void *dev_id); 175 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci); 176 static int atm_init(struct solos_card *, struct device *); 177 static void atm_remove(struct solos_card *); 178 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size); 179 static void solos_bh(unsigned long); 180 static int print_buffer(struct sk_buff *buf); 181 182 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb) 183 { 184 if (vcc->pop) 185 vcc->pop(vcc, skb); 186 else 187 dev_kfree_skb_any(skb); 188 } 189 190 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr, 191 char *buf) 192 { 193 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 194 struct solos_card *card = atmdev->dev_data; 195 struct solos_param prm; 196 struct sk_buff *skb; 197 struct pkt_hdr *header; 198 int buflen; 199 200 buflen = strlen(attr->attr.name) + 10; 201 202 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 203 if (!skb) { 204 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n"); 205 return -ENOMEM; 206 } 207 208 header = skb_put(skb, sizeof(*header)); 209 210 buflen = snprintf((void *)&header[1], buflen - 1, 211 "L%05d\n%s\n", current->pid, attr->attr.name); 212 skb_put(skb, buflen); 213 214 header->size = cpu_to_le16(buflen); 215 header->vpi = cpu_to_le16(0); 216 header->vci = cpu_to_le16(0); 217 header->type = cpu_to_le16(PKT_COMMAND); 218 219 prm.pid = current->pid; 220 prm.response = NULL; 221 prm.port = SOLOS_CHAN(atmdev); 222 223 spin_lock_irq(&card->param_queue_lock); 224 list_add(&prm.list, &card->param_queue); 225 spin_unlock_irq(&card->param_queue_lock); 226 227 fpga_queue(card, prm.port, skb, NULL); 228 229 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 230 231 spin_lock_irq(&card->param_queue_lock); 232 list_del(&prm.list); 233 spin_unlock_irq(&card->param_queue_lock); 234 235 if (!prm.response) 236 return -EIO; 237 238 buflen = prm.response->len; 239 memcpy(buf, prm.response->data, buflen); 240 kfree_skb(prm.response); 241 242 return buflen; 243 } 244 245 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr, 246 const char *buf, size_t count) 247 { 248 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 249 struct solos_card *card = atmdev->dev_data; 250 struct solos_param prm; 251 struct sk_buff *skb; 252 struct pkt_hdr *header; 253 int buflen; 254 ssize_t ret; 255 256 buflen = strlen(attr->attr.name) + 11 + count; 257 258 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 259 if (!skb) { 260 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n"); 261 return -ENOMEM; 262 } 263 264 header = skb_put(skb, sizeof(*header)); 265 266 buflen = snprintf((void *)&header[1], buflen - 1, 267 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf); 268 269 skb_put(skb, buflen); 270 header->size = cpu_to_le16(buflen); 271 header->vpi = cpu_to_le16(0); 272 header->vci = cpu_to_le16(0); 273 header->type = cpu_to_le16(PKT_COMMAND); 274 275 prm.pid = current->pid; 276 prm.response = NULL; 277 prm.port = SOLOS_CHAN(atmdev); 278 279 spin_lock_irq(&card->param_queue_lock); 280 list_add(&prm.list, &card->param_queue); 281 spin_unlock_irq(&card->param_queue_lock); 282 283 fpga_queue(card, prm.port, skb, NULL); 284 285 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 286 287 spin_lock_irq(&card->param_queue_lock); 288 list_del(&prm.list); 289 spin_unlock_irq(&card->param_queue_lock); 290 291 skb = prm.response; 292 293 if (!skb) 294 return -EIO; 295 296 buflen = skb->len; 297 298 /* Sometimes it has a newline, sometimes it doesn't. */ 299 if (skb->data[buflen - 1] == '\n') 300 buflen--; 301 302 if (buflen == 2 && !strncmp(skb->data, "OK", 2)) 303 ret = count; 304 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5)) 305 ret = -EIO; 306 else { 307 /* We know we have enough space allocated for this; we allocated 308 it ourselves */ 309 skb->data[buflen] = 0; 310 311 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n", 312 skb->data); 313 ret = -EIO; 314 } 315 kfree_skb(skb); 316 317 return ret; 318 } 319 320 static char *next_string(struct sk_buff *skb) 321 { 322 int i = 0; 323 char *this = skb->data; 324 325 for (i = 0; i < skb->len; i++) { 326 if (this[i] == '\n') { 327 this[i] = 0; 328 skb_pull(skb, i + 1); 329 return this; 330 } 331 if (!isprint(this[i])) 332 return NULL; 333 } 334 return NULL; 335 } 336 337 /* 338 * Status packet has fields separated by \n, starting with a version number 339 * for the information therein. Fields are.... 340 * 341 * packet version 342 * RxBitRate (version >= 1) 343 * TxBitRate (version >= 1) 344 * State (version >= 1) 345 * LocalSNRMargin (version >= 1) 346 * LocalLineAttn (version >= 1) 347 */ 348 static int process_status(struct solos_card *card, int port, struct sk_buff *skb) 349 { 350 char *str, *state_str, *snr, *attn; 351 int ver, rate_up, rate_down, err; 352 353 if (!card->atmdev[port]) 354 return -ENODEV; 355 356 str = next_string(skb); 357 if (!str) 358 return -EIO; 359 360 err = kstrtoint(str, 10, &ver); 361 if (err) { 362 dev_warn(&card->dev->dev, "Unexpected status interrupt version\n"); 363 return err; 364 } 365 if (ver < 1) { 366 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n", 367 ver); 368 return -EIO; 369 } 370 371 str = next_string(skb); 372 if (!str) 373 return -EIO; 374 if (!strcmp(str, "ERROR")) { 375 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n", 376 port); 377 return 0; 378 } 379 380 err = kstrtoint(str, 10, &rate_down); 381 if (err) 382 return err; 383 384 str = next_string(skb); 385 if (!str) 386 return -EIO; 387 err = kstrtoint(str, 10, &rate_up); 388 if (err) 389 return err; 390 391 state_str = next_string(skb); 392 if (!state_str) 393 return -EIO; 394 395 /* Anything but 'Showtime' is down */ 396 if (strcmp(state_str, "Showtime")) { 397 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST); 398 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str); 399 return 0; 400 } 401 402 snr = next_string(skb); 403 if (!snr) 404 return -EIO; 405 attn = next_string(skb); 406 if (!attn) 407 return -EIO; 408 409 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n", 410 port, state_str, rate_down/1000, rate_up/1000, 411 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn); 412 413 card->atmdev[port]->link_rate = rate_down / 424; 414 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND); 415 416 return 0; 417 } 418 419 static int process_command(struct solos_card *card, int port, struct sk_buff *skb) 420 { 421 struct solos_param *prm; 422 unsigned long flags; 423 int cmdpid; 424 int found = 0, err; 425 426 if (skb->len < 7) 427 return 0; 428 429 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) || 430 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) || 431 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) || 432 skb->data[6] != '\n') 433 return 0; 434 435 err = kstrtoint(&skb->data[1], 10, &cmdpid); 436 if (err) 437 return err; 438 439 spin_lock_irqsave(&card->param_queue_lock, flags); 440 list_for_each_entry(prm, &card->param_queue, list) { 441 if (prm->port == port && prm->pid == cmdpid) { 442 prm->response = skb; 443 skb_pull(skb, 7); 444 wake_up(&card->param_wq); 445 found = 1; 446 break; 447 } 448 } 449 spin_unlock_irqrestore(&card->param_queue_lock, flags); 450 return found; 451 } 452 453 static ssize_t console_show(struct device *dev, struct device_attribute *attr, 454 char *buf) 455 { 456 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 457 struct solos_card *card = atmdev->dev_data; 458 struct sk_buff *skb; 459 unsigned int len; 460 461 spin_lock(&card->cli_queue_lock); 462 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); 463 spin_unlock(&card->cli_queue_lock); 464 if(skb == NULL) 465 return sprintf(buf, "No data.\n"); 466 467 len = skb->len; 468 memcpy(buf, skb->data, len); 469 470 kfree_skb(skb); 471 return len; 472 } 473 474 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) 475 { 476 struct sk_buff *skb; 477 struct pkt_hdr *header; 478 479 if (size > (BUF_SIZE - sizeof(*header))) { 480 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n"); 481 return 0; 482 } 483 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC); 484 if (!skb) { 485 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n"); 486 return 0; 487 } 488 489 header = skb_put(skb, sizeof(*header)); 490 491 header->size = cpu_to_le16(size); 492 header->vpi = cpu_to_le16(0); 493 header->vci = cpu_to_le16(0); 494 header->type = cpu_to_le16(PKT_COMMAND); 495 496 skb_put_data(skb, buf, size); 497 498 fpga_queue(card, dev, skb, NULL); 499 500 return 0; 501 } 502 503 static ssize_t console_store(struct device *dev, struct device_attribute *attr, 504 const char *buf, size_t count) 505 { 506 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 507 struct solos_card *card = atmdev->dev_data; 508 int err; 509 510 err = send_command(card, SOLOS_CHAN(atmdev), buf, count); 511 512 return err?:count; 513 } 514 515 struct geos_gpio_attr { 516 struct device_attribute attr; 517 int offset; 518 }; 519 520 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \ 521 struct geos_gpio_attr gpio_attr_##_name = { \ 522 .attr = __ATTR(_name, _mode, _show, _store), \ 523 .offset = _offset } 524 525 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr, 526 const char *buf, size_t count) 527 { 528 struct pci_dev *pdev = to_pci_dev(dev); 529 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 530 struct solos_card *card = pci_get_drvdata(pdev); 531 uint32_t data32; 532 533 if (count != 1 && (count != 2 || buf[1] != '\n')) 534 return -EINVAL; 535 536 spin_lock_irq(&card->param_queue_lock); 537 data32 = ioread32(card->config_regs + GPIO_STATUS); 538 if (buf[0] == '1') { 539 data32 |= 1 << gattr->offset; 540 iowrite32(data32, card->config_regs + GPIO_STATUS); 541 } else if (buf[0] == '0') { 542 data32 &= ~(1 << gattr->offset); 543 iowrite32(data32, card->config_regs + GPIO_STATUS); 544 } else { 545 count = -EINVAL; 546 } 547 spin_unlock_irq(&card->param_queue_lock); 548 return count; 549 } 550 551 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr, 552 char *buf) 553 { 554 struct pci_dev *pdev = to_pci_dev(dev); 555 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 556 struct solos_card *card = pci_get_drvdata(pdev); 557 uint32_t data32; 558 559 data32 = ioread32(card->config_regs + GPIO_STATUS); 560 data32 = (data32 >> gattr->offset) & 1; 561 562 return sprintf(buf, "%d\n", data32); 563 } 564 565 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr, 566 char *buf) 567 { 568 struct pci_dev *pdev = to_pci_dev(dev); 569 struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr); 570 struct solos_card *card = pci_get_drvdata(pdev); 571 uint32_t data32; 572 573 data32 = ioread32(card->config_regs + GPIO_STATUS); 574 switch (gattr->offset) { 575 case 0: 576 /* HardwareVersion */ 577 data32 = data32 & 0x1F; 578 break; 579 case 1: 580 /* HardwareVariant */ 581 data32 = (data32 >> 5) & 0x0F; 582 break; 583 } 584 return sprintf(buf, "%d\n", data32); 585 } 586 587 static DEVICE_ATTR_RW(console); 588 589 590 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL); 591 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store); 592 593 #include "solos-attrlist.c" 594 595 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9); 596 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10); 597 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11); 598 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12); 599 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13); 600 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14); 601 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0); 602 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1); 603 #undef SOLOS_ATTR_RO 604 #undef SOLOS_ATTR_RW 605 606 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr, 607 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr, 608 609 static struct attribute *solos_attrs[] = { 610 #include "solos-attrlist.c" 611 NULL 612 }; 613 614 static const struct attribute_group solos_attr_group = { 615 .attrs = solos_attrs, 616 .name = "parameters", 617 }; 618 619 static struct attribute *gpio_attrs[] = { 620 &gpio_attr_GPIO1.attr.attr, 621 &gpio_attr_GPIO2.attr.attr, 622 &gpio_attr_GPIO3.attr.attr, 623 &gpio_attr_GPIO4.attr.attr, 624 &gpio_attr_GPIO5.attr.attr, 625 &gpio_attr_PushButton.attr.attr, 626 &gpio_attr_HardwareVersion.attr.attr, 627 &gpio_attr_HardwareVariant.attr.attr, 628 NULL 629 }; 630 631 static const struct attribute_group gpio_attr_group = { 632 .attrs = gpio_attrs, 633 .name = "gpio", 634 }; 635 636 static int flash_upgrade(struct solos_card *card, int chip) 637 { 638 const struct firmware *fw; 639 const char *fw_name; 640 int blocksize = 0; 641 int numblocks = 0; 642 int offset; 643 644 switch (chip) { 645 case 0: 646 fw_name = "solos-FPGA.bin"; 647 if (card->atmel_flash) 648 blocksize = ATMEL_FPGA_BLOCK; 649 else 650 blocksize = SPI_FLASH_BLOCK; 651 break; 652 case 1: 653 fw_name = "solos-Firmware.bin"; 654 if (card->atmel_flash) 655 blocksize = ATMEL_SOLOS_BLOCK; 656 else 657 blocksize = SPI_FLASH_BLOCK; 658 break; 659 case 2: 660 if (card->fpga_version > LEGACY_BUFFERS){ 661 fw_name = "solos-db-FPGA.bin"; 662 if (card->atmel_flash) 663 blocksize = ATMEL_FPGA_BLOCK; 664 else 665 blocksize = SPI_FLASH_BLOCK; 666 } else { 667 dev_info(&card->dev->dev, "FPGA version doesn't support" 668 " daughter board upgrades\n"); 669 return -EPERM; 670 } 671 break; 672 case 3: 673 if (card->fpga_version > LEGACY_BUFFERS){ 674 fw_name = "solos-Firmware.bin"; 675 if (card->atmel_flash) 676 blocksize = ATMEL_SOLOS_BLOCK; 677 else 678 blocksize = SPI_FLASH_BLOCK; 679 } else { 680 dev_info(&card->dev->dev, "FPGA version doesn't support" 681 " daughter board upgrades\n"); 682 return -EPERM; 683 } 684 break; 685 default: 686 return -ENODEV; 687 } 688 689 if (request_firmware(&fw, fw_name, &card->dev->dev)) 690 return -ENOENT; 691 692 dev_info(&card->dev->dev, "Flash upgrade starting\n"); 693 694 /* New FPGAs require driver version before permitting flash upgrades */ 695 iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER); 696 697 numblocks = fw->size / blocksize; 698 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size); 699 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks); 700 701 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n"); 702 iowrite32(1, card->config_regs + FPGA_MODE); 703 (void) ioread32(card->config_regs + FPGA_MODE); 704 705 /* Set mode to Chip Erase */ 706 if(chip == 0 || chip == 2) 707 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n"); 708 if(chip == 1 || chip == 3) 709 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n"); 710 iowrite32((chip * 2), card->config_regs + FLASH_MODE); 711 712 713 iowrite32(1, card->config_regs + WRITE_FLASH); 714 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 715 716 for (offset = 0; offset < fw->size; offset += blocksize) { 717 int i; 718 719 /* Clear write flag */ 720 iowrite32(0, card->config_regs + WRITE_FLASH); 721 722 /* Set mode to Block Write */ 723 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */ 724 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE); 725 726 /* Copy block to buffer, swapping each 16 bits for Atmel flash */ 727 for(i = 0; i < blocksize; i += 4) { 728 uint32_t word; 729 if (card->atmel_flash) 730 word = swahb32p((uint32_t *)(fw->data + offset + i)); 731 else 732 word = *(uint32_t *)(fw->data + offset + i); 733 if(card->fpga_version > LEGACY_BUFFERS) 734 iowrite32(word, FLASH_BUF + i); 735 else 736 iowrite32(word, RX_BUF(card, 3) + i); 737 } 738 739 /* Specify block number and then trigger flash write */ 740 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK); 741 iowrite32(1, card->config_regs + WRITE_FLASH); 742 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 743 } 744 745 release_firmware(fw); 746 iowrite32(0, card->config_regs + WRITE_FLASH); 747 iowrite32(0, card->config_regs + FPGA_MODE); 748 iowrite32(0, card->config_regs + FLASH_MODE); 749 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n"); 750 return 0; 751 } 752 753 static irqreturn_t solos_irq(int irq, void *dev_id) 754 { 755 struct solos_card *card = dev_id; 756 int handled = 1; 757 758 iowrite32(0, card->config_regs + IRQ_CLEAR); 759 760 /* If we're up and running, just kick the tasklet to process TX/RX */ 761 if (card->atmdev[0]) 762 tasklet_schedule(&card->tlet); 763 else 764 wake_up(&card->fw_wq); 765 766 return IRQ_RETVAL(handled); 767 } 768 769 static void solos_bh(unsigned long card_arg) 770 { 771 struct solos_card *card = (void *)card_arg; 772 uint32_t card_flags; 773 uint32_t rx_done = 0; 774 int port; 775 776 /* 777 * Since fpga_tx() is going to need to read the flags under its lock, 778 * it can return them to us so that we don't have to hit PCI MMIO 779 * again for the same information 780 */ 781 card_flags = fpga_tx(card); 782 783 for (port = 0; port < card->nr_ports; port++) { 784 if (card_flags & (0x10 << port)) { 785 struct pkt_hdr _hdr, *header; 786 struct sk_buff *skb; 787 struct atm_vcc *vcc; 788 int size; 789 790 if (card->using_dma) { 791 skb = card->rx_skb[port]; 792 card->rx_skb[port] = NULL; 793 794 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 795 RX_DMA_SIZE, DMA_FROM_DEVICE); 796 797 header = (void *)skb->data; 798 size = le16_to_cpu(header->size); 799 skb_put(skb, size + sizeof(*header)); 800 skb_pull(skb, sizeof(*header)); 801 } else { 802 header = &_hdr; 803 804 rx_done |= 0x10 << port; 805 806 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header)); 807 808 size = le16_to_cpu(header->size); 809 if (size > (card->buffer_size - sizeof(*header))){ 810 dev_warn(&card->dev->dev, "Invalid buffer size\n"); 811 continue; 812 } 813 814 /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of 815 * headroom, and ensures we can route packets back out an 816 * Ethernet interface (for example) without having to 817 * reallocate. Adding NET_IP_ALIGN also ensures that both 818 * PPPoATM and PPPoEoBR2684 packets end up aligned. */ 819 skb = netdev_alloc_skb_ip_align(NULL, size + 1); 820 if (!skb) { 821 if (net_ratelimit()) 822 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n"); 823 continue; 824 } 825 826 memcpy_fromio(skb_put(skb, size), 827 RX_BUF(card, port) + sizeof(*header), 828 size); 829 } 830 if (atmdebug) { 831 dev_info(&card->dev->dev, "Received: port %d\n", port); 832 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 833 size, le16_to_cpu(header->vpi), 834 le16_to_cpu(header->vci)); 835 print_buffer(skb); 836 } 837 838 switch (le16_to_cpu(header->type)) { 839 case PKT_DATA: 840 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi), 841 le16_to_cpu(header->vci)); 842 if (!vcc) { 843 if (net_ratelimit()) 844 dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n", 845 le16_to_cpu(header->vpi), le16_to_cpu(header->vci), 846 port); 847 dev_kfree_skb_any(skb); 848 break; 849 } 850 atm_charge(vcc, skb->truesize); 851 vcc->push(vcc, skb); 852 atomic_inc(&vcc->stats->rx); 853 break; 854 855 case PKT_STATUS: 856 if (process_status(card, port, skb) && 857 net_ratelimit()) { 858 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port); 859 print_buffer(skb); 860 } 861 dev_kfree_skb_any(skb); 862 break; 863 864 case PKT_COMMAND: 865 default: /* FIXME: Not really, surely? */ 866 if (process_command(card, port, skb)) 867 break; 868 spin_lock(&card->cli_queue_lock); 869 if (skb_queue_len(&card->cli_queue[port]) > 10) { 870 if (net_ratelimit()) 871 dev_warn(&card->dev->dev, "Dropping console response on port %d\n", 872 port); 873 dev_kfree_skb_any(skb); 874 } else 875 skb_queue_tail(&card->cli_queue[port], skb); 876 spin_unlock(&card->cli_queue_lock); 877 break; 878 } 879 } 880 /* Allocate RX skbs for any ports which need them */ 881 if (card->using_dma && card->atmdev[port] && 882 !card->rx_skb[port]) { 883 /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN 884 * here; the FPGA can only DMA to addresses which are 885 * aligned to 4 bytes. */ 886 struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE); 887 if (skb) { 888 SKB_CB(skb)->dma_addr = 889 dma_map_single(&card->dev->dev, skb->data, 890 RX_DMA_SIZE, DMA_FROM_DEVICE); 891 iowrite32(SKB_CB(skb)->dma_addr, 892 card->config_regs + RX_DMA_ADDR(port)); 893 card->rx_skb[port] = skb; 894 } else { 895 if (net_ratelimit()) 896 dev_warn(&card->dev->dev, "Failed to allocate RX skb"); 897 898 /* We'll have to try again later */ 899 tasklet_schedule(&card->tlet); 900 } 901 } 902 } 903 if (rx_done) 904 iowrite32(rx_done, card->config_regs + FLAGS_ADDR); 905 906 return; 907 } 908 909 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci) 910 { 911 struct hlist_head *head; 912 struct atm_vcc *vcc = NULL; 913 struct sock *s; 914 915 read_lock(&vcc_sklist_lock); 916 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)]; 917 sk_for_each(s, head) { 918 vcc = atm_sk(s); 919 if (vcc->dev == dev && vcc->vci == vci && 920 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE && 921 test_bit(ATM_VF_READY, &vcc->flags)) 922 goto out; 923 } 924 vcc = NULL; 925 out: 926 read_unlock(&vcc_sklist_lock); 927 return vcc; 928 } 929 930 static int popen(struct atm_vcc *vcc) 931 { 932 struct solos_card *card = vcc->dev->dev_data; 933 struct sk_buff *skb; 934 struct pkt_hdr *header; 935 936 if (vcc->qos.aal != ATM_AAL5) { 937 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n", 938 vcc->qos.aal); 939 return -EINVAL; 940 } 941 942 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 943 if (!skb) { 944 if (net_ratelimit()) 945 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); 946 return -ENOMEM; 947 } 948 header = skb_put(skb, sizeof(*header)); 949 950 header->size = cpu_to_le16(0); 951 header->vpi = cpu_to_le16(vcc->vpi); 952 header->vci = cpu_to_le16(vcc->vci); 953 header->type = cpu_to_le16(PKT_POPEN); 954 955 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL); 956 957 set_bit(ATM_VF_ADDR, &vcc->flags); 958 set_bit(ATM_VF_READY, &vcc->flags); 959 960 return 0; 961 } 962 963 static void pclose(struct atm_vcc *vcc) 964 { 965 struct solos_card *card = vcc->dev->dev_data; 966 unsigned char port = SOLOS_CHAN(vcc->dev); 967 struct sk_buff *skb, *tmpskb; 968 struct pkt_hdr *header; 969 970 /* Remove any yet-to-be-transmitted packets from the pending queue */ 971 spin_lock(&card->tx_queue_lock); 972 skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) { 973 if (SKB_CB(skb)->vcc == vcc) { 974 skb_unlink(skb, &card->tx_queue[port]); 975 solos_pop(vcc, skb); 976 } 977 } 978 spin_unlock(&card->tx_queue_lock); 979 980 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 981 if (!skb) { 982 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n"); 983 return; 984 } 985 header = skb_put(skb, sizeof(*header)); 986 987 header->size = cpu_to_le16(0); 988 header->vpi = cpu_to_le16(vcc->vpi); 989 header->vci = cpu_to_le16(vcc->vci); 990 header->type = cpu_to_le16(PKT_PCLOSE); 991 992 skb_get(skb); 993 fpga_queue(card, port, skb, NULL); 994 995 if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ)) 996 dev_warn(&card->dev->dev, 997 "Timeout waiting for VCC close on port %d\n", port); 998 999 dev_kfree_skb(skb); 1000 1001 /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the 1002 tasklet has finished processing any incoming packets (and, more to 1003 the point, using the vcc pointer). */ 1004 tasklet_unlock_wait(&card->tlet); 1005 1006 clear_bit(ATM_VF_ADDR, &vcc->flags); 1007 1008 return; 1009 } 1010 1011 static int print_buffer(struct sk_buff *buf) 1012 { 1013 int len,i; 1014 char msg[500]; 1015 char item[10]; 1016 1017 len = buf->len; 1018 for (i = 0; i < len; i++){ 1019 if(i % 8 == 0) 1020 sprintf(msg, "%02X: ", i); 1021 1022 sprintf(item,"%02X ",*(buf->data + i)); 1023 strcat(msg, item); 1024 if(i % 8 == 7) { 1025 sprintf(item, "\n"); 1026 strcat(msg, item); 1027 printk(KERN_DEBUG "%s", msg); 1028 } 1029 } 1030 if (i % 8 != 0) { 1031 sprintf(item, "\n"); 1032 strcat(msg, item); 1033 printk(KERN_DEBUG "%s", msg); 1034 } 1035 printk(KERN_DEBUG "\n"); 1036 1037 return 0; 1038 } 1039 1040 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 1041 struct atm_vcc *vcc) 1042 { 1043 int old_len; 1044 unsigned long flags; 1045 1046 SKB_CB(skb)->vcc = vcc; 1047 1048 spin_lock_irqsave(&card->tx_queue_lock, flags); 1049 old_len = skb_queue_len(&card->tx_queue[port]); 1050 skb_queue_tail(&card->tx_queue[port], skb); 1051 if (!old_len) 1052 card->tx_mask |= (1 << port); 1053 spin_unlock_irqrestore(&card->tx_queue_lock, flags); 1054 1055 /* Theoretically we could just schedule the tasklet here, but 1056 that introduces latency we don't want -- it's noticeable */ 1057 if (!old_len) 1058 fpga_tx(card); 1059 } 1060 1061 static uint32_t fpga_tx(struct solos_card *card) 1062 { 1063 uint32_t tx_pending, card_flags; 1064 uint32_t tx_started = 0; 1065 struct sk_buff *skb; 1066 struct atm_vcc *vcc; 1067 unsigned char port; 1068 unsigned long flags; 1069 1070 spin_lock_irqsave(&card->tx_lock, flags); 1071 1072 card_flags = ioread32(card->config_regs + FLAGS_ADDR); 1073 /* 1074 * The queue lock is required for _writing_ to tx_mask, but we're 1075 * OK to read it here without locking. The only potential update 1076 * that we could race with is in fpga_queue() where it sets a bit 1077 * for a new port... but it's going to call this function again if 1078 * it's doing that, anyway. 1079 */ 1080 tx_pending = card->tx_mask & ~card_flags; 1081 1082 for (port = 0; tx_pending; tx_pending >>= 1, port++) { 1083 if (tx_pending & 1) { 1084 struct sk_buff *oldskb = card->tx_skb[port]; 1085 if (oldskb) { 1086 dma_unmap_single(&card->dev->dev, SKB_CB(oldskb)->dma_addr, 1087 oldskb->len, DMA_TO_DEVICE); 1088 card->tx_skb[port] = NULL; 1089 } 1090 spin_lock(&card->tx_queue_lock); 1091 skb = skb_dequeue(&card->tx_queue[port]); 1092 if (!skb) 1093 card->tx_mask &= ~(1 << port); 1094 spin_unlock(&card->tx_queue_lock); 1095 1096 if (skb && !card->using_dma) { 1097 memcpy_toio(TX_BUF(card, port), skb->data, skb->len); 1098 tx_started |= 1 << port; 1099 oldskb = skb; /* We're done with this skb already */ 1100 } else if (skb && card->using_dma) { 1101 unsigned char *data = skb->data; 1102 if ((unsigned long)data & card->dma_alignment) { 1103 data = card->dma_bounce + (BUF_SIZE * port); 1104 memcpy(data, skb->data, skb->len); 1105 } 1106 SKB_CB(skb)->dma_addr = dma_map_single(&card->dev->dev, data, 1107 skb->len, DMA_TO_DEVICE); 1108 card->tx_skb[port] = skb; 1109 iowrite32(SKB_CB(skb)->dma_addr, 1110 card->config_regs + TX_DMA_ADDR(port)); 1111 } 1112 1113 if (!oldskb) 1114 continue; 1115 1116 /* Clean up and free oldskb now it's gone */ 1117 if (atmdebug) { 1118 struct pkt_hdr *header = (void *)oldskb->data; 1119 int size = le16_to_cpu(header->size); 1120 1121 skb_pull(oldskb, sizeof(*header)); 1122 dev_info(&card->dev->dev, "Transmitted: port %d\n", 1123 port); 1124 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 1125 size, le16_to_cpu(header->vpi), 1126 le16_to_cpu(header->vci)); 1127 print_buffer(oldskb); 1128 } 1129 1130 vcc = SKB_CB(oldskb)->vcc; 1131 1132 if (vcc) { 1133 atomic_inc(&vcc->stats->tx); 1134 solos_pop(vcc, oldskb); 1135 } else { 1136 dev_kfree_skb_irq(oldskb); 1137 wake_up(&card->param_wq); 1138 } 1139 } 1140 } 1141 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */ 1142 if (tx_started) 1143 iowrite32(tx_started, card->config_regs + FLAGS_ADDR); 1144 1145 spin_unlock_irqrestore(&card->tx_lock, flags); 1146 return card_flags; 1147 } 1148 1149 static int psend(struct atm_vcc *vcc, struct sk_buff *skb) 1150 { 1151 struct solos_card *card = vcc->dev->dev_data; 1152 struct pkt_hdr *header; 1153 int pktlen; 1154 1155 pktlen = skb->len; 1156 if (pktlen > (BUF_SIZE - sizeof(*header))) { 1157 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n"); 1158 solos_pop(vcc, skb); 1159 return 0; 1160 } 1161 1162 if (!skb_clone_writable(skb, sizeof(*header))) { 1163 int expand_by = 0; 1164 int ret; 1165 1166 if (skb_headroom(skb) < sizeof(*header)) 1167 expand_by = sizeof(*header) - skb_headroom(skb); 1168 1169 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC); 1170 if (ret) { 1171 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n"); 1172 solos_pop(vcc, skb); 1173 return ret; 1174 } 1175 } 1176 1177 header = skb_push(skb, sizeof(*header)); 1178 1179 /* This does _not_ include the size of the header */ 1180 header->size = cpu_to_le16(pktlen); 1181 header->vpi = cpu_to_le16(vcc->vpi); 1182 header->vci = cpu_to_le16(vcc->vci); 1183 header->type = cpu_to_le16(PKT_DATA); 1184 1185 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc); 1186 1187 return 0; 1188 } 1189 1190 static const struct atmdev_ops fpga_ops = { 1191 .open = popen, 1192 .close = pclose, 1193 .ioctl = NULL, 1194 .getsockopt = NULL, 1195 .setsockopt = NULL, 1196 .send = psend, 1197 .send_oam = NULL, 1198 .phy_put = NULL, 1199 .phy_get = NULL, 1200 .change_qos = NULL, 1201 .proc_read = NULL, 1202 .owner = THIS_MODULE 1203 }; 1204 1205 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) 1206 { 1207 int err; 1208 uint16_t fpga_ver; 1209 uint8_t major_ver, minor_ver; 1210 uint32_t data32; 1211 struct solos_card *card; 1212 1213 card = kzalloc(sizeof(*card), GFP_KERNEL); 1214 if (!card) 1215 return -ENOMEM; 1216 1217 card->dev = dev; 1218 init_waitqueue_head(&card->fw_wq); 1219 init_waitqueue_head(&card->param_wq); 1220 1221 err = pci_enable_device(dev); 1222 if (err) { 1223 dev_warn(&dev->dev, "Failed to enable PCI device\n"); 1224 goto out; 1225 } 1226 1227 err = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); 1228 if (err) { 1229 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n"); 1230 goto out; 1231 } 1232 1233 err = pci_request_regions(dev, "solos"); 1234 if (err) { 1235 dev_warn(&dev->dev, "Failed to request regions\n"); 1236 goto out; 1237 } 1238 1239 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE); 1240 if (!card->config_regs) { 1241 dev_warn(&dev->dev, "Failed to ioremap config registers\n"); 1242 err = -ENOMEM; 1243 goto out_release_regions; 1244 } 1245 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE); 1246 if (!card->buffers) { 1247 dev_warn(&dev->dev, "Failed to ioremap data buffers\n"); 1248 err = -ENOMEM; 1249 goto out_unmap_config; 1250 } 1251 1252 if (reset) { 1253 iowrite32(1, card->config_regs + FPGA_MODE); 1254 ioread32(card->config_regs + FPGA_MODE); 1255 1256 iowrite32(0, card->config_regs + FPGA_MODE); 1257 ioread32(card->config_regs + FPGA_MODE); 1258 } 1259 1260 data32 = ioread32(card->config_regs + FPGA_VER); 1261 fpga_ver = (data32 & 0x0000FFFF); 1262 major_ver = ((data32 & 0xFF000000) >> 24); 1263 minor_ver = ((data32 & 0x00FF0000) >> 16); 1264 card->fpga_version = FPGA_VERSION(major_ver,minor_ver); 1265 if (card->fpga_version > LEGACY_BUFFERS) 1266 card->buffer_size = BUF_SIZE; 1267 else 1268 card->buffer_size = OLD_BUF_SIZE; 1269 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n", 1270 major_ver, minor_ver, fpga_ver); 1271 1272 if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade || 1273 db_fpga_upgrade || db_firmware_upgrade)) { 1274 dev_warn(&dev->dev, 1275 "FPGA too old; cannot upgrade flash. Use JTAG.\n"); 1276 fpga_upgrade = firmware_upgrade = 0; 1277 db_fpga_upgrade = db_firmware_upgrade = 0; 1278 } 1279 1280 /* Stopped using Atmel flash after 0.03-38 */ 1281 if (fpga_ver < 39) 1282 card->atmel_flash = 1; 1283 else 1284 card->atmel_flash = 0; 1285 1286 data32 = ioread32(card->config_regs + PORTS); 1287 card->nr_ports = (data32 & 0x000000FF); 1288 1289 if (card->fpga_version >= DMA_SUPPORTED) { 1290 pci_set_master(dev); 1291 card->using_dma = 1; 1292 if (1) { /* All known FPGA versions so far */ 1293 card->dma_alignment = 3; 1294 card->dma_bounce = kmalloc(card->nr_ports * BUF_SIZE, GFP_KERNEL); 1295 if (!card->dma_bounce) { 1296 dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n"); 1297 err = -ENOMEM; 1298 /* Fallback to MMIO doesn't work */ 1299 goto out_unmap_both; 1300 } 1301 } 1302 } else { 1303 card->using_dma = 0; 1304 /* Set RX empty flag for all ports */ 1305 iowrite32(0xF0, card->config_regs + FLAGS_ADDR); 1306 } 1307 1308 pci_set_drvdata(dev, card); 1309 1310 tasklet_init(&card->tlet, solos_bh, (unsigned long)card); 1311 spin_lock_init(&card->tx_lock); 1312 spin_lock_init(&card->tx_queue_lock); 1313 spin_lock_init(&card->cli_queue_lock); 1314 spin_lock_init(&card->param_queue_lock); 1315 INIT_LIST_HEAD(&card->param_queue); 1316 1317 err = request_irq(dev->irq, solos_irq, IRQF_SHARED, 1318 "solos-pci", card); 1319 if (err) { 1320 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq); 1321 goto out_unmap_both; 1322 } 1323 1324 iowrite32(1, card->config_regs + IRQ_EN_ADDR); 1325 1326 if (fpga_upgrade) 1327 flash_upgrade(card, 0); 1328 1329 if (firmware_upgrade) 1330 flash_upgrade(card, 1); 1331 1332 if (db_fpga_upgrade) 1333 flash_upgrade(card, 2); 1334 1335 if (db_firmware_upgrade) 1336 flash_upgrade(card, 3); 1337 1338 err = atm_init(card, &dev->dev); 1339 if (err) 1340 goto out_free_irq; 1341 1342 if (card->fpga_version >= DMA_SUPPORTED && 1343 sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group)) 1344 dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n"); 1345 1346 return 0; 1347 1348 out_free_irq: 1349 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1350 free_irq(dev->irq, card); 1351 tasklet_kill(&card->tlet); 1352 1353 out_unmap_both: 1354 kfree(card->dma_bounce); 1355 pci_iounmap(dev, card->buffers); 1356 out_unmap_config: 1357 pci_iounmap(dev, card->config_regs); 1358 out_release_regions: 1359 pci_release_regions(dev); 1360 out: 1361 kfree(card); 1362 return err; 1363 } 1364 1365 static int atm_init(struct solos_card *card, struct device *parent) 1366 { 1367 int i; 1368 1369 for (i = 0; i < card->nr_ports; i++) { 1370 struct sk_buff *skb; 1371 struct pkt_hdr *header; 1372 1373 skb_queue_head_init(&card->tx_queue[i]); 1374 skb_queue_head_init(&card->cli_queue[i]); 1375 1376 card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL); 1377 if (!card->atmdev[i]) { 1378 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i); 1379 atm_remove(card); 1380 return -ENODEV; 1381 } 1382 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console)) 1383 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i); 1384 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group)) 1385 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i); 1386 1387 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number); 1388 1389 card->atmdev[i]->ci_range.vpi_bits = 8; 1390 card->atmdev[i]->ci_range.vci_bits = 16; 1391 card->atmdev[i]->dev_data = card; 1392 card->atmdev[i]->phy_data = (void *)(unsigned long)i; 1393 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND); 1394 1395 skb = alloc_skb(sizeof(*header), GFP_KERNEL); 1396 if (!skb) { 1397 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n"); 1398 continue; 1399 } 1400 1401 header = skb_put(skb, sizeof(*header)); 1402 1403 header->size = cpu_to_le16(0); 1404 header->vpi = cpu_to_le16(0); 1405 header->vci = cpu_to_le16(0); 1406 header->type = cpu_to_le16(PKT_STATUS); 1407 1408 fpga_queue(card, i, skb, NULL); 1409 } 1410 return 0; 1411 } 1412 1413 static void atm_remove(struct solos_card *card) 1414 { 1415 int i; 1416 1417 for (i = 0; i < card->nr_ports; i++) { 1418 if (card->atmdev[i]) { 1419 struct sk_buff *skb; 1420 1421 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number); 1422 1423 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group); 1424 atm_dev_deregister(card->atmdev[i]); 1425 1426 skb = card->rx_skb[i]; 1427 if (skb) { 1428 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 1429 RX_DMA_SIZE, DMA_FROM_DEVICE); 1430 dev_kfree_skb(skb); 1431 } 1432 skb = card->tx_skb[i]; 1433 if (skb) { 1434 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr, 1435 skb->len, DMA_TO_DEVICE); 1436 dev_kfree_skb(skb); 1437 } 1438 while ((skb = skb_dequeue(&card->tx_queue[i]))) 1439 dev_kfree_skb(skb); 1440 1441 } 1442 } 1443 } 1444 1445 static void fpga_remove(struct pci_dev *dev) 1446 { 1447 struct solos_card *card = pci_get_drvdata(dev); 1448 1449 /* Disable IRQs */ 1450 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1451 1452 /* Reset FPGA */ 1453 iowrite32(1, card->config_regs + FPGA_MODE); 1454 (void)ioread32(card->config_regs + FPGA_MODE); 1455 1456 if (card->fpga_version >= DMA_SUPPORTED) 1457 sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group); 1458 1459 atm_remove(card); 1460 1461 free_irq(dev->irq, card); 1462 tasklet_kill(&card->tlet); 1463 1464 kfree(card->dma_bounce); 1465 1466 /* Release device from reset */ 1467 iowrite32(0, card->config_regs + FPGA_MODE); 1468 (void)ioread32(card->config_regs + FPGA_MODE); 1469 1470 pci_iounmap(dev, card->buffers); 1471 pci_iounmap(dev, card->config_regs); 1472 1473 pci_release_regions(dev); 1474 pci_disable_device(dev); 1475 1476 kfree(card); 1477 } 1478 1479 static const struct pci_device_id fpga_pci_tbl[] = { 1480 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 1481 { 0, } 1482 }; 1483 1484 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl); 1485 1486 static struct pci_driver fpga_driver = { 1487 .name = "solos", 1488 .id_table = fpga_pci_tbl, 1489 .probe = fpga_probe, 1490 .remove = fpga_remove, 1491 }; 1492 1493 1494 static int __init solos_pci_init(void) 1495 { 1496 BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb)); 1497 1498 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION); 1499 return pci_register_driver(&fpga_driver); 1500 } 1501 1502 static void __exit solos_pci_exit(void) 1503 { 1504 pci_unregister_driver(&fpga_driver); 1505 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION); 1506 } 1507 1508 module_init(solos_pci_init); 1509 module_exit(solos_pci_exit); 1510