1/* 2 * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit 3 * 4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9 */ 10 11 12#include <linux/linkage.h> 13#include <linux/threads.h> 14#include <linux/init.h> 15#include <asm/segment.h> 16#include <asm/pgtable.h> 17#include <asm/page.h> 18#include <asm/msr.h> 19#include <asm/cache.h> 20#include <asm/processor-flags.h> 21#include <asm/percpu.h> 22 23#ifdef CONFIG_PARAVIRT 24#include <asm/asm-offsets.h> 25#include <asm/paravirt.h> 26#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 27#else 28#define GET_CR2_INTO(reg) movq %cr2, reg 29#endif 30 31/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 32 * because we need identity-mapped pages. 33 * 34 */ 35 36#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 37 38L4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) 39L3_PAGE_OFFSET = pud_index(__PAGE_OFFSET) 40L4_START_KERNEL = pgd_index(__START_KERNEL_map) 41L3_START_KERNEL = pud_index(__START_KERNEL_map) 42 43 .text 44 __HEAD 45 .code64 46 .globl startup_64 47startup_64: 48 49 /* 50 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 51 * and someone has loaded an identity mapped page table 52 * for us. These identity mapped page tables map all of the 53 * kernel pages and possibly all of memory. 54 * 55 * %esi holds a physical pointer to real_mode_data. 56 * 57 * We come here either directly from a 64bit bootloader, or from 58 * arch/x86_64/boot/compressed/head.S. 59 * 60 * We only come here initially at boot nothing else comes here. 61 * 62 * Since we may be loaded at an address different from what we were 63 * compiled to run at we first fixup the physical addresses in our page 64 * tables and then reload them. 65 */ 66 67 /* Compute the delta between the address I am compiled to run at and the 68 * address I am actually running at. 69 */ 70 leaq _text(%rip), %rbp 71 subq $_text - __START_KERNEL_map, %rbp 72 73 /* Is the address not 2M aligned? */ 74 movq %rbp, %rax 75 andl $~PMD_PAGE_MASK, %eax 76 testl %eax, %eax 77 jnz bad_address 78 79 /* Is the address too large? */ 80 leaq _text(%rip), %rdx 81 movq $PGDIR_SIZE, %rax 82 cmpq %rax, %rdx 83 jae bad_address 84 85 /* Fixup the physical addresses in the page table 86 */ 87 addq %rbp, init_level4_pgt + 0(%rip) 88 addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip) 89 addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip) 90 91 addq %rbp, level3_ident_pgt + 0(%rip) 92 93 addq %rbp, level3_kernel_pgt + (510*8)(%rip) 94 addq %rbp, level3_kernel_pgt + (511*8)(%rip) 95 96 addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 97 98 /* Add an Identity mapping if I am above 1G */ 99 leaq _text(%rip), %rdi 100 andq $PMD_PAGE_MASK, %rdi 101 102 movq %rdi, %rax 103 shrq $PUD_SHIFT, %rax 104 andq $(PTRS_PER_PUD - 1), %rax 105 jz ident_complete 106 107 leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx 108 leaq level3_ident_pgt(%rip), %rbx 109 movq %rdx, 0(%rbx, %rax, 8) 110 111 movq %rdi, %rax 112 shrq $PMD_SHIFT, %rax 113 andq $(PTRS_PER_PMD - 1), %rax 114 leaq __PAGE_KERNEL_IDENT_LARGE_EXEC(%rdi), %rdx 115 leaq level2_spare_pgt(%rip), %rbx 116 movq %rdx, 0(%rbx, %rax, 8) 117ident_complete: 118 119 /* 120 * Fixup the kernel text+data virtual addresses. Note that 121 * we might write invalid pmds, when the kernel is relocated 122 * cleanup_highmap() fixes this up along with the mappings 123 * beyond _end. 124 */ 125 126 leaq level2_kernel_pgt(%rip), %rdi 127 leaq 4096(%rdi), %r8 128 /* See if it is a valid page table entry */ 1291: testq $1, 0(%rdi) 130 jz 2f 131 addq %rbp, 0(%rdi) 132 /* Go to the next page */ 1332: addq $8, %rdi 134 cmp %r8, %rdi 135 jne 1b 136 137 /* Fixup phys_base */ 138 addq %rbp, phys_base(%rip) 139 140 /* Fixup trampoline */ 141 addq %rbp, trampoline_level4_pgt + 0(%rip) 142 addq %rbp, trampoline_level4_pgt + (511*8)(%rip) 143 144 /* Due to ENTRY(), sometimes the empty space gets filled with 145 * zeros. Better take a jmp than relying on empty space being 146 * filled with 0x90 (nop) 147 */ 148 jmp secondary_startup_64 149ENTRY(secondary_startup_64) 150 /* 151 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1, 152 * and someone has loaded a mapped page table. 153 * 154 * %esi holds a physical pointer to real_mode_data. 155 * 156 * We come here either from startup_64 (using physical addresses) 157 * or from trampoline.S (using virtual addresses). 158 * 159 * Using virtual addresses from trampoline.S removes the need 160 * to have any identity mapped pages in the kernel page table 161 * after the boot processor executes this code. 162 */ 163 164 /* Enable PAE mode and PGE */ 165 movl $(X86_CR4_PAE | X86_CR4_PGE), %eax 166 movq %rax, %cr4 167 168 /* Setup early boot stage 4 level pagetables. */ 169 movq $(init_level4_pgt - __START_KERNEL_map), %rax 170 addq phys_base(%rip), %rax 171 movq %rax, %cr3 172 173 /* Ensure I am executing from virtual addresses */ 174 movq $1f, %rax 175 jmp *%rax 1761: 177 178 /* Check if nx is implemented */ 179 movl $0x80000001, %eax 180 cpuid 181 movl %edx,%edi 182 183 /* Setup EFER (Extended Feature Enable Register) */ 184 movl $MSR_EFER, %ecx 185 rdmsr 186 btsl $_EFER_SCE, %eax /* Enable System Call */ 187 btl $20,%edi /* No Execute supported? */ 188 jnc 1f 189 btsl $_EFER_NX, %eax 1901: wrmsr /* Make changes effective */ 191 192 /* Setup cr0 */ 193#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 194 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 195 X86_CR0_PG) 196 movl $CR0_STATE, %eax 197 /* Make changes effective */ 198 movq %rax, %cr0 199 200 /* Setup a boot time stack */ 201 movq stack_start(%rip),%rsp 202 203 /* zero EFLAGS after setting rsp */ 204 pushq $0 205 popfq 206 207 /* 208 * We must switch to a new descriptor in kernel space for the GDT 209 * because soon the kernel won't have access anymore to the userspace 210 * addresses where we're currently running on. We have to do that here 211 * because in 32bit we couldn't load a 64bit linear address. 212 */ 213 lgdt early_gdt_descr(%rip) 214 215 /* set up data segments */ 216 xorl %eax,%eax 217 movl %eax,%ds 218 movl %eax,%ss 219 movl %eax,%es 220 221 /* 222 * We don't really need to load %fs or %gs, but load them anyway 223 * to kill any stale realmode selectors. This allows execution 224 * under VT hardware. 225 */ 226 movl %eax,%fs 227 movl %eax,%gs 228 229 /* Set up %gs. 230 * 231 * The base of %gs always points to the bottom of the irqstack 232 * union. If the stack protector canary is enabled, it is 233 * located at %gs:40. Note that, on SMP, the boot cpu uses 234 * init data section till per cpu areas are set up. 235 */ 236 movl $MSR_GS_BASE,%ecx 237 movl initial_gs(%rip),%eax 238 movl initial_gs+4(%rip),%edx 239 wrmsr 240 241 /* esi is pointer to real mode structure with interesting info. 242 pass it to C */ 243 movl %esi, %edi 244 245 /* Finally jump to run C code and to be on real kernel address 246 * Since we are running on identity-mapped space we have to jump 247 * to the full 64bit address, this is only possible as indirect 248 * jump. In addition we need to ensure %cs is set so we make this 249 * a far return. 250 */ 251 movq initial_code(%rip),%rax 252 pushq $0 # fake return address to stop unwinder 253 pushq $__KERNEL_CS # set correct cs 254 pushq %rax # target address in negative space 255 lretq 256 257 /* SMP bootup changes these two */ 258 __REFDATA 259 .align 8 260 ENTRY(initial_code) 261 .quad x86_64_start_kernel 262 ENTRY(initial_gs) 263 .quad INIT_PER_CPU_VAR(irq_stack_union) 264 265 ENTRY(stack_start) 266 .quad init_thread_union+THREAD_SIZE-8 267 .word 0 268 __FINITDATA 269 270bad_address: 271 jmp bad_address 272 273 .section ".init.text","ax" 274#ifdef CONFIG_EARLY_PRINTK 275 .globl early_idt_handlers 276early_idt_handlers: 277 i = 0 278 .rept NUM_EXCEPTION_VECTORS 279 movl $i, %esi 280 jmp early_idt_handler 281 i = i + 1 282 .endr 283#endif 284 285ENTRY(early_idt_handler) 286#ifdef CONFIG_EARLY_PRINTK 287 cmpl $2,early_recursion_flag(%rip) 288 jz 1f 289 incl early_recursion_flag(%rip) 290 GET_CR2_INTO(%r9) 291 xorl %r8d,%r8d # zero for error code 292 movl %esi,%ecx # get vector number 293 # Test %ecx against mask of vectors that push error code. 294 cmpl $31,%ecx 295 ja 0f 296 movl $1,%eax 297 salq %cl,%rax 298 testl $EXCEPTION_ERRCODE_MASK,%eax 299 je 0f 300 popq %r8 # get error code 3010: movq 0(%rsp),%rcx # get ip 302 movq 8(%rsp),%rdx # get cs 303 xorl %eax,%eax 304 leaq early_idt_msg(%rip),%rdi 305 call early_printk 306 cmpl $2,early_recursion_flag(%rip) 307 jz 1f 308 call dump_stack 309#ifdef CONFIG_KALLSYMS 310 leaq early_idt_ripmsg(%rip),%rdi 311 movq 0(%rsp),%rsi # get rip again 312 call __print_symbol 313#endif 314#endif /* EARLY_PRINTK */ 3151: hlt 316 jmp 1b 317 318#ifdef CONFIG_EARLY_PRINTK 319early_recursion_flag: 320 .long 0 321 322early_idt_msg: 323 .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n" 324early_idt_ripmsg: 325 .asciz "RIP %s\n" 326#endif /* CONFIG_EARLY_PRINTK */ 327 .previous 328 329#define NEXT_PAGE(name) \ 330 .balign PAGE_SIZE; \ 331ENTRY(name) 332 333/* Automate the creation of 1 to 1 mapping pmd entries */ 334#define PMDS(START, PERM, COUNT) \ 335 i = 0 ; \ 336 .rept (COUNT) ; \ 337 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 338 i = i + 1 ; \ 339 .endr 340 341 .data 342 /* 343 * This default setting generates an ident mapping at address 0x100000 344 * and a mapping for the kernel that precisely maps virtual address 345 * 0xffffffff80000000 to physical address 0x000000. (always using 346 * 2Mbyte large pages provided by PAE mode) 347 */ 348NEXT_PAGE(init_level4_pgt) 349 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 350 .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 351 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 352 .org init_level4_pgt + L4_START_KERNEL*8, 0 353 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 354 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 355 356NEXT_PAGE(level3_ident_pgt) 357 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 358 .fill 511,8,0 359 360NEXT_PAGE(level3_kernel_pgt) 361 .fill L3_START_KERNEL,8,0 362 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 363 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 364 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 365 366NEXT_PAGE(level2_fixmap_pgt) 367 .fill 506,8,0 368 .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 369 /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 370 .fill 5,8,0 371 372NEXT_PAGE(level1_fixmap_pgt) 373 .fill 512,8,0 374 375NEXT_PAGE(level2_ident_pgt) 376 /* Since I easily can, map the first 1G. 377 * Don't set NX because code runs from these pages. 378 */ 379 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 380 381NEXT_PAGE(level2_kernel_pgt) 382 /* 383 * 512 MB kernel mapping. We spend a full page on this pagetable 384 * anyway. 385 * 386 * The kernel code+data+bss must not be bigger than that. 387 * 388 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 389 * If you want to increase this then increase MODULES_VADDR 390 * too.) 391 */ 392 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 393 KERNEL_IMAGE_SIZE/PMD_SIZE) 394 395NEXT_PAGE(level2_spare_pgt) 396 .fill 512, 8, 0 397 398#undef PMDS 399#undef NEXT_PAGE 400 401 .data 402 .align 16 403 .globl early_gdt_descr 404early_gdt_descr: 405 .word GDT_ENTRIES*8-1 406early_gdt_descr_base: 407 .quad INIT_PER_CPU_VAR(gdt_page) 408 409ENTRY(phys_base) 410 /* This must match the first entry in level2_kernel_pgt */ 411 .quad 0x0000000000000000 412 413#include "../../x86/xen/xen-head.S" 414 415 .section .bss, "aw", @nobits 416 .align L1_CACHE_BYTES 417ENTRY(idt_table) 418 .skip IDT_ENTRIES * 16 419 420 .align L1_CACHE_BYTES 421ENTRY(nmi_idt_table) 422 .skip IDT_ENTRIES * 16 423 424 __PAGE_ALIGNED_BSS 425 .align PAGE_SIZE 426ENTRY(empty_zero_page) 427 .skip PAGE_SIZE 428