1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4 * 5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10 */ 11 12 13#include <linux/linkage.h> 14#include <linux/threads.h> 15#include <linux/init.h> 16#include <asm/segment.h> 17#include <asm/pgtable.h> 18#include <asm/page.h> 19#include <asm/msr.h> 20#include <asm/cache.h> 21#include <asm/processor-flags.h> 22#include <asm/percpu.h> 23#include <asm/nops.h> 24#include "../entry/calling.h" 25#include <asm/export.h> 26#include <asm/nospec-branch.h> 27#include <asm/fixmap.h> 28 29#ifdef CONFIG_PARAVIRT_XXL 30#include <asm/asm-offsets.h> 31#include <asm/paravirt.h> 32#else 33#define INTERRUPT_RETURN iretq 34#endif 35 36/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 37 * because we need identity-mapped pages. 38 * 39 */ 40 41#define l4_index(x) (((x) >> 39) & 511) 42#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 43 44L4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 45L4_START_KERNEL = l4_index(__START_KERNEL_map) 46 47L3_START_KERNEL = pud_index(__START_KERNEL_map) 48 49 .text 50 __HEAD 51 .code64 52SYM_CODE_START_NOALIGN(startup_64) 53 UNWIND_HINT_EMPTY 54 /* 55 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 56 * and someone has loaded an identity mapped page table 57 * for us. These identity mapped page tables map all of the 58 * kernel pages and possibly all of memory. 59 * 60 * %rsi holds a physical pointer to real_mode_data. 61 * 62 * We come here either directly from a 64bit bootloader, or from 63 * arch/x86/boot/compressed/head_64.S. 64 * 65 * We only come here initially at boot nothing else comes here. 66 * 67 * Since we may be loaded at an address different from what we were 68 * compiled to run at we first fixup the physical addresses in our page 69 * tables and then reload them. 70 */ 71 72 /* Set up the stack for verify_cpu(), similar to initial_stack below */ 73 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 74 75 /* Sanitize CPU configuration */ 76 call verify_cpu 77 78 /* 79 * Perform pagetable fixups. Additionally, if SME is active, encrypt 80 * the kernel and retrieve the modifier (SME encryption mask if SME 81 * is active) to be added to the initial pgdir entry that will be 82 * programmed into CR3. 83 */ 84 leaq _text(%rip), %rdi 85 pushq %rsi 86 call __startup_64 87 popq %rsi 88 89 /* Form the CR3 value being sure to include the CR3 modifier */ 90 addq $(early_top_pgt - __START_KERNEL_map), %rax 91 jmp 1f 92SYM_CODE_END(startup_64) 93 94SYM_CODE_START(secondary_startup_64) 95 UNWIND_HINT_EMPTY 96 /* 97 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 98 * and someone has loaded a mapped page table. 99 * 100 * %rsi holds a physical pointer to real_mode_data. 101 * 102 * We come here either from startup_64 (using physical addresses) 103 * or from trampoline.S (using virtual addresses). 104 * 105 * Using virtual addresses from trampoline.S removes the need 106 * to have any identity mapped pages in the kernel page table 107 * after the boot processor executes this code. 108 */ 109 110 /* Sanitize CPU configuration */ 111 call verify_cpu 112 113 /* 114 * Retrieve the modifier (SME encryption mask if SME is active) to be 115 * added to the initial pgdir entry that will be programmed into CR3. 116 */ 117 pushq %rsi 118 call __startup_secondary_64 119 popq %rsi 120 121 /* Form the CR3 value being sure to include the CR3 modifier */ 122 addq $(init_top_pgt - __START_KERNEL_map), %rax 1231: 124 125 /* Enable PAE mode, PGE and LA57 */ 126 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 127#ifdef CONFIG_X86_5LEVEL 128 testl $1, __pgtable_l5_enabled(%rip) 129 jz 1f 130 orl $X86_CR4_LA57, %ecx 1311: 132#endif 133 movq %rcx, %cr4 134 135 /* Setup early boot stage 4-/5-level pagetables. */ 136 addq phys_base(%rip), %rax 137 movq %rax, %cr3 138 139 /* Ensure I am executing from virtual addresses */ 140 movq $1f, %rax 141 ANNOTATE_RETPOLINE_SAFE 142 jmp *%rax 1431: 144 UNWIND_HINT_EMPTY 145 146 /* Check if nx is implemented */ 147 movl $0x80000001, %eax 148 cpuid 149 movl %edx,%edi 150 151 /* Setup EFER (Extended Feature Enable Register) */ 152 movl $MSR_EFER, %ecx 153 rdmsr 154 btsl $_EFER_SCE, %eax /* Enable System Call */ 155 btl $20,%edi /* No Execute supported? */ 156 jnc 1f 157 btsl $_EFER_NX, %eax 158 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 1591: wrmsr /* Make changes effective */ 160 161 /* Setup cr0 */ 162 movl $CR0_STATE, %eax 163 /* Make changes effective */ 164 movq %rax, %cr0 165 166 /* Setup a boot time stack */ 167 movq initial_stack(%rip), %rsp 168 169 /* zero EFLAGS after setting rsp */ 170 pushq $0 171 popfq 172 173 /* 174 * We must switch to a new descriptor in kernel space for the GDT 175 * because soon the kernel won't have access anymore to the userspace 176 * addresses where we're currently running on. We have to do that here 177 * because in 32bit we couldn't load a 64bit linear address. 178 */ 179 lgdt early_gdt_descr(%rip) 180 181 /* set up data segments */ 182 xorl %eax,%eax 183 movl %eax,%ds 184 movl %eax,%ss 185 movl %eax,%es 186 187 /* 188 * We don't really need to load %fs or %gs, but load them anyway 189 * to kill any stale realmode selectors. This allows execution 190 * under VT hardware. 191 */ 192 movl %eax,%fs 193 movl %eax,%gs 194 195 /* Set up %gs. 196 * 197 * The base of %gs always points to fixed_percpu_data. If the 198 * stack protector canary is enabled, it is located at %gs:40. 199 * Note that, on SMP, the boot cpu uses init data section until 200 * the per cpu areas are set up. 201 */ 202 movl $MSR_GS_BASE,%ecx 203 movl initial_gs(%rip),%eax 204 movl initial_gs+4(%rip),%edx 205 wrmsr 206 207 /* rsi is pointer to real mode structure with interesting info. 208 pass it to C */ 209 movq %rsi, %rdi 210 211.Ljump_to_C_code: 212 /* 213 * Jump to run C code and to be on a real kernel address. 214 * Since we are running on identity-mapped space we have to jump 215 * to the full 64bit address, this is only possible as indirect 216 * jump. In addition we need to ensure %cs is set so we make this 217 * a far return. 218 * 219 * Note: do not change to far jump indirect with 64bit offset. 220 * 221 * AMD does not support far jump indirect with 64bit offset. 222 * AMD64 Architecture Programmer's Manual, Volume 3: states only 223 * JMP FAR mem16:16 FF /5 Far jump indirect, 224 * with the target specified by a far pointer in memory. 225 * JMP FAR mem16:32 FF /5 Far jump indirect, 226 * with the target specified by a far pointer in memory. 227 * 228 * Intel64 does support 64bit offset. 229 * Software Developer Manual Vol 2: states: 230 * FF /5 JMP m16:16 Jump far, absolute indirect, 231 * address given in m16:16 232 * FF /5 JMP m16:32 Jump far, absolute indirect, 233 * address given in m16:32. 234 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 235 * address given in m16:64. 236 */ 237 pushq $.Lafter_lret # put return address on stack for unwinder 238 xorl %ebp, %ebp # clear frame pointer 239 movq initial_code(%rip), %rax 240 pushq $__KERNEL_CS # set correct cs 241 pushq %rax # target address in negative space 242 lretq 243.Lafter_lret: 244SYM_CODE_END(secondary_startup_64) 245 246#include "verify_cpu.S" 247 248#ifdef CONFIG_HOTPLUG_CPU 249/* 250 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 251 * up already except stack. We just set up stack here. Then call 252 * start_secondary() via .Ljump_to_C_code. 253 */ 254SYM_CODE_START(start_cpu0) 255 UNWIND_HINT_EMPTY 256 movq initial_stack(%rip), %rsp 257 jmp .Ljump_to_C_code 258SYM_CODE_END(start_cpu0) 259#endif 260 261 /* Both SMP bootup and ACPI suspend change these variables */ 262 __REFDATA 263 .balign 8 264SYM_DATA(initial_code, .quad x86_64_start_kernel) 265SYM_DATA(initial_gs, .quad INIT_PER_CPU_VAR(fixed_percpu_data)) 266 267/* 268 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 269 * reliably detect the end of the stack. 270 */ 271SYM_DATA(initial_stack, .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS) 272 __FINITDATA 273 274 __INIT 275SYM_CODE_START(early_idt_handler_array) 276 i = 0 277 .rept NUM_EXCEPTION_VECTORS 278 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 279 UNWIND_HINT_IRET_REGS 280 pushq $0 # Dummy error code, to make stack frame uniform 281 .else 282 UNWIND_HINT_IRET_REGS offset=8 283 .endif 284 pushq $i # 72(%rsp) Vector number 285 jmp early_idt_handler_common 286 UNWIND_HINT_IRET_REGS 287 i = i + 1 288 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 289 .endr 290 UNWIND_HINT_IRET_REGS offset=16 291SYM_CODE_END(early_idt_handler_array) 292 293SYM_CODE_START_LOCAL(early_idt_handler_common) 294 /* 295 * The stack is the hardware frame, an error code or zero, and the 296 * vector number. 297 */ 298 cld 299 300 incl early_recursion_flag(%rip) 301 302 /* The vector number is currently in the pt_regs->di slot. */ 303 pushq %rsi /* pt_regs->si */ 304 movq 8(%rsp), %rsi /* RSI = vector number */ 305 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 306 pushq %rdx /* pt_regs->dx */ 307 pushq %rcx /* pt_regs->cx */ 308 pushq %rax /* pt_regs->ax */ 309 pushq %r8 /* pt_regs->r8 */ 310 pushq %r9 /* pt_regs->r9 */ 311 pushq %r10 /* pt_regs->r10 */ 312 pushq %r11 /* pt_regs->r11 */ 313 pushq %rbx /* pt_regs->bx */ 314 pushq %rbp /* pt_regs->bp */ 315 pushq %r12 /* pt_regs->r12 */ 316 pushq %r13 /* pt_regs->r13 */ 317 pushq %r14 /* pt_regs->r14 */ 318 pushq %r15 /* pt_regs->r15 */ 319 UNWIND_HINT_REGS 320 321 cmpq $14,%rsi /* Page fault? */ 322 jnz 10f 323 GET_CR2_INTO(%rdi) /* can clobber %rax if pv */ 324 call early_make_pgtable 325 andl %eax,%eax 326 jz 20f /* All good */ 327 32810: 329 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 330 call early_fixup_exception 331 33220: 333 decl early_recursion_flag(%rip) 334 jmp restore_regs_and_return_to_kernel 335SYM_CODE_END(early_idt_handler_common) 336 337 338#define SYM_DATA_START_PAGE_ALIGNED(name) \ 339 SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 340 341#ifdef CONFIG_PAGE_TABLE_ISOLATION 342/* 343 * Each PGD needs to be 8k long and 8k aligned. We do not 344 * ever go out to userspace with these, so we do not 345 * strictly *need* the second page, but this allows us to 346 * have a single set_pgd() implementation that does not 347 * need to worry about whether it has 4k or 8k to work 348 * with. 349 * 350 * This ensures PGDs are 8k long: 351 */ 352#define PTI_USER_PGD_FILL 512 353/* This ensures they are 8k-aligned: */ 354#define SYM_DATA_START_PTI_ALIGNED(name) \ 355 SYM_START(name, SYM_L_GLOBAL, .balign 2 * PAGE_SIZE) 356#else 357#define SYM_DATA_START_PTI_ALIGNED(name) \ 358 SYM_DATA_START_PAGE_ALIGNED(name) 359#define PTI_USER_PGD_FILL 0 360#endif 361 362/* Automate the creation of 1 to 1 mapping pmd entries */ 363#define PMDS(START, PERM, COUNT) \ 364 i = 0 ; \ 365 .rept (COUNT) ; \ 366 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 367 i = i + 1 ; \ 368 .endr 369 370 __INITDATA 371 .balign 4 372 373SYM_DATA_START_PTI_ALIGNED(early_top_pgt) 374 .fill 512,8,0 375 .fill PTI_USER_PGD_FILL,8,0 376SYM_DATA_END(early_top_pgt) 377 378SYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts) 379 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 380SYM_DATA_END(early_dynamic_pgts) 381 382SYM_DATA(early_recursion_flag, .long 0) 383 384 .data 385 386#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH) 387SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 388 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 389 .org init_top_pgt + L4_PAGE_OFFSET*8, 0 390 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 391 .org init_top_pgt + L4_START_KERNEL*8, 0 392 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 393 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 394 .fill PTI_USER_PGD_FILL,8,0 395SYM_DATA_END(init_top_pgt) 396 397SYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt) 398 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 399 .fill 511, 8, 0 400SYM_DATA_END(level3_ident_pgt) 401SYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt) 402 /* 403 * Since I easily can, map the first 1G. 404 * Don't set NX because code runs from these pages. 405 * 406 * Note: This sets _PAGE_GLOBAL despite whether 407 * the CPU supports it or it is enabled. But, 408 * the CPU should ignore the bit. 409 */ 410 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 411SYM_DATA_END(level2_ident_pgt) 412#else 413SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 414 .fill 512,8,0 415 .fill PTI_USER_PGD_FILL,8,0 416SYM_DATA_END(init_top_pgt) 417#endif 418 419#ifdef CONFIG_X86_5LEVEL 420SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt) 421 .fill 511,8,0 422 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 423SYM_DATA_END(level4_kernel_pgt) 424#endif 425 426SYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt) 427 .fill L3_START_KERNEL,8,0 428 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 429 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 430 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 431SYM_DATA_END(level3_kernel_pgt) 432 433SYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt) 434 /* 435 * 512 MB kernel mapping. We spend a full page on this pagetable 436 * anyway. 437 * 438 * The kernel code+data+bss must not be bigger than that. 439 * 440 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 441 * If you want to increase this then increase MODULES_VADDR 442 * too.) 443 * 444 * This table is eventually used by the kernel during normal 445 * runtime. Care must be taken to clear out undesired bits 446 * later, like _PAGE_RW or _PAGE_GLOBAL in some cases. 447 */ 448 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 449 KERNEL_IMAGE_SIZE/PMD_SIZE) 450SYM_DATA_END(level2_kernel_pgt) 451 452SYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt) 453 .fill (512 - 4 - FIXMAP_PMD_NUM),8,0 454 pgtno = 0 455 .rept (FIXMAP_PMD_NUM) 456 .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \ 457 + _PAGE_TABLE_NOENC; 458 pgtno = pgtno + 1 459 .endr 460 /* 6 MB reserved space + a 2MB hole */ 461 .fill 4,8,0 462SYM_DATA_END(level2_fixmap_pgt) 463 464SYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) 465 .rept (FIXMAP_PMD_NUM) 466 .fill 512,8,0 467 .endr 468SYM_DATA_END(level1_fixmap_pgt) 469 470#undef PMDS 471 472 .data 473 .align 16 474 475SYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) 476SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) 477 478 .align 16 479/* This must match the first entry in level2_kernel_pgt */ 480SYM_DATA(phys_base, .quad 0x0) 481EXPORT_SYMBOL(phys_base) 482 483#include "../../x86/xen/xen-head.S" 484 485 __PAGE_ALIGNED_BSS 486SYM_DATA_START_PAGE_ALIGNED(empty_zero_page) 487 .skip PAGE_SIZE 488SYM_DATA_END(empty_zero_page) 489EXPORT_SYMBOL(empty_zero_page) 490 491