1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4 * 5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10 */ 11 12 13#include <linux/linkage.h> 14#include <linux/threads.h> 15#include <linux/init.h> 16#include <linux/pgtable.h> 17#include <asm/segment.h> 18#include <asm/page.h> 19#include <asm/msr.h> 20#include <asm/cache.h> 21#include <asm/processor-flags.h> 22#include <asm/percpu.h> 23#include <asm/nops.h> 24#include "../entry/calling.h" 25#include <asm/export.h> 26#include <asm/nospec-branch.h> 27#include <asm/fixmap.h> 28 29#ifdef CONFIG_PARAVIRT_XXL 30#include <asm/asm-offsets.h> 31#include <asm/paravirt.h> 32#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg 33#else 34#define INTERRUPT_RETURN iretq 35#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg 36#endif 37 38/* 39 * We are not able to switch in one step to the final KERNEL ADDRESS SPACE 40 * because we need identity-mapped pages. 41 */ 42#define l4_index(x) (((x) >> 39) & 511) 43#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 44 45L4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 46L4_START_KERNEL = l4_index(__START_KERNEL_map) 47 48L3_START_KERNEL = pud_index(__START_KERNEL_map) 49 50 .text 51 __HEAD 52 .code64 53SYM_CODE_START_NOALIGN(startup_64) 54 UNWIND_HINT_EMPTY 55 /* 56 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 57 * and someone has loaded an identity mapped page table 58 * for us. These identity mapped page tables map all of the 59 * kernel pages and possibly all of memory. 60 * 61 * %rsi holds a physical pointer to real_mode_data. 62 * 63 * We come here either directly from a 64bit bootloader, or from 64 * arch/x86/boot/compressed/head_64.S. 65 * 66 * We only come here initially at boot nothing else comes here. 67 * 68 * Since we may be loaded at an address different from what we were 69 * compiled to run at we first fixup the physical addresses in our page 70 * tables and then reload them. 71 */ 72 73 /* Set up the stack for verify_cpu(), similar to initial_stack below */ 74 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 75 76 /* Sanitize CPU configuration */ 77 call verify_cpu 78 79 /* 80 * Perform pagetable fixups. Additionally, if SME is active, encrypt 81 * the kernel and retrieve the modifier (SME encryption mask if SME 82 * is active) to be added to the initial pgdir entry that will be 83 * programmed into CR3. 84 */ 85 leaq _text(%rip), %rdi 86 pushq %rsi 87 call __startup_64 88 popq %rsi 89 90 /* Form the CR3 value being sure to include the CR3 modifier */ 91 addq $(early_top_pgt - __START_KERNEL_map), %rax 92 jmp 1f 93SYM_CODE_END(startup_64) 94 95SYM_CODE_START(secondary_startup_64) 96 UNWIND_HINT_EMPTY 97 /* 98 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 99 * and someone has loaded a mapped page table. 100 * 101 * %rsi holds a physical pointer to real_mode_data. 102 * 103 * We come here either from startup_64 (using physical addresses) 104 * or from trampoline.S (using virtual addresses). 105 * 106 * Using virtual addresses from trampoline.S removes the need 107 * to have any identity mapped pages in the kernel page table 108 * after the boot processor executes this code. 109 */ 110 111 /* Sanitize CPU configuration */ 112 call verify_cpu 113 114 /* 115 * Retrieve the modifier (SME encryption mask if SME is active) to be 116 * added to the initial pgdir entry that will be programmed into CR3. 117 */ 118 pushq %rsi 119 call __startup_secondary_64 120 popq %rsi 121 122 /* Form the CR3 value being sure to include the CR3 modifier */ 123 addq $(init_top_pgt - __START_KERNEL_map), %rax 1241: 125 126 /* Enable PAE mode, PGE and LA57 */ 127 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 128#ifdef CONFIG_X86_5LEVEL 129 testl $1, __pgtable_l5_enabled(%rip) 130 jz 1f 131 orl $X86_CR4_LA57, %ecx 1321: 133#endif 134 movq %rcx, %cr4 135 136 /* Setup early boot stage 4-/5-level pagetables. */ 137 addq phys_base(%rip), %rax 138 movq %rax, %cr3 139 140 /* Ensure I am executing from virtual addresses */ 141 movq $1f, %rax 142 ANNOTATE_RETPOLINE_SAFE 143 jmp *%rax 1441: 145 UNWIND_HINT_EMPTY 146 147 /* Check if nx is implemented */ 148 movl $0x80000001, %eax 149 cpuid 150 movl %edx,%edi 151 152 /* Setup EFER (Extended Feature Enable Register) */ 153 movl $MSR_EFER, %ecx 154 rdmsr 155 btsl $_EFER_SCE, %eax /* Enable System Call */ 156 btl $20,%edi /* No Execute supported? */ 157 jnc 1f 158 btsl $_EFER_NX, %eax 159 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 1601: wrmsr /* Make changes effective */ 161 162 /* Setup cr0 */ 163 movl $CR0_STATE, %eax 164 /* Make changes effective */ 165 movq %rax, %cr0 166 167 /* Setup a boot time stack */ 168 movq initial_stack(%rip), %rsp 169 170 /* zero EFLAGS after setting rsp */ 171 pushq $0 172 popfq 173 174 /* 175 * We must switch to a new descriptor in kernel space for the GDT 176 * because soon the kernel won't have access anymore to the userspace 177 * addresses where we're currently running on. We have to do that here 178 * because in 32bit we couldn't load a 64bit linear address. 179 */ 180 lgdt early_gdt_descr(%rip) 181 182 /* set up data segments */ 183 xorl %eax,%eax 184 movl %eax,%ds 185 movl %eax,%ss 186 movl %eax,%es 187 188 /* 189 * We don't really need to load %fs or %gs, but load them anyway 190 * to kill any stale realmode selectors. This allows execution 191 * under VT hardware. 192 */ 193 movl %eax,%fs 194 movl %eax,%gs 195 196 /* Set up %gs. 197 * 198 * The base of %gs always points to fixed_percpu_data. If the 199 * stack protector canary is enabled, it is located at %gs:40. 200 * Note that, on SMP, the boot cpu uses init data section until 201 * the per cpu areas are set up. 202 */ 203 movl $MSR_GS_BASE,%ecx 204 movl initial_gs(%rip),%eax 205 movl initial_gs+4(%rip),%edx 206 wrmsr 207 208 /* rsi is pointer to real mode structure with interesting info. 209 pass it to C */ 210 movq %rsi, %rdi 211 212.Ljump_to_C_code: 213 /* 214 * Jump to run C code and to be on a real kernel address. 215 * Since we are running on identity-mapped space we have to jump 216 * to the full 64bit address, this is only possible as indirect 217 * jump. In addition we need to ensure %cs is set so we make this 218 * a far return. 219 * 220 * Note: do not change to far jump indirect with 64bit offset. 221 * 222 * AMD does not support far jump indirect with 64bit offset. 223 * AMD64 Architecture Programmer's Manual, Volume 3: states only 224 * JMP FAR mem16:16 FF /5 Far jump indirect, 225 * with the target specified by a far pointer in memory. 226 * JMP FAR mem16:32 FF /5 Far jump indirect, 227 * with the target specified by a far pointer in memory. 228 * 229 * Intel64 does support 64bit offset. 230 * Software Developer Manual Vol 2: states: 231 * FF /5 JMP m16:16 Jump far, absolute indirect, 232 * address given in m16:16 233 * FF /5 JMP m16:32 Jump far, absolute indirect, 234 * address given in m16:32. 235 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 236 * address given in m16:64. 237 */ 238 pushq $.Lafter_lret # put return address on stack for unwinder 239 xorl %ebp, %ebp # clear frame pointer 240 movq initial_code(%rip), %rax 241 pushq $__KERNEL_CS # set correct cs 242 pushq %rax # target address in negative space 243 lretq 244.Lafter_lret: 245SYM_CODE_END(secondary_startup_64) 246 247#include "verify_cpu.S" 248 249#ifdef CONFIG_HOTPLUG_CPU 250/* 251 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 252 * up already except stack. We just set up stack here. Then call 253 * start_secondary() via .Ljump_to_C_code. 254 */ 255SYM_CODE_START(start_cpu0) 256 UNWIND_HINT_EMPTY 257 movq initial_stack(%rip), %rsp 258 jmp .Ljump_to_C_code 259SYM_CODE_END(start_cpu0) 260#endif 261 262 /* Both SMP bootup and ACPI suspend change these variables */ 263 __REFDATA 264 .balign 8 265SYM_DATA(initial_code, .quad x86_64_start_kernel) 266SYM_DATA(initial_gs, .quad INIT_PER_CPU_VAR(fixed_percpu_data)) 267 268/* 269 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 270 * reliably detect the end of the stack. 271 */ 272SYM_DATA(initial_stack, .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS) 273 __FINITDATA 274 275 __INIT 276SYM_CODE_START(early_idt_handler_array) 277 i = 0 278 .rept NUM_EXCEPTION_VECTORS 279 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 280 UNWIND_HINT_IRET_REGS 281 pushq $0 # Dummy error code, to make stack frame uniform 282 .else 283 UNWIND_HINT_IRET_REGS offset=8 284 .endif 285 pushq $i # 72(%rsp) Vector number 286 jmp early_idt_handler_common 287 UNWIND_HINT_IRET_REGS 288 i = i + 1 289 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 290 .endr 291 UNWIND_HINT_IRET_REGS offset=16 292SYM_CODE_END(early_idt_handler_array) 293 294SYM_CODE_START_LOCAL(early_idt_handler_common) 295 /* 296 * The stack is the hardware frame, an error code or zero, and the 297 * vector number. 298 */ 299 cld 300 301 incl early_recursion_flag(%rip) 302 303 /* The vector number is currently in the pt_regs->di slot. */ 304 pushq %rsi /* pt_regs->si */ 305 movq 8(%rsp), %rsi /* RSI = vector number */ 306 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 307 pushq %rdx /* pt_regs->dx */ 308 pushq %rcx /* pt_regs->cx */ 309 pushq %rax /* pt_regs->ax */ 310 pushq %r8 /* pt_regs->r8 */ 311 pushq %r9 /* pt_regs->r9 */ 312 pushq %r10 /* pt_regs->r10 */ 313 pushq %r11 /* pt_regs->r11 */ 314 pushq %rbx /* pt_regs->bx */ 315 pushq %rbp /* pt_regs->bp */ 316 pushq %r12 /* pt_regs->r12 */ 317 pushq %r13 /* pt_regs->r13 */ 318 pushq %r14 /* pt_regs->r14 */ 319 pushq %r15 /* pt_regs->r15 */ 320 UNWIND_HINT_REGS 321 322 cmpq $14,%rsi /* Page fault? */ 323 jnz 10f 324 GET_CR2_INTO(%rdi) /* can clobber %rax if pv */ 325 call early_make_pgtable 326 andl %eax,%eax 327 jz 20f /* All good */ 328 32910: 330 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 331 call early_fixup_exception 332 33320: 334 decl early_recursion_flag(%rip) 335 jmp restore_regs_and_return_to_kernel 336SYM_CODE_END(early_idt_handler_common) 337 338 339#define SYM_DATA_START_PAGE_ALIGNED(name) \ 340 SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 341 342#ifdef CONFIG_PAGE_TABLE_ISOLATION 343/* 344 * Each PGD needs to be 8k long and 8k aligned. We do not 345 * ever go out to userspace with these, so we do not 346 * strictly *need* the second page, but this allows us to 347 * have a single set_pgd() implementation that does not 348 * need to worry about whether it has 4k or 8k to work 349 * with. 350 * 351 * This ensures PGDs are 8k long: 352 */ 353#define PTI_USER_PGD_FILL 512 354/* This ensures they are 8k-aligned: */ 355#define SYM_DATA_START_PTI_ALIGNED(name) \ 356 SYM_START(name, SYM_L_GLOBAL, .balign 2 * PAGE_SIZE) 357#else 358#define SYM_DATA_START_PTI_ALIGNED(name) \ 359 SYM_DATA_START_PAGE_ALIGNED(name) 360#define PTI_USER_PGD_FILL 0 361#endif 362 363/* Automate the creation of 1 to 1 mapping pmd entries */ 364#define PMDS(START, PERM, COUNT) \ 365 i = 0 ; \ 366 .rept (COUNT) ; \ 367 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 368 i = i + 1 ; \ 369 .endr 370 371 __INITDATA 372 .balign 4 373 374SYM_DATA_START_PTI_ALIGNED(early_top_pgt) 375 .fill 512,8,0 376 .fill PTI_USER_PGD_FILL,8,0 377SYM_DATA_END(early_top_pgt) 378 379SYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts) 380 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 381SYM_DATA_END(early_dynamic_pgts) 382 383SYM_DATA(early_recursion_flag, .long 0) 384 385 .data 386 387#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH) 388SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 389 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 390 .org init_top_pgt + L4_PAGE_OFFSET*8, 0 391 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 392 .org init_top_pgt + L4_START_KERNEL*8, 0 393 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 394 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 395 .fill PTI_USER_PGD_FILL,8,0 396SYM_DATA_END(init_top_pgt) 397 398SYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt) 399 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 400 .fill 511, 8, 0 401SYM_DATA_END(level3_ident_pgt) 402SYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt) 403 /* 404 * Since I easily can, map the first 1G. 405 * Don't set NX because code runs from these pages. 406 * 407 * Note: This sets _PAGE_GLOBAL despite whether 408 * the CPU supports it or it is enabled. But, 409 * the CPU should ignore the bit. 410 */ 411 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 412SYM_DATA_END(level2_ident_pgt) 413#else 414SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 415 .fill 512,8,0 416 .fill PTI_USER_PGD_FILL,8,0 417SYM_DATA_END(init_top_pgt) 418#endif 419 420#ifdef CONFIG_X86_5LEVEL 421SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt) 422 .fill 511,8,0 423 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 424SYM_DATA_END(level4_kernel_pgt) 425#endif 426 427SYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt) 428 .fill L3_START_KERNEL,8,0 429 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 430 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 431 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 432SYM_DATA_END(level3_kernel_pgt) 433 434SYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt) 435 /* 436 * 512 MB kernel mapping. We spend a full page on this pagetable 437 * anyway. 438 * 439 * The kernel code+data+bss must not be bigger than that. 440 * 441 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 442 * If you want to increase this then increase MODULES_VADDR 443 * too.) 444 * 445 * This table is eventually used by the kernel during normal 446 * runtime. Care must be taken to clear out undesired bits 447 * later, like _PAGE_RW or _PAGE_GLOBAL in some cases. 448 */ 449 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 450 KERNEL_IMAGE_SIZE/PMD_SIZE) 451SYM_DATA_END(level2_kernel_pgt) 452 453SYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt) 454 .fill (512 - 4 - FIXMAP_PMD_NUM),8,0 455 pgtno = 0 456 .rept (FIXMAP_PMD_NUM) 457 .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \ 458 + _PAGE_TABLE_NOENC; 459 pgtno = pgtno + 1 460 .endr 461 /* 6 MB reserved space + a 2MB hole */ 462 .fill 4,8,0 463SYM_DATA_END(level2_fixmap_pgt) 464 465SYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) 466 .rept (FIXMAP_PMD_NUM) 467 .fill 512,8,0 468 .endr 469SYM_DATA_END(level1_fixmap_pgt) 470 471#undef PMDS 472 473 .data 474 .align 16 475 476SYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) 477SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) 478 479 .align 16 480/* This must match the first entry in level2_kernel_pgt */ 481SYM_DATA(phys_base, .quad 0x0) 482EXPORT_SYMBOL(phys_base) 483 484#include "../../x86/xen/xen-head.S" 485 486 __PAGE_ALIGNED_BSS 487SYM_DATA_START_PAGE_ALIGNED(empty_zero_page) 488 .skip PAGE_SIZE 489SYM_DATA_END(empty_zero_page) 490EXPORT_SYMBOL(empty_zero_page) 491 492