1/* 2 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 3 * 4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9 */ 10 11 12#include <linux/linkage.h> 13#include <linux/threads.h> 14#include <linux/init.h> 15#include <asm/segment.h> 16#include <asm/pgtable.h> 17#include <asm/page.h> 18#include <asm/msr.h> 19#include <asm/cache.h> 20#include <asm/processor-flags.h> 21#include <asm/percpu.h> 22#include <asm/nops.h> 23#include "../entry/calling.h" 24#include <asm/export.h> 25 26#ifdef CONFIG_PARAVIRT 27#include <asm/asm-offsets.h> 28#include <asm/paravirt.h> 29#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 30#else 31#define GET_CR2_INTO(reg) movq %cr2, reg 32#define INTERRUPT_RETURN iretq 33#endif 34 35/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 36 * because we need identity-mapped pages. 37 * 38 */ 39 40#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 41 42#if defined(CONFIG_XEN_PV) || defined(CONFIG_XEN_PVH) 43PGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE) 44PGD_START_KERNEL = pgd_index(__START_KERNEL_map) 45#endif 46L3_START_KERNEL = pud_index(__START_KERNEL_map) 47 48 .text 49 __HEAD 50 .code64 51 .globl startup_64 52startup_64: 53 /* 54 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 55 * and someone has loaded an identity mapped page table 56 * for us. These identity mapped page tables map all of the 57 * kernel pages and possibly all of memory. 58 * 59 * %rsi holds a physical pointer to real_mode_data. 60 * 61 * We come here either directly from a 64bit bootloader, or from 62 * arch/x86/boot/compressed/head_64.S. 63 * 64 * We only come here initially at boot nothing else comes here. 65 * 66 * Since we may be loaded at an address different from what we were 67 * compiled to run at we first fixup the physical addresses in our page 68 * tables and then reload them. 69 */ 70 71 /* Set up the stack for verify_cpu(), similar to initial_stack below */ 72 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 73 74 /* Sanitize CPU configuration */ 75 call verify_cpu 76 77 /* 78 * Perform pagetable fixups. Additionally, if SME is active, encrypt 79 * the kernel and retrieve the modifier (SME encryption mask if SME 80 * is active) to be added to the initial pgdir entry that will be 81 * programmed into CR3. 82 */ 83 leaq _text(%rip), %rdi 84 pushq %rsi 85 call __startup_64 86 popq %rsi 87 88 /* Form the CR3 value being sure to include the CR3 modifier */ 89 addq $(early_top_pgt - __START_KERNEL_map), %rax 90 jmp 1f 91ENTRY(secondary_startup_64) 92 /* 93 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 94 * and someone has loaded a mapped page table. 95 * 96 * %rsi holds a physical pointer to real_mode_data. 97 * 98 * We come here either from startup_64 (using physical addresses) 99 * or from trampoline.S (using virtual addresses). 100 * 101 * Using virtual addresses from trampoline.S removes the need 102 * to have any identity mapped pages in the kernel page table 103 * after the boot processor executes this code. 104 */ 105 106 /* Sanitize CPU configuration */ 107 call verify_cpu 108 109 /* 110 * Retrieve the modifier (SME encryption mask if SME is active) to be 111 * added to the initial pgdir entry that will be programmed into CR3. 112 */ 113 pushq %rsi 114 call __startup_secondary_64 115 popq %rsi 116 117 /* Form the CR3 value being sure to include the CR3 modifier */ 118 addq $(init_top_pgt - __START_KERNEL_map), %rax 1191: 120 121 /* Enable PAE mode, PGE and LA57 */ 122 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 123#ifdef CONFIG_X86_5LEVEL 124 orl $X86_CR4_LA57, %ecx 125#endif 126 movq %rcx, %cr4 127 128 /* Setup early boot stage 4-/5-level pagetables. */ 129 addq phys_base(%rip), %rax 130 movq %rax, %cr3 131 132 /* Ensure I am executing from virtual addresses */ 133 movq $1f, %rax 134 jmp *%rax 1351: 136 137 /* Check if nx is implemented */ 138 movl $0x80000001, %eax 139 cpuid 140 movl %edx,%edi 141 142 /* Setup EFER (Extended Feature Enable Register) */ 143 movl $MSR_EFER, %ecx 144 rdmsr 145 btsl $_EFER_SCE, %eax /* Enable System Call */ 146 btl $20,%edi /* No Execute supported? */ 147 jnc 1f 148 btsl $_EFER_NX, %eax 149 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 1501: wrmsr /* Make changes effective */ 151 152 /* Setup cr0 */ 153#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 154 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 155 X86_CR0_PG) 156 movl $CR0_STATE, %eax 157 /* Make changes effective */ 158 movq %rax, %cr0 159 160 /* Setup a boot time stack */ 161 movq initial_stack(%rip), %rsp 162 163 /* zero EFLAGS after setting rsp */ 164 pushq $0 165 popfq 166 167 /* 168 * We must switch to a new descriptor in kernel space for the GDT 169 * because soon the kernel won't have access anymore to the userspace 170 * addresses where we're currently running on. We have to do that here 171 * because in 32bit we couldn't load a 64bit linear address. 172 */ 173 lgdt early_gdt_descr(%rip) 174 175 /* set up data segments */ 176 xorl %eax,%eax 177 movl %eax,%ds 178 movl %eax,%ss 179 movl %eax,%es 180 181 /* 182 * We don't really need to load %fs or %gs, but load them anyway 183 * to kill any stale realmode selectors. This allows execution 184 * under VT hardware. 185 */ 186 movl %eax,%fs 187 movl %eax,%gs 188 189 /* Set up %gs. 190 * 191 * The base of %gs always points to the bottom of the irqstack 192 * union. If the stack protector canary is enabled, it is 193 * located at %gs:40. Note that, on SMP, the boot cpu uses 194 * init data section till per cpu areas are set up. 195 */ 196 movl $MSR_GS_BASE,%ecx 197 movl initial_gs(%rip),%eax 198 movl initial_gs+4(%rip),%edx 199 wrmsr 200 201 /* rsi is pointer to real mode structure with interesting info. 202 pass it to C */ 203 movq %rsi, %rdi 204 205.Ljump_to_C_code: 206 /* 207 * Jump to run C code and to be on a real kernel address. 208 * Since we are running on identity-mapped space we have to jump 209 * to the full 64bit address, this is only possible as indirect 210 * jump. In addition we need to ensure %cs is set so we make this 211 * a far return. 212 * 213 * Note: do not change to far jump indirect with 64bit offset. 214 * 215 * AMD does not support far jump indirect with 64bit offset. 216 * AMD64 Architecture Programmer's Manual, Volume 3: states only 217 * JMP FAR mem16:16 FF /5 Far jump indirect, 218 * with the target specified by a far pointer in memory. 219 * JMP FAR mem16:32 FF /5 Far jump indirect, 220 * with the target specified by a far pointer in memory. 221 * 222 * Intel64 does support 64bit offset. 223 * Software Developer Manual Vol 2: states: 224 * FF /5 JMP m16:16 Jump far, absolute indirect, 225 * address given in m16:16 226 * FF /5 JMP m16:32 Jump far, absolute indirect, 227 * address given in m16:32. 228 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 229 * address given in m16:64. 230 */ 231 pushq $.Lafter_lret # put return address on stack for unwinder 232 xorq %rbp, %rbp # clear frame pointer 233 movq initial_code(%rip), %rax 234 pushq $__KERNEL_CS # set correct cs 235 pushq %rax # target address in negative space 236 lretq 237.Lafter_lret: 238ENDPROC(secondary_startup_64) 239 240#include "verify_cpu.S" 241 242#ifdef CONFIG_HOTPLUG_CPU 243/* 244 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 245 * up already except stack. We just set up stack here. Then call 246 * start_secondary() via .Ljump_to_C_code. 247 */ 248ENTRY(start_cpu0) 249 movq initial_stack(%rip), %rsp 250 jmp .Ljump_to_C_code 251ENDPROC(start_cpu0) 252#endif 253 254 /* Both SMP bootup and ACPI suspend change these variables */ 255 __REFDATA 256 .balign 8 257 GLOBAL(initial_code) 258 .quad x86_64_start_kernel 259 GLOBAL(initial_gs) 260 .quad INIT_PER_CPU_VAR(irq_stack_union) 261 GLOBAL(initial_stack) 262 /* 263 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel 264 * unwinder reliably detect the end of the stack. 265 */ 266 .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS 267 __FINITDATA 268 269bad_address: 270 jmp bad_address 271 272 __INIT 273ENTRY(early_idt_handler_array) 274 # 104(%rsp) %rflags 275 # 96(%rsp) %cs 276 # 88(%rsp) %rip 277 # 80(%rsp) error code 278 i = 0 279 .rept NUM_EXCEPTION_VECTORS 280 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1 281 pushq $0 # Dummy error code, to make stack frame uniform 282 .endif 283 pushq $i # 72(%rsp) Vector number 284 jmp early_idt_handler_common 285 i = i + 1 286 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 287 .endr 288ENDPROC(early_idt_handler_array) 289 290early_idt_handler_common: 291 /* 292 * The stack is the hardware frame, an error code or zero, and the 293 * vector number. 294 */ 295 cld 296 297 incl early_recursion_flag(%rip) 298 299 /* The vector number is currently in the pt_regs->di slot. */ 300 pushq %rsi /* pt_regs->si */ 301 movq 8(%rsp), %rsi /* RSI = vector number */ 302 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 303 pushq %rdx /* pt_regs->dx */ 304 pushq %rcx /* pt_regs->cx */ 305 pushq %rax /* pt_regs->ax */ 306 pushq %r8 /* pt_regs->r8 */ 307 pushq %r9 /* pt_regs->r9 */ 308 pushq %r10 /* pt_regs->r10 */ 309 pushq %r11 /* pt_regs->r11 */ 310 pushq %rbx /* pt_regs->bx */ 311 pushq %rbp /* pt_regs->bp */ 312 pushq %r12 /* pt_regs->r12 */ 313 pushq %r13 /* pt_regs->r13 */ 314 pushq %r14 /* pt_regs->r14 */ 315 pushq %r15 /* pt_regs->r15 */ 316 317 cmpq $14,%rsi /* Page fault? */ 318 jnz 10f 319 GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */ 320 call early_make_pgtable 321 andl %eax,%eax 322 jz 20f /* All good */ 323 32410: 325 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 326 call early_fixup_exception 327 32820: 329 decl early_recursion_flag(%rip) 330 jmp restore_regs_and_iret 331ENDPROC(early_idt_handler_common) 332 333 __INITDATA 334 335 .balign 4 336GLOBAL(early_recursion_flag) 337 .long 0 338 339#define NEXT_PAGE(name) \ 340 .balign PAGE_SIZE; \ 341GLOBAL(name) 342 343/* Automate the creation of 1 to 1 mapping pmd entries */ 344#define PMDS(START, PERM, COUNT) \ 345 i = 0 ; \ 346 .rept (COUNT) ; \ 347 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 348 i = i + 1 ; \ 349 .endr 350 351 __INITDATA 352NEXT_PAGE(early_top_pgt) 353 .fill 511,8,0 354#ifdef CONFIG_X86_5LEVEL 355 .quad level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 356#else 357 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 358#endif 359 360NEXT_PAGE(early_dynamic_pgts) 361 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 362 363 .data 364 365#if defined(CONFIG_XEN_PV) || defined(CONFIG_XEN_PVH) 366NEXT_PAGE(init_top_pgt) 367 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 368 .org init_top_pgt + PGD_PAGE_OFFSET*8, 0 369 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 370 .org init_top_pgt + PGD_START_KERNEL*8, 0 371 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 372 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 373 374NEXT_PAGE(level3_ident_pgt) 375 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 376 .fill 511, 8, 0 377NEXT_PAGE(level2_ident_pgt) 378 /* Since I easily can, map the first 1G. 379 * Don't set NX because code runs from these pages. 380 */ 381 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 382#else 383NEXT_PAGE(init_top_pgt) 384 .fill 512,8,0 385#endif 386 387#ifdef CONFIG_X86_5LEVEL 388NEXT_PAGE(level4_kernel_pgt) 389 .fill 511,8,0 390 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 391#endif 392 393NEXT_PAGE(level3_kernel_pgt) 394 .fill L3_START_KERNEL,8,0 395 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 396 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 397 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 398 399NEXT_PAGE(level2_kernel_pgt) 400 /* 401 * 512 MB kernel mapping. We spend a full page on this pagetable 402 * anyway. 403 * 404 * The kernel code+data+bss must not be bigger than that. 405 * 406 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 407 * If you want to increase this then increase MODULES_VADDR 408 * too.) 409 */ 410 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 411 KERNEL_IMAGE_SIZE/PMD_SIZE) 412 413NEXT_PAGE(level2_fixmap_pgt) 414 .fill 506,8,0 415 .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 416 /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 417 .fill 5,8,0 418 419NEXT_PAGE(level1_fixmap_pgt) 420 .fill 512,8,0 421 422#undef PMDS 423 424 .data 425 .align 16 426 .globl early_gdt_descr 427early_gdt_descr: 428 .word GDT_ENTRIES*8-1 429early_gdt_descr_base: 430 .quad INIT_PER_CPU_VAR(gdt_page) 431 432ENTRY(phys_base) 433 /* This must match the first entry in level2_kernel_pgt */ 434 .quad 0x0000000000000000 435EXPORT_SYMBOL(phys_base) 436 437#include "../../x86/xen/xen-head.S" 438 439 __PAGE_ALIGNED_BSS 440NEXT_PAGE(empty_zero_page) 441 .skip PAGE_SIZE 442EXPORT_SYMBOL(empty_zero_page) 443 444