1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4 * 5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10 */ 11 12 13#include <linux/linkage.h> 14#include <linux/threads.h> 15#include <linux/init.h> 16#include <linux/pgtable.h> 17#include <asm/segment.h> 18#include <asm/page.h> 19#include <asm/msr.h> 20#include <asm/cache.h> 21#include <asm/processor-flags.h> 22#include <asm/percpu.h> 23#include <asm/nops.h> 24#include "../entry/calling.h" 25#include <asm/export.h> 26#include <asm/nospec-branch.h> 27#include <asm/fixmap.h> 28 29#ifdef CONFIG_PARAVIRT_XXL 30#include <asm/asm-offsets.h> 31#include <asm/paravirt.h> 32#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg 33#else 34#define INTERRUPT_RETURN iretq 35#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg 36#endif 37 38/* 39 * We are not able to switch in one step to the final KERNEL ADDRESS SPACE 40 * because we need identity-mapped pages. 41 */ 42#define l4_index(x) (((x) >> 39) & 511) 43#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 44 45L4_PAGE_OFFSET = l4_index(__PAGE_OFFSET_BASE_L4) 46L4_START_KERNEL = l4_index(__START_KERNEL_map) 47 48L3_START_KERNEL = pud_index(__START_KERNEL_map) 49 50 .text 51 __HEAD 52 .code64 53SYM_CODE_START_NOALIGN(startup_64) 54 UNWIND_HINT_EMPTY 55 /* 56 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 57 * and someone has loaded an identity mapped page table 58 * for us. These identity mapped page tables map all of the 59 * kernel pages and possibly all of memory. 60 * 61 * %rsi holds a physical pointer to real_mode_data. 62 * 63 * We come here either directly from a 64bit bootloader, or from 64 * arch/x86/boot/compressed/head_64.S. 65 * 66 * We only come here initially at boot nothing else comes here. 67 * 68 * Since we may be loaded at an address different from what we were 69 * compiled to run at we first fixup the physical addresses in our page 70 * tables and then reload them. 71 */ 72 73 /* Set up the stack for verify_cpu(), similar to initial_stack below */ 74 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 75 76 leaq _text(%rip), %rdi 77 pushq %rsi 78 call startup_64_setup_env 79 popq %rsi 80 81 /* Now switch to __KERNEL_CS so IRET works reliably */ 82 pushq $__KERNEL_CS 83 leaq .Lon_kernel_cs(%rip), %rax 84 pushq %rax 85 lretq 86 87.Lon_kernel_cs: 88 UNWIND_HINT_EMPTY 89 90 /* Sanitize CPU configuration */ 91 call verify_cpu 92 93 /* 94 * Perform pagetable fixups. Additionally, if SME is active, encrypt 95 * the kernel and retrieve the modifier (SME encryption mask if SME 96 * is active) to be added to the initial pgdir entry that will be 97 * programmed into CR3. 98 */ 99 leaq _text(%rip), %rdi 100 pushq %rsi 101 call __startup_64 102 popq %rsi 103 104 /* Form the CR3 value being sure to include the CR3 modifier */ 105 addq $(early_top_pgt - __START_KERNEL_map), %rax 106 jmp 1f 107SYM_CODE_END(startup_64) 108 109SYM_CODE_START(secondary_startup_64) 110 UNWIND_HINT_EMPTY 111 /* 112 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 113 * and someone has loaded a mapped page table. 114 * 115 * %rsi holds a physical pointer to real_mode_data. 116 * 117 * We come here either from startup_64 (using physical addresses) 118 * or from trampoline.S (using virtual addresses). 119 * 120 * Using virtual addresses from trampoline.S removes the need 121 * to have any identity mapped pages in the kernel page table 122 * after the boot processor executes this code. 123 */ 124 125 /* Sanitize CPU configuration */ 126 call verify_cpu 127 128 /* 129 * Retrieve the modifier (SME encryption mask if SME is active) to be 130 * added to the initial pgdir entry that will be programmed into CR3. 131 */ 132 pushq %rsi 133 call __startup_secondary_64 134 popq %rsi 135 136 /* Form the CR3 value being sure to include the CR3 modifier */ 137 addq $(init_top_pgt - __START_KERNEL_map), %rax 1381: 139 140 /* Enable PAE mode, PGE and LA57 */ 141 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 142#ifdef CONFIG_X86_5LEVEL 143 testl $1, __pgtable_l5_enabled(%rip) 144 jz 1f 145 orl $X86_CR4_LA57, %ecx 1461: 147#endif 148 movq %rcx, %cr4 149 150 /* Setup early boot stage 4-/5-level pagetables. */ 151 addq phys_base(%rip), %rax 152 movq %rax, %cr3 153 154 /* Ensure I am executing from virtual addresses */ 155 movq $1f, %rax 156 ANNOTATE_RETPOLINE_SAFE 157 jmp *%rax 1581: 159 UNWIND_HINT_EMPTY 160 161 /* 162 * We must switch to a new descriptor in kernel space for the GDT 163 * because soon the kernel won't have access anymore to the userspace 164 * addresses where we're currently running on. We have to do that here 165 * because in 32bit we couldn't load a 64bit linear address. 166 */ 167 lgdt early_gdt_descr(%rip) 168 169 /* set up data segments */ 170 xorl %eax,%eax 171 movl %eax,%ds 172 movl %eax,%ss 173 movl %eax,%es 174 175 /* 176 * We don't really need to load %fs or %gs, but load them anyway 177 * to kill any stale realmode selectors. This allows execution 178 * under VT hardware. 179 */ 180 movl %eax,%fs 181 movl %eax,%gs 182 183 /* Set up %gs. 184 * 185 * The base of %gs always points to fixed_percpu_data. If the 186 * stack protector canary is enabled, it is located at %gs:40. 187 * Note that, on SMP, the boot cpu uses init data section until 188 * the per cpu areas are set up. 189 */ 190 movl $MSR_GS_BASE,%ecx 191 movl initial_gs(%rip),%eax 192 movl initial_gs+4(%rip),%edx 193 wrmsr 194 195 /* 196 * Setup a boot time stack - Any secondary CPU will have lost its stack 197 * by now because the cr3-switch above unmaps the real-mode stack 198 */ 199 movq initial_stack(%rip), %rsp 200 201 /* Setup and Load IDT */ 202 pushq %rsi 203 call early_setup_idt 204 popq %rsi 205 206 /* Check if nx is implemented */ 207 movl $0x80000001, %eax 208 cpuid 209 movl %edx,%edi 210 211 /* Setup EFER (Extended Feature Enable Register) */ 212 movl $MSR_EFER, %ecx 213 rdmsr 214 btsl $_EFER_SCE, %eax /* Enable System Call */ 215 btl $20,%edi /* No Execute supported? */ 216 jnc 1f 217 btsl $_EFER_NX, %eax 218 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 2191: wrmsr /* Make changes effective */ 220 221 /* Setup cr0 */ 222 movl $CR0_STATE, %eax 223 /* Make changes effective */ 224 movq %rax, %cr0 225 226 /* zero EFLAGS after setting rsp */ 227 pushq $0 228 popfq 229 230 /* rsi is pointer to real mode structure with interesting info. 231 pass it to C */ 232 movq %rsi, %rdi 233 234.Ljump_to_C_code: 235 /* 236 * Jump to run C code and to be on a real kernel address. 237 * Since we are running on identity-mapped space we have to jump 238 * to the full 64bit address, this is only possible as indirect 239 * jump. In addition we need to ensure %cs is set so we make this 240 * a far return. 241 * 242 * Note: do not change to far jump indirect with 64bit offset. 243 * 244 * AMD does not support far jump indirect with 64bit offset. 245 * AMD64 Architecture Programmer's Manual, Volume 3: states only 246 * JMP FAR mem16:16 FF /5 Far jump indirect, 247 * with the target specified by a far pointer in memory. 248 * JMP FAR mem16:32 FF /5 Far jump indirect, 249 * with the target specified by a far pointer in memory. 250 * 251 * Intel64 does support 64bit offset. 252 * Software Developer Manual Vol 2: states: 253 * FF /5 JMP m16:16 Jump far, absolute indirect, 254 * address given in m16:16 255 * FF /5 JMP m16:32 Jump far, absolute indirect, 256 * address given in m16:32. 257 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 258 * address given in m16:64. 259 */ 260 pushq $.Lafter_lret # put return address on stack for unwinder 261 xorl %ebp, %ebp # clear frame pointer 262 movq initial_code(%rip), %rax 263 pushq $__KERNEL_CS # set correct cs 264 pushq %rax # target address in negative space 265 lretq 266.Lafter_lret: 267SYM_CODE_END(secondary_startup_64) 268 269#include "verify_cpu.S" 270 271#ifdef CONFIG_HOTPLUG_CPU 272/* 273 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 274 * up already except stack. We just set up stack here. Then call 275 * start_secondary() via .Ljump_to_C_code. 276 */ 277SYM_CODE_START(start_cpu0) 278 UNWIND_HINT_EMPTY 279 movq initial_stack(%rip), %rsp 280 jmp .Ljump_to_C_code 281SYM_CODE_END(start_cpu0) 282#endif 283 284#ifdef CONFIG_AMD_MEM_ENCRYPT 285/* 286 * VC Exception handler used during early boot when running on kernel 287 * addresses, but before the switch to the idt_table can be made. 288 * The early_idt_handler_array can't be used here because it calls into a lot 289 * of __init code and this handler is also used during CPU offlining/onlining. 290 * Therefore this handler ends up in the .text section so that it stays around 291 * when .init.text is freed. 292 */ 293SYM_CODE_START_NOALIGN(vc_boot_ghcb) 294 UNWIND_HINT_IRET_REGS offset=8 295 296 /* Build pt_regs */ 297 PUSH_AND_CLEAR_REGS 298 299 /* Call C handler */ 300 movq %rsp, %rdi 301 movq ORIG_RAX(%rsp), %rsi 302 movq initial_vc_handler(%rip), %rax 303 ANNOTATE_RETPOLINE_SAFE 304 call *%rax 305 306 /* Unwind pt_regs */ 307 POP_REGS 308 309 /* Remove Error Code */ 310 addq $8, %rsp 311 312 /* Pure iret required here - don't use INTERRUPT_RETURN */ 313 iretq 314SYM_CODE_END(vc_boot_ghcb) 315#endif 316 317 /* Both SMP bootup and ACPI suspend change these variables */ 318 __REFDATA 319 .balign 8 320SYM_DATA(initial_code, .quad x86_64_start_kernel) 321SYM_DATA(initial_gs, .quad INIT_PER_CPU_VAR(fixed_percpu_data)) 322#ifdef CONFIG_AMD_MEM_ENCRYPT 323SYM_DATA(initial_vc_handler, .quad handle_vc_boot_ghcb) 324#endif 325 326/* 327 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 328 * reliably detect the end of the stack. 329 */ 330SYM_DATA(initial_stack, .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS) 331 __FINITDATA 332 333 __INIT 334SYM_CODE_START(early_idt_handler_array) 335 i = 0 336 .rept NUM_EXCEPTION_VECTORS 337 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 338 UNWIND_HINT_IRET_REGS 339 pushq $0 # Dummy error code, to make stack frame uniform 340 .else 341 UNWIND_HINT_IRET_REGS offset=8 342 .endif 343 pushq $i # 72(%rsp) Vector number 344 jmp early_idt_handler_common 345 UNWIND_HINT_IRET_REGS 346 i = i + 1 347 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 348 .endr 349 UNWIND_HINT_IRET_REGS offset=16 350SYM_CODE_END(early_idt_handler_array) 351 352SYM_CODE_START_LOCAL(early_idt_handler_common) 353 /* 354 * The stack is the hardware frame, an error code or zero, and the 355 * vector number. 356 */ 357 cld 358 359 incl early_recursion_flag(%rip) 360 361 /* The vector number is currently in the pt_regs->di slot. */ 362 pushq %rsi /* pt_regs->si */ 363 movq 8(%rsp), %rsi /* RSI = vector number */ 364 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 365 pushq %rdx /* pt_regs->dx */ 366 pushq %rcx /* pt_regs->cx */ 367 pushq %rax /* pt_regs->ax */ 368 pushq %r8 /* pt_regs->r8 */ 369 pushq %r9 /* pt_regs->r9 */ 370 pushq %r10 /* pt_regs->r10 */ 371 pushq %r11 /* pt_regs->r11 */ 372 pushq %rbx /* pt_regs->bx */ 373 pushq %rbp /* pt_regs->bp */ 374 pushq %r12 /* pt_regs->r12 */ 375 pushq %r13 /* pt_regs->r13 */ 376 pushq %r14 /* pt_regs->r14 */ 377 pushq %r15 /* pt_regs->r15 */ 378 UNWIND_HINT_REGS 379 380 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 381 call do_early_exception 382 383 decl early_recursion_flag(%rip) 384 jmp restore_regs_and_return_to_kernel 385SYM_CODE_END(early_idt_handler_common) 386 387#ifdef CONFIG_AMD_MEM_ENCRYPT 388/* 389 * VC Exception handler used during very early boot. The 390 * early_idt_handler_array can't be used because it returns via the 391 * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early. 392 * 393 * This handler will end up in the .init.text section and not be 394 * available to boot secondary CPUs. 395 */ 396SYM_CODE_START_NOALIGN(vc_no_ghcb) 397 UNWIND_HINT_IRET_REGS offset=8 398 399 /* Build pt_regs */ 400 PUSH_AND_CLEAR_REGS 401 402 /* Call C handler */ 403 movq %rsp, %rdi 404 movq ORIG_RAX(%rsp), %rsi 405 call do_vc_no_ghcb 406 407 /* Unwind pt_regs */ 408 POP_REGS 409 410 /* Remove Error Code */ 411 addq $8, %rsp 412 413 /* Pure iret required here - don't use INTERRUPT_RETURN */ 414 iretq 415SYM_CODE_END(vc_no_ghcb) 416#endif 417 418#define SYM_DATA_START_PAGE_ALIGNED(name) \ 419 SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) 420 421#ifdef CONFIG_PAGE_TABLE_ISOLATION 422/* 423 * Each PGD needs to be 8k long and 8k aligned. We do not 424 * ever go out to userspace with these, so we do not 425 * strictly *need* the second page, but this allows us to 426 * have a single set_pgd() implementation that does not 427 * need to worry about whether it has 4k or 8k to work 428 * with. 429 * 430 * This ensures PGDs are 8k long: 431 */ 432#define PTI_USER_PGD_FILL 512 433/* This ensures they are 8k-aligned: */ 434#define SYM_DATA_START_PTI_ALIGNED(name) \ 435 SYM_START(name, SYM_L_GLOBAL, .balign 2 * PAGE_SIZE) 436#else 437#define SYM_DATA_START_PTI_ALIGNED(name) \ 438 SYM_DATA_START_PAGE_ALIGNED(name) 439#define PTI_USER_PGD_FILL 0 440#endif 441 442/* Automate the creation of 1 to 1 mapping pmd entries */ 443#define PMDS(START, PERM, COUNT) \ 444 i = 0 ; \ 445 .rept (COUNT) ; \ 446 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 447 i = i + 1 ; \ 448 .endr 449 450 __INITDATA 451 .balign 4 452 453SYM_DATA_START_PTI_ALIGNED(early_top_pgt) 454 .fill 512,8,0 455 .fill PTI_USER_PGD_FILL,8,0 456SYM_DATA_END(early_top_pgt) 457 458SYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts) 459 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 460SYM_DATA_END(early_dynamic_pgts) 461 462SYM_DATA(early_recursion_flag, .long 0) 463 464 .data 465 466#if defined(CONFIG_XEN_PV) || defined(CONFIG_PVH) 467SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 468 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 469 .org init_top_pgt + L4_PAGE_OFFSET*8, 0 470 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 471 .org init_top_pgt + L4_START_KERNEL*8, 0 472 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 473 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 474 .fill PTI_USER_PGD_FILL,8,0 475SYM_DATA_END(init_top_pgt) 476 477SYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt) 478 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 479 .fill 511, 8, 0 480SYM_DATA_END(level3_ident_pgt) 481SYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt) 482 /* 483 * Since I easily can, map the first 1G. 484 * Don't set NX because code runs from these pages. 485 * 486 * Note: This sets _PAGE_GLOBAL despite whether 487 * the CPU supports it or it is enabled. But, 488 * the CPU should ignore the bit. 489 */ 490 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 491SYM_DATA_END(level2_ident_pgt) 492#else 493SYM_DATA_START_PTI_ALIGNED(init_top_pgt) 494 .fill 512,8,0 495 .fill PTI_USER_PGD_FILL,8,0 496SYM_DATA_END(init_top_pgt) 497#endif 498 499#ifdef CONFIG_X86_5LEVEL 500SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt) 501 .fill 511,8,0 502 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 503SYM_DATA_END(level4_kernel_pgt) 504#endif 505 506SYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt) 507 .fill L3_START_KERNEL,8,0 508 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 509 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 510 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 511SYM_DATA_END(level3_kernel_pgt) 512 513SYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt) 514 /* 515 * 512 MB kernel mapping. We spend a full page on this pagetable 516 * anyway. 517 * 518 * The kernel code+data+bss must not be bigger than that. 519 * 520 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 521 * If you want to increase this then increase MODULES_VADDR 522 * too.) 523 * 524 * This table is eventually used by the kernel during normal 525 * runtime. Care must be taken to clear out undesired bits 526 * later, like _PAGE_RW or _PAGE_GLOBAL in some cases. 527 */ 528 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 529 KERNEL_IMAGE_SIZE/PMD_SIZE) 530SYM_DATA_END(level2_kernel_pgt) 531 532SYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt) 533 .fill (512 - 4 - FIXMAP_PMD_NUM),8,0 534 pgtno = 0 535 .rept (FIXMAP_PMD_NUM) 536 .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \ 537 + _PAGE_TABLE_NOENC; 538 pgtno = pgtno + 1 539 .endr 540 /* 6 MB reserved space + a 2MB hole */ 541 .fill 4,8,0 542SYM_DATA_END(level2_fixmap_pgt) 543 544SYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) 545 .rept (FIXMAP_PMD_NUM) 546 .fill 512,8,0 547 .endr 548SYM_DATA_END(level1_fixmap_pgt) 549 550#undef PMDS 551 552 .data 553 .align 16 554 555SYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) 556SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) 557 558 .align 16 559/* This must match the first entry in level2_kernel_pgt */ 560SYM_DATA(phys_base, .quad 0x0) 561EXPORT_SYMBOL(phys_base) 562 563#include "../../x86/xen/xen-head.S" 564 565 __PAGE_ALIGNED_BSS 566SYM_DATA_START_PAGE_ALIGNED(empty_zero_page) 567 .skip PAGE_SIZE 568SYM_DATA_END(empty_zero_page) 569EXPORT_SYMBOL(empty_zero_page) 570 571