1/* 2 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 3 * 4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9 */ 10 11 12#include <linux/linkage.h> 13#include <linux/threads.h> 14#include <linux/init.h> 15#include <asm/segment.h> 16#include <asm/pgtable.h> 17#include <asm/page.h> 18#include <asm/msr.h> 19#include <asm/cache.h> 20#include <asm/processor-flags.h> 21#include <asm/percpu.h> 22#include <asm/nops.h> 23#include "../entry/calling.h" 24#include <asm/export.h> 25 26#ifdef CONFIG_PARAVIRT 27#include <asm/asm-offsets.h> 28#include <asm/paravirt.h> 29#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 30#else 31#define GET_CR2_INTO(reg) movq %cr2, reg 32#define INTERRUPT_RETURN iretq 33#endif 34 35/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 36 * because we need identity-mapped pages. 37 * 38 */ 39 40#define p4d_index(x) (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1)) 41#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 42 43PGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE) 44PGD_START_KERNEL = pgd_index(__START_KERNEL_map) 45L3_START_KERNEL = pud_index(__START_KERNEL_map) 46 47 .text 48 __HEAD 49 .code64 50 .globl startup_64 51startup_64: 52 /* 53 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 54 * and someone has loaded an identity mapped page table 55 * for us. These identity mapped page tables map all of the 56 * kernel pages and possibly all of memory. 57 * 58 * %rsi holds a physical pointer to real_mode_data. 59 * 60 * We come here either directly from a 64bit bootloader, or from 61 * arch/x86/boot/compressed/head_64.S. 62 * 63 * We only come here initially at boot nothing else comes here. 64 * 65 * Since we may be loaded at an address different from what we were 66 * compiled to run at we first fixup the physical addresses in our page 67 * tables and then reload them. 68 */ 69 70 /* Set up the stack for verify_cpu(), similar to initial_stack below */ 71 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 72 73 /* Sanitize CPU configuration */ 74 call verify_cpu 75 76 leaq _text(%rip), %rdi 77 pushq %rsi 78 call __startup_64 79 popq %rsi 80 81 movq $(early_top_pgt - __START_KERNEL_map), %rax 82 jmp 1f 83ENTRY(secondary_startup_64) 84 /* 85 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 86 * and someone has loaded a mapped page table. 87 * 88 * %rsi holds a physical pointer to real_mode_data. 89 * 90 * We come here either from startup_64 (using physical addresses) 91 * or from trampoline.S (using virtual addresses). 92 * 93 * Using virtual addresses from trampoline.S removes the need 94 * to have any identity mapped pages in the kernel page table 95 * after the boot processor executes this code. 96 */ 97 98 /* Sanitize CPU configuration */ 99 call verify_cpu 100 101 movq $(init_top_pgt - __START_KERNEL_map), %rax 1021: 103 104 /* Enable PAE mode, PGE and LA57 */ 105 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 106#ifdef CONFIG_X86_5LEVEL 107 orl $X86_CR4_LA57, %ecx 108#endif 109 movq %rcx, %cr4 110 111 /* Setup early boot stage 4-/5-level pagetables. */ 112 addq phys_base(%rip), %rax 113 movq %rax, %cr3 114 115 /* Ensure I am executing from virtual addresses */ 116 movq $1f, %rax 117 jmp *%rax 1181: 119 120 /* Check if nx is implemented */ 121 movl $0x80000001, %eax 122 cpuid 123 movl %edx,%edi 124 125 /* Setup EFER (Extended Feature Enable Register) */ 126 movl $MSR_EFER, %ecx 127 rdmsr 128 btsl $_EFER_SCE, %eax /* Enable System Call */ 129 btl $20,%edi /* No Execute supported? */ 130 jnc 1f 131 btsl $_EFER_NX, %eax 132 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 1331: wrmsr /* Make changes effective */ 134 135 /* Setup cr0 */ 136#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 137 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 138 X86_CR0_PG) 139 movl $CR0_STATE, %eax 140 /* Make changes effective */ 141 movq %rax, %cr0 142 143 /* Setup a boot time stack */ 144 movq initial_stack(%rip), %rsp 145 146 /* zero EFLAGS after setting rsp */ 147 pushq $0 148 popfq 149 150 /* 151 * We must switch to a new descriptor in kernel space for the GDT 152 * because soon the kernel won't have access anymore to the userspace 153 * addresses where we're currently running on. We have to do that here 154 * because in 32bit we couldn't load a 64bit linear address. 155 */ 156 lgdt early_gdt_descr(%rip) 157 158 /* set up data segments */ 159 xorl %eax,%eax 160 movl %eax,%ds 161 movl %eax,%ss 162 movl %eax,%es 163 164 /* 165 * We don't really need to load %fs or %gs, but load them anyway 166 * to kill any stale realmode selectors. This allows execution 167 * under VT hardware. 168 */ 169 movl %eax,%fs 170 movl %eax,%gs 171 172 /* Set up %gs. 173 * 174 * The base of %gs always points to the bottom of the irqstack 175 * union. If the stack protector canary is enabled, it is 176 * located at %gs:40. Note that, on SMP, the boot cpu uses 177 * init data section till per cpu areas are set up. 178 */ 179 movl $MSR_GS_BASE,%ecx 180 movl initial_gs(%rip),%eax 181 movl initial_gs+4(%rip),%edx 182 wrmsr 183 184 /* rsi is pointer to real mode structure with interesting info. 185 pass it to C */ 186 movq %rsi, %rdi 187 188.Ljump_to_C_code: 189 /* 190 * Jump to run C code and to be on a real kernel address. 191 * Since we are running on identity-mapped space we have to jump 192 * to the full 64bit address, this is only possible as indirect 193 * jump. In addition we need to ensure %cs is set so we make this 194 * a far return. 195 * 196 * Note: do not change to far jump indirect with 64bit offset. 197 * 198 * AMD does not support far jump indirect with 64bit offset. 199 * AMD64 Architecture Programmer's Manual, Volume 3: states only 200 * JMP FAR mem16:16 FF /5 Far jump indirect, 201 * with the target specified by a far pointer in memory. 202 * JMP FAR mem16:32 FF /5 Far jump indirect, 203 * with the target specified by a far pointer in memory. 204 * 205 * Intel64 does support 64bit offset. 206 * Software Developer Manual Vol 2: states: 207 * FF /5 JMP m16:16 Jump far, absolute indirect, 208 * address given in m16:16 209 * FF /5 JMP m16:32 Jump far, absolute indirect, 210 * address given in m16:32. 211 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 212 * address given in m16:64. 213 */ 214 pushq $.Lafter_lret # put return address on stack for unwinder 215 xorq %rbp, %rbp # clear frame pointer 216 movq initial_code(%rip), %rax 217 pushq $__KERNEL_CS # set correct cs 218 pushq %rax # target address in negative space 219 lretq 220.Lafter_lret: 221ENDPROC(secondary_startup_64) 222 223#include "verify_cpu.S" 224 225#ifdef CONFIG_HOTPLUG_CPU 226/* 227 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 228 * up already except stack. We just set up stack here. Then call 229 * start_secondary() via .Ljump_to_C_code. 230 */ 231ENTRY(start_cpu0) 232 movq initial_stack(%rip), %rsp 233 jmp .Ljump_to_C_code 234ENDPROC(start_cpu0) 235#endif 236 237 /* Both SMP bootup and ACPI suspend change these variables */ 238 __REFDATA 239 .balign 8 240 GLOBAL(initial_code) 241 .quad x86_64_start_kernel 242 GLOBAL(initial_gs) 243 .quad INIT_PER_CPU_VAR(irq_stack_union) 244 GLOBAL(initial_stack) 245 /* 246 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel 247 * unwinder reliably detect the end of the stack. 248 */ 249 .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS 250 __FINITDATA 251 252bad_address: 253 jmp bad_address 254 255 __INIT 256ENTRY(early_idt_handler_array) 257 # 104(%rsp) %rflags 258 # 96(%rsp) %cs 259 # 88(%rsp) %rip 260 # 80(%rsp) error code 261 i = 0 262 .rept NUM_EXCEPTION_VECTORS 263 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1 264 pushq $0 # Dummy error code, to make stack frame uniform 265 .endif 266 pushq $i # 72(%rsp) Vector number 267 jmp early_idt_handler_common 268 i = i + 1 269 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 270 .endr 271ENDPROC(early_idt_handler_array) 272 273early_idt_handler_common: 274 /* 275 * The stack is the hardware frame, an error code or zero, and the 276 * vector number. 277 */ 278 cld 279 280 incl early_recursion_flag(%rip) 281 282 /* The vector number is currently in the pt_regs->di slot. */ 283 pushq %rsi /* pt_regs->si */ 284 movq 8(%rsp), %rsi /* RSI = vector number */ 285 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 286 pushq %rdx /* pt_regs->dx */ 287 pushq %rcx /* pt_regs->cx */ 288 pushq %rax /* pt_regs->ax */ 289 pushq %r8 /* pt_regs->r8 */ 290 pushq %r9 /* pt_regs->r9 */ 291 pushq %r10 /* pt_regs->r10 */ 292 pushq %r11 /* pt_regs->r11 */ 293 pushq %rbx /* pt_regs->bx */ 294 pushq %rbp /* pt_regs->bp */ 295 pushq %r12 /* pt_regs->r12 */ 296 pushq %r13 /* pt_regs->r13 */ 297 pushq %r14 /* pt_regs->r14 */ 298 pushq %r15 /* pt_regs->r15 */ 299 300 cmpq $14,%rsi /* Page fault? */ 301 jnz 10f 302 GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */ 303 call early_make_pgtable 304 andl %eax,%eax 305 jz 20f /* All good */ 306 30710: 308 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 309 call early_fixup_exception 310 31120: 312 decl early_recursion_flag(%rip) 313 jmp restore_regs_and_iret 314ENDPROC(early_idt_handler_common) 315 316 __INITDATA 317 318 .balign 4 319GLOBAL(early_recursion_flag) 320 .long 0 321 322#define NEXT_PAGE(name) \ 323 .balign PAGE_SIZE; \ 324GLOBAL(name) 325 326/* Automate the creation of 1 to 1 mapping pmd entries */ 327#define PMDS(START, PERM, COUNT) \ 328 i = 0 ; \ 329 .rept (COUNT) ; \ 330 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 331 i = i + 1 ; \ 332 .endr 333 334 __INITDATA 335NEXT_PAGE(early_top_pgt) 336 .fill 511,8,0 337#ifdef CONFIG_X86_5LEVEL 338 .quad level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 339#else 340 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 341#endif 342 343NEXT_PAGE(early_dynamic_pgts) 344 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 345 346 .data 347 348#ifndef CONFIG_XEN 349NEXT_PAGE(init_top_pgt) 350 .fill 512,8,0 351#else 352NEXT_PAGE(init_top_pgt) 353 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 354 .org init_top_pgt + PGD_PAGE_OFFSET*8, 0 355 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 356 .org init_top_pgt + PGD_START_KERNEL*8, 0 357 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 358 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 359 360NEXT_PAGE(level3_ident_pgt) 361 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 362 .fill 511, 8, 0 363NEXT_PAGE(level2_ident_pgt) 364 /* Since I easily can, map the first 1G. 365 * Don't set NX because code runs from these pages. 366 */ 367 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 368#endif 369 370#ifdef CONFIG_X86_5LEVEL 371NEXT_PAGE(level4_kernel_pgt) 372 .fill 511,8,0 373 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 374#endif 375 376NEXT_PAGE(level3_kernel_pgt) 377 .fill L3_START_KERNEL,8,0 378 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 379 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 380 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 381 382NEXT_PAGE(level2_kernel_pgt) 383 /* 384 * 512 MB kernel mapping. We spend a full page on this pagetable 385 * anyway. 386 * 387 * The kernel code+data+bss must not be bigger than that. 388 * 389 * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 390 * If you want to increase this then increase MODULES_VADDR 391 * too.) 392 */ 393 PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 394 KERNEL_IMAGE_SIZE/PMD_SIZE) 395 396NEXT_PAGE(level2_fixmap_pgt) 397 .fill 506,8,0 398 .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 399 /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 400 .fill 5,8,0 401 402NEXT_PAGE(level1_fixmap_pgt) 403 .fill 512,8,0 404 405#undef PMDS 406 407 .data 408 .align 16 409 .globl early_gdt_descr 410early_gdt_descr: 411 .word GDT_ENTRIES*8-1 412early_gdt_descr_base: 413 .quad INIT_PER_CPU_VAR(gdt_page) 414 415ENTRY(phys_base) 416 /* This must match the first entry in level2_kernel_pgt */ 417 .quad 0x0000000000000000 418EXPORT_SYMBOL(phys_base) 419 420#include "../../x86/xen/xen-head.S" 421 422 __PAGE_ALIGNED_BSS 423NEXT_PAGE(empty_zero_page) 424 .skip PAGE_SIZE 425EXPORT_SYMBOL(empty_zero_page) 426 427