1250c2277SThomas Gleixner/* 25b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 3250c2277SThomas Gleixner * 4250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 5250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 6250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 7250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 9250c2277SThomas Gleixner */ 10250c2277SThomas Gleixner 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner#include <linux/linkage.h> 13250c2277SThomas Gleixner#include <linux/threads.h> 14250c2277SThomas Gleixner#include <linux/init.h> 15250c2277SThomas Gleixner#include <asm/segment.h> 16250c2277SThomas Gleixner#include <asm/pgtable.h> 17250c2277SThomas Gleixner#include <asm/page.h> 18250c2277SThomas Gleixner#include <asm/msr.h> 19250c2277SThomas Gleixner#include <asm/cache.h> 20369101daSCyrill Gorcunov#include <asm/processor-flags.h> 21b12d8db8STejun Heo#include <asm/percpu.h> 229900aa2fSH. Peter Anvin#include <asm/nops.h> 237bbcdb1cSAndy Lutomirski#include "../entry/calling.h" 24250c2277SThomas Gleixner 2549a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2649a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2749a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 28ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 2949a69787SGlauber de Oliveira Costa#else 30ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) movq %cr2, reg 319900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3249a69787SGlauber de Oliveira Costa#endif 3349a69787SGlauber de Oliveira Costa 343ad2f3fbSDaniel Mack/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 35250c2277SThomas Gleixner * because we need identity-mapped pages. 36250c2277SThomas Gleixner * 37250c2277SThomas Gleixner */ 38250c2277SThomas Gleixner 39a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 40a6523748SEduardo Habkost 41a6523748SEduardo HabkostL4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) 42a6523748SEduardo HabkostL4_START_KERNEL = pgd_index(__START_KERNEL_map) 43a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 44a6523748SEduardo Habkost 45250c2277SThomas Gleixner .text 464ae59b91STim Abbott __HEAD 47250c2277SThomas Gleixner .code64 48250c2277SThomas Gleixner .globl startup_64 49250c2277SThomas Gleixnerstartup_64: 50250c2277SThomas Gleixner /* 511256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 52250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 53250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 54250c2277SThomas Gleixner * kernel pages and possibly all of memory. 55250c2277SThomas Gleixner * 568170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 57250c2277SThomas Gleixner * 58250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 595b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 60250c2277SThomas Gleixner * 61250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 62250c2277SThomas Gleixner * 63250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 64250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 65250c2277SThomas Gleixner * tables and then reload them. 66250c2277SThomas Gleixner */ 67250c2277SThomas Gleixner 6891ed140dSBorislav Petkov /* 6991ed140dSBorislav Petkov * Setup stack for verify_cpu(). "-8" because stack_start is defined 7091ed140dSBorislav Petkov * this way, see below. Our best guess is a NULL ptr for stack 7191ed140dSBorislav Petkov * termination heuristics and we don't want to break anything which 7291ed140dSBorislav Petkov * might depend on it (kgdb, ...). 7391ed140dSBorislav Petkov */ 7491ed140dSBorislav Petkov leaq (__end_init_task - 8)(%rip), %rsp 7591ed140dSBorislav Petkov 7604633df0SBorislav Petkov /* Sanitize CPU configuration */ 7704633df0SBorislav Petkov call verify_cpu 7804633df0SBorislav Petkov 798170e6beSH. Peter Anvin /* 808170e6beSH. Peter Anvin * Compute the delta between the address I am compiled to run at and the 81250c2277SThomas Gleixner * address I am actually running at. 82250c2277SThomas Gleixner */ 83250c2277SThomas Gleixner leaq _text(%rip), %rbp 84250c2277SThomas Gleixner subq $_text - __START_KERNEL_map, %rbp 85250c2277SThomas Gleixner 86250c2277SThomas Gleixner /* Is the address not 2M aligned? */ 87a4733143SAlexander Kuleshov testl $~PMD_PAGE_MASK, %ebp 88250c2277SThomas Gleixner jnz bad_address 89250c2277SThomas Gleixner 908170e6beSH. Peter Anvin /* 918170e6beSH. Peter Anvin * Is the address too large? 92250c2277SThomas Gleixner */ 938170e6beSH. Peter Anvin leaq _text(%rip), %rax 948170e6beSH. Peter Anvin shrq $MAX_PHYSMEM_BITS, %rax 958170e6beSH. Peter Anvin jnz bad_address 96250c2277SThomas Gleixner 978170e6beSH. Peter Anvin /* 988170e6beSH. Peter Anvin * Fixup the physical addresses in the page table 998170e6beSH. Peter Anvin */ 1008170e6beSH. Peter Anvin addq %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip) 101250c2277SThomas Gleixner 102250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (510*8)(%rip) 103250c2277SThomas Gleixner addq %rbp, level3_kernel_pgt + (511*8)(%rip) 104250c2277SThomas Gleixner 105250c2277SThomas Gleixner addq %rbp, level2_fixmap_pgt + (506*8)(%rip) 106250c2277SThomas Gleixner 1078170e6beSH. Peter Anvin /* 1088170e6beSH. Peter Anvin * Set up the identity mapping for the switchover. These 1098170e6beSH. Peter Anvin * entries should *NOT* have the global bit set! This also 1108170e6beSH. Peter Anvin * creates a bunch of nonsense entries but that is fine -- 1118170e6beSH. Peter Anvin * it avoids problems around wraparound. 1128170e6beSH. Peter Anvin */ 113250c2277SThomas Gleixner leaq _text(%rip), %rdi 1148170e6beSH. Peter Anvin leaq early_level4_pgt(%rip), %rbx 115250c2277SThomas Gleixner 116250c2277SThomas Gleixner movq %rdi, %rax 1178170e6beSH. Peter Anvin shrq $PGDIR_SHIFT, %rax 1188170e6beSH. Peter Anvin 1198170e6beSH. Peter Anvin leaq (4096 + _KERNPG_TABLE)(%rbx), %rdx 1208170e6beSH. Peter Anvin movq %rdx, 0(%rbx,%rax,8) 1218170e6beSH. Peter Anvin movq %rdx, 8(%rbx,%rax,8) 1228170e6beSH. Peter Anvin 1238170e6beSH. Peter Anvin addq $4096, %rdx 1248170e6beSH. Peter Anvin movq %rdi, %rax 125250c2277SThomas Gleixner shrq $PUD_SHIFT, %rax 1268170e6beSH. Peter Anvin andl $(PTRS_PER_PUD-1), %eax 127e9d0626eSZhang Yanfei movq %rdx, 4096(%rbx,%rax,8) 128e9d0626eSZhang Yanfei incl %eax 129e9d0626eSZhang Yanfei andl $(PTRS_PER_PUD-1), %eax 130e9d0626eSZhang Yanfei movq %rdx, 4096(%rbx,%rax,8) 131250c2277SThomas Gleixner 1328170e6beSH. Peter Anvin addq $8192, %rbx 133250c2277SThomas Gleixner movq %rdi, %rax 1348170e6beSH. Peter Anvin shrq $PMD_SHIFT, %rdi 1358170e6beSH. Peter Anvin addq $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax 1368170e6beSH. Peter Anvin leaq (_end - 1)(%rip), %rcx 1378170e6beSH. Peter Anvin shrq $PMD_SHIFT, %rcx 1388170e6beSH. Peter Anvin subq %rdi, %rcx 1398170e6beSH. Peter Anvin incl %ecx 1408170e6beSH. Peter Anvin 1418170e6beSH. Peter Anvin1: 1428170e6beSH. Peter Anvin andq $(PTRS_PER_PMD - 1), %rdi 1438170e6beSH. Peter Anvin movq %rax, (%rbx,%rdi,8) 1448170e6beSH. Peter Anvin incq %rdi 1458170e6beSH. Peter Anvin addq $PMD_SIZE, %rax 1468170e6beSH. Peter Anvin decl %ecx 1478170e6beSH. Peter Anvin jnz 1b 148250c2277SThomas Gleixner 14931eedd82SThomas Gleixner /* 15031eedd82SThomas Gleixner * Fixup the kernel text+data virtual addresses. Note that 15131eedd82SThomas Gleixner * we might write invalid pmds, when the kernel is relocated 15231eedd82SThomas Gleixner * cleanup_highmap() fixes this up along with the mappings 15331eedd82SThomas Gleixner * beyond _end. 154250c2277SThomas Gleixner */ 155250c2277SThomas Gleixner leaq level2_kernel_pgt(%rip), %rdi 156250c2277SThomas Gleixner leaq 4096(%rdi), %r8 157250c2277SThomas Gleixner /* See if it is a valid page table entry */ 1583e1aa7cbSDenys Vlasenko1: testb $1, 0(%rdi) 159250c2277SThomas Gleixner jz 2f 160250c2277SThomas Gleixner addq %rbp, 0(%rdi) 161250c2277SThomas Gleixner /* Go to the next page */ 162250c2277SThomas Gleixner2: addq $8, %rdi 163250c2277SThomas Gleixner cmp %r8, %rdi 164250c2277SThomas Gleixner jne 1b 165250c2277SThomas Gleixner 166250c2277SThomas Gleixner /* Fixup phys_base */ 167250c2277SThomas Gleixner addq %rbp, phys_base(%rip) 168250c2277SThomas Gleixner 1698170e6beSH. Peter Anvin movq $(early_level4_pgt - __START_KERNEL_map), %rax 1708170e6beSH. Peter Anvin jmp 1f 171250c2277SThomas GleixnerENTRY(secondary_startup_64) 172250c2277SThomas Gleixner /* 1731256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 174250c2277SThomas Gleixner * and someone has loaded a mapped page table. 175250c2277SThomas Gleixner * 1768170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 177250c2277SThomas Gleixner * 178250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 179250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 180250c2277SThomas Gleixner * 181250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 182250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 183250c2277SThomas Gleixner * after the boot processor executes this code. 184250c2277SThomas Gleixner */ 185250c2277SThomas Gleixner 18604633df0SBorislav Petkov /* Sanitize CPU configuration */ 18704633df0SBorislav Petkov call verify_cpu 18804633df0SBorislav Petkov 1898170e6beSH. Peter Anvin movq $(init_level4_pgt - __START_KERNEL_map), %rax 1908170e6beSH. Peter Anvin1: 1918170e6beSH. Peter Anvin 192250c2277SThomas Gleixner /* Enable PAE mode and PGE */ 1938170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 1948170e6beSH. Peter Anvin movq %rcx, %cr4 195250c2277SThomas Gleixner 196250c2277SThomas Gleixner /* Setup early boot stage 4 level pagetables. */ 197250c2277SThomas Gleixner addq phys_base(%rip), %rax 198250c2277SThomas Gleixner movq %rax, %cr3 199250c2277SThomas Gleixner 200250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 201250c2277SThomas Gleixner movq $1f, %rax 202250c2277SThomas Gleixner jmp *%rax 203250c2277SThomas Gleixner1: 204250c2277SThomas Gleixner 205250c2277SThomas Gleixner /* Check if nx is implemented */ 206250c2277SThomas Gleixner movl $0x80000001, %eax 207250c2277SThomas Gleixner cpuid 208250c2277SThomas Gleixner movl %edx,%edi 209250c2277SThomas Gleixner 210250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 211250c2277SThomas Gleixner movl $MSR_EFER, %ecx 212250c2277SThomas Gleixner rdmsr 213250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 214250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 215250c2277SThomas Gleixner jnc 1f 216250c2277SThomas Gleixner btsl $_EFER_NX, %eax 21778d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 218250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 219250c2277SThomas Gleixner 220250c2277SThomas Gleixner /* Setup cr0 */ 221369101daSCyrill Gorcunov#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 222369101daSCyrill Gorcunov X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 223369101daSCyrill Gorcunov X86_CR0_PG) 224369101daSCyrill Gorcunov movl $CR0_STATE, %eax 225250c2277SThomas Gleixner /* Make changes effective */ 226250c2277SThomas Gleixner movq %rax, %cr0 227250c2277SThomas Gleixner 228250c2277SThomas Gleixner /* Setup a boot time stack */ 2299cf4f298SGlauber Costa movq stack_start(%rip), %rsp 230250c2277SThomas Gleixner 231250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 232250c2277SThomas Gleixner pushq $0 233250c2277SThomas Gleixner popfq 234250c2277SThomas Gleixner 235250c2277SThomas Gleixner /* 236250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 237250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 238250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 239250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 240250c2277SThomas Gleixner */ 241a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 242250c2277SThomas Gleixner 2438ec6993dSBrian Gerst /* set up data segments */ 2448ec6993dSBrian Gerst xorl %eax,%eax 245250c2277SThomas Gleixner movl %eax,%ds 246250c2277SThomas Gleixner movl %eax,%ss 247250c2277SThomas Gleixner movl %eax,%es 248250c2277SThomas Gleixner 249250c2277SThomas Gleixner /* 250250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 251250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 252250c2277SThomas Gleixner * under VT hardware. 253250c2277SThomas Gleixner */ 254250c2277SThomas Gleixner movl %eax,%fs 255250c2277SThomas Gleixner movl %eax,%gs 256250c2277SThomas Gleixner 257f32ff538STejun Heo /* Set up %gs. 258f32ff538STejun Heo * 259947e76cdSBrian Gerst * The base of %gs always points to the bottom of the irqstack 260947e76cdSBrian Gerst * union. If the stack protector canary is enabled, it is 261947e76cdSBrian Gerst * located at %gs:40. Note that, on SMP, the boot cpu uses 262947e76cdSBrian Gerst * init data section till per cpu areas are set up. 263250c2277SThomas Gleixner */ 264250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 265650fb439SBrian Gerst movl initial_gs(%rip),%eax 266650fb439SBrian Gerst movl initial_gs+4(%rip),%edx 267250c2277SThomas Gleixner wrmsr 268250c2277SThomas Gleixner 2698170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 270250c2277SThomas Gleixner pass it to C */ 2718170e6beSH. Peter Anvin movq %rsi, %rdi 272250c2277SThomas Gleixner 273250c2277SThomas Gleixner /* Finally jump to run C code and to be on real kernel address 274250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 275250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 276250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 277250c2277SThomas Gleixner * a far return. 2788170e6beSH. Peter Anvin * 2798170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2808170e6beSH. Peter Anvin * 2818170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2828170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2838170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2848170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2858170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2868170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2878170e6beSH. Peter Anvin * 2888170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2898170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2908170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2918170e6beSH. Peter Anvin * address given in m16:16 2928170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2938170e6beSH. Peter Anvin * address given in m16:32. 2948170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2958170e6beSH. Peter Anvin * address given in m16:64. 296250c2277SThomas Gleixner */ 297250c2277SThomas Gleixner movq initial_code(%rip),%rax 298250c2277SThomas Gleixner pushq $0 # fake return address to stop unwinder 299250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 300250c2277SThomas Gleixner pushq %rax # target address in negative space 301250c2277SThomas Gleixner lretq 302dbf984d8SBorislav PetkovENDPROC(secondary_startup_64) 303250c2277SThomas Gleixner 30404633df0SBorislav Petkov#include "verify_cpu.S" 30504633df0SBorislav Petkov 30642e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 30742e78e97SFenghua Yu/* 30842e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 30942e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 31042e78e97SFenghua Yu * start_secondary(). 31142e78e97SFenghua Yu */ 31242e78e97SFenghua YuENTRY(start_cpu0) 31342e78e97SFenghua Yu movq stack_start(%rip),%rsp 31442e78e97SFenghua Yu movq initial_code(%rip),%rax 31542e78e97SFenghua Yu pushq $0 # fake return address to stop unwinder 31642e78e97SFenghua Yu pushq $__KERNEL_CS # set correct cs 31742e78e97SFenghua Yu pushq %rax # target address in negative space 31842e78e97SFenghua Yu lretq 31942e78e97SFenghua YuENDPROC(start_cpu0) 32042e78e97SFenghua Yu#endif 32142e78e97SFenghua Yu 322250c2277SThomas Gleixner /* SMP bootup changes these two */ 323da5968aeSSam Ravnborg __REFDATA 3248170e6beSH. Peter Anvin .balign 8 3258170e6beSH. Peter Anvin GLOBAL(initial_code) 326250c2277SThomas Gleixner .quad x86_64_start_kernel 3278170e6beSH. Peter Anvin GLOBAL(initial_gs) 3282add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(irq_stack_union) 329f1fbabb3SSam Ravnborg 3308170e6beSH. Peter Anvin GLOBAL(stack_start) 331250c2277SThomas Gleixner .quad init_thread_union+THREAD_SIZE-8 3329cf4f298SGlauber Costa .word 0 333b9af7c0dSSuresh Siddha __FINITDATA 334250c2277SThomas Gleixner 335250c2277SThomas Gleixnerbad_address: 336250c2277SThomas Gleixner jmp bad_address 337250c2277SThomas Gleixner 3388170e6beSH. Peter Anvin __INIT 339cdeb6048SAndy LutomirskiENTRY(early_idt_handler_array) 3409900aa2fSH. Peter Anvin # 104(%rsp) %rflags 3419900aa2fSH. Peter Anvin # 96(%rsp) %cs 3429900aa2fSH. Peter Anvin # 88(%rsp) %rip 3439900aa2fSH. Peter Anvin # 80(%rsp) error code 344749c970aSAndi Kleen i = 0 345749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 346cdeb6048SAndy Lutomirski .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1 3479900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 3489900aa2fSH. Peter Anvin .endif 3499900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 350cdeb6048SAndy Lutomirski jmp early_idt_handler_common 351749c970aSAndi Kleen i = i + 1 352cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 353749c970aSAndi Kleen .endr 354cdeb6048SAndy LutomirskiENDPROC(early_idt_handler_array) 3558866cd9dSRoland McGrath 356cdeb6048SAndy Lutomirskiearly_idt_handler_common: 357cdeb6048SAndy Lutomirski /* 358cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 359cdeb6048SAndy Lutomirski * vector number. 360cdeb6048SAndy Lutomirski */ 3619900aa2fSH. Peter Anvin cld 3629900aa2fSH. Peter Anvin 363250c2277SThomas Gleixner incl early_recursion_flag(%rip) 3649900aa2fSH. Peter Anvin 3657bbcdb1cSAndy Lutomirski /* The vector number is currently in the pt_regs->di slot. */ 3667bbcdb1cSAndy Lutomirski pushq %rsi /* pt_regs->si */ 3677bbcdb1cSAndy Lutomirski movq 8(%rsp), %rsi /* RSI = vector number */ 3687bbcdb1cSAndy Lutomirski movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 3697bbcdb1cSAndy Lutomirski pushq %rdx /* pt_regs->dx */ 3707bbcdb1cSAndy Lutomirski pushq %rcx /* pt_regs->cx */ 3717bbcdb1cSAndy Lutomirski pushq %rax /* pt_regs->ax */ 3727bbcdb1cSAndy Lutomirski pushq %r8 /* pt_regs->r8 */ 3737bbcdb1cSAndy Lutomirski pushq %r9 /* pt_regs->r9 */ 3747bbcdb1cSAndy Lutomirski pushq %r10 /* pt_regs->r10 */ 3757bbcdb1cSAndy Lutomirski pushq %r11 /* pt_regs->r11 */ 3767bbcdb1cSAndy Lutomirski pushq %rbx /* pt_regs->bx */ 3777bbcdb1cSAndy Lutomirski pushq %rbp /* pt_regs->bp */ 3787bbcdb1cSAndy Lutomirski pushq %r12 /* pt_regs->r12 */ 3797bbcdb1cSAndy Lutomirski pushq %r13 /* pt_regs->r13 */ 3807bbcdb1cSAndy Lutomirski pushq %r14 /* pt_regs->r14 */ 3817bbcdb1cSAndy Lutomirski pushq %r15 /* pt_regs->r15 */ 3829900aa2fSH. Peter Anvin 3837bbcdb1cSAndy Lutomirski cmpq $14,%rsi /* Page fault? */ 3848170e6beSH. Peter Anvin jnz 10f 3857bbcdb1cSAndy Lutomirski GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */ 3868170e6beSH. Peter Anvin call early_make_pgtable 3878170e6beSH. Peter Anvin andl %eax,%eax 3887bbcdb1cSAndy Lutomirski jz 20f /* All good */ 3898170e6beSH. Peter Anvin 3908170e6beSH. Peter Anvin10: 3917bbcdb1cSAndy Lutomirski movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 3929900aa2fSH. Peter Anvin call early_fixup_exception 3939900aa2fSH. Peter Anvin 3940e861fbbSAndy Lutomirski20: 3959900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 3967bbcdb1cSAndy Lutomirski jmp restore_regs_and_iret 397cdeb6048SAndy LutomirskiENDPROC(early_idt_handler_common) 3989900aa2fSH. Peter Anvin 3998170e6beSH. Peter Anvin __INITDATA 4008170e6beSH. Peter Anvin 4019900aa2fSH. Peter Anvin .balign 4 4020e861fbbSAndy LutomirskiGLOBAL(early_recursion_flag) 403250c2277SThomas Gleixner .long 0 404250c2277SThomas Gleixner 405250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 406250c2277SThomas Gleixner .balign PAGE_SIZE; \ 4078170e6beSH. Peter AnvinGLOBAL(name) 408250c2277SThomas Gleixner 409250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 410250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 411250c2277SThomas Gleixner i = 0 ; \ 412250c2277SThomas Gleixner .rept (COUNT) ; \ 4130e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 414250c2277SThomas Gleixner i = i + 1 ; \ 415250c2277SThomas Gleixner .endr 416250c2277SThomas Gleixner 4178170e6beSH. Peter Anvin __INITDATA 4188170e6beSH. Peter AnvinNEXT_PAGE(early_level4_pgt) 4198170e6beSH. Peter Anvin .fill 511,8,0 4208170e6beSH. Peter Anvin .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 4218170e6beSH. Peter Anvin 4228170e6beSH. Peter AnvinNEXT_PAGE(early_dynamic_pgts) 4238170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 4248170e6beSH. Peter Anvin 425b9af7c0dSSuresh Siddha .data 4268170e6beSH. Peter Anvin 4278170e6beSH. Peter Anvin#ifndef CONFIG_XEN 4288170e6beSH. Peter AnvinNEXT_PAGE(init_level4_pgt) 4298170e6beSH. Peter Anvin .fill 512,8,0 4308170e6beSH. Peter Anvin#else 431250c2277SThomas GleixnerNEXT_PAGE(init_level4_pgt) 432250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 433a6523748SEduardo Habkost .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 434250c2277SThomas Gleixner .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 435a6523748SEduardo Habkost .org init_level4_pgt + L4_START_KERNEL*8, 0 436250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 437250c2277SThomas Gleixner .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE 438250c2277SThomas Gleixner 439250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 440250c2277SThomas Gleixner .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE 441250c2277SThomas Gleixner .fill 511, 8, 0 4428170e6beSH. Peter AnvinNEXT_PAGE(level2_ident_pgt) 4438170e6beSH. Peter Anvin /* Since I easily can, map the first 1G. 4448170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 4458170e6beSH. Peter Anvin */ 4468170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 4478170e6beSH. Peter Anvin#endif 448250c2277SThomas Gleixner 449250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 450a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 451250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 452250c2277SThomas Gleixner .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE 453250c2277SThomas Gleixner .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 454250c2277SThomas Gleixner 455250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 45688f3aec7SIngo Molnar /* 45785eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 45888f3aec7SIngo Molnar * anyway. 45988f3aec7SIngo Molnar * 46088f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 46188f3aec7SIngo Molnar * 46285eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 46388f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 46488f3aec7SIngo Molnar * too.) 46588f3aec7SIngo Molnar */ 4668490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 467d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 468250c2277SThomas Gleixner 4698170e6beSH. Peter AnvinNEXT_PAGE(level2_fixmap_pgt) 4708170e6beSH. Peter Anvin .fill 506,8,0 4718170e6beSH. Peter Anvin .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE 4728170e6beSH. Peter Anvin /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 4738170e6beSH. Peter Anvin .fill 5,8,0 4748170e6beSH. Peter Anvin 4758170e6beSH. Peter AnvinNEXT_PAGE(level1_fixmap_pgt) 476250c2277SThomas Gleixner .fill 512,8,0 477250c2277SThomas Gleixner 478250c2277SThomas Gleixner#undef PMDS 479250c2277SThomas Gleixner 480250c2277SThomas Gleixner .data 481250c2277SThomas Gleixner .align 16 482a939098aSGlauber Costa .globl early_gdt_descr 483a939098aSGlauber Costaearly_gdt_descr: 484a939098aSGlauber Costa .word GDT_ENTRIES*8-1 4853e5d8f97STejun Heoearly_gdt_descr_base: 4862add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(gdt_page) 487250c2277SThomas Gleixner 488250c2277SThomas GleixnerENTRY(phys_base) 489250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 490250c2277SThomas Gleixner .quad 0x0000000000000000 491250c2277SThomas Gleixner 4928c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 493250c2277SThomas Gleixner 49402b7da37STim Abbott __PAGE_ALIGNED_BSS 4958170e6beSH. Peter AnvinNEXT_PAGE(empty_zero_page) 496250c2277SThomas Gleixner .skip PAGE_SIZE 497ef7f0d6aSAndrey Ryabinin 498