1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 2250c2277SThomas Gleixner/* 35b171e82SAlexander Kuleshov * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit 4250c2277SThomas Gleixner * 5250c2277SThomas Gleixner * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6250c2277SThomas Gleixner * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7250c2277SThomas Gleixner * Copyright (C) 2000 Karsten Keil <kkeil@suse.de> 8250c2277SThomas Gleixner * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de> 9250c2277SThomas Gleixner * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com> 10250c2277SThomas Gleixner */ 11250c2277SThomas Gleixner 12250c2277SThomas Gleixner 13250c2277SThomas Gleixner#include <linux/linkage.h> 14250c2277SThomas Gleixner#include <linux/threads.h> 15250c2277SThomas Gleixner#include <linux/init.h> 16250c2277SThomas Gleixner#include <asm/segment.h> 17250c2277SThomas Gleixner#include <asm/pgtable.h> 18250c2277SThomas Gleixner#include <asm/page.h> 19250c2277SThomas Gleixner#include <asm/msr.h> 20250c2277SThomas Gleixner#include <asm/cache.h> 21369101daSCyrill Gorcunov#include <asm/processor-flags.h> 22b12d8db8STejun Heo#include <asm/percpu.h> 239900aa2fSH. Peter Anvin#include <asm/nops.h> 247bbcdb1cSAndy Lutomirski#include "../entry/calling.h" 25784d5699SAl Viro#include <asm/export.h> 26250c2277SThomas Gleixner 2749a69787SGlauber de Oliveira Costa#ifdef CONFIG_PARAVIRT 2849a69787SGlauber de Oliveira Costa#include <asm/asm-offsets.h> 2949a69787SGlauber de Oliveira Costa#include <asm/paravirt.h> 30ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg 3149a69787SGlauber de Oliveira Costa#else 32ffc4bc9cSH. Peter Anvin#define GET_CR2_INTO(reg) movq %cr2, reg 339900aa2fSH. Peter Anvin#define INTERRUPT_RETURN iretq 3449a69787SGlauber de Oliveira Costa#endif 3549a69787SGlauber de Oliveira Costa 363ad2f3fbSDaniel Mack/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE 37250c2277SThomas Gleixner * because we need identity-mapped pages. 38250c2277SThomas Gleixner * 39250c2277SThomas Gleixner */ 40250c2277SThomas Gleixner 41a6523748SEduardo Habkost#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 42a6523748SEduardo Habkost 434375c299SKirill A. Shutemov#if defined(CONFIG_XEN_PV) || defined(CONFIG_XEN_PVH) 44032370b9SKirill A. ShutemovPGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE) 45032370b9SKirill A. ShutemovPGD_START_KERNEL = pgd_index(__START_KERNEL_map) 464375c299SKirill A. Shutemov#endif 47a6523748SEduardo HabkostL3_START_KERNEL = pud_index(__START_KERNEL_map) 48a6523748SEduardo Habkost 49250c2277SThomas Gleixner .text 504ae59b91STim Abbott __HEAD 51250c2277SThomas Gleixner .code64 52250c2277SThomas Gleixner .globl startup_64 53250c2277SThomas Gleixnerstartup_64: 542704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 55250c2277SThomas Gleixner /* 561256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 57250c2277SThomas Gleixner * and someone has loaded an identity mapped page table 58250c2277SThomas Gleixner * for us. These identity mapped page tables map all of the 59250c2277SThomas Gleixner * kernel pages and possibly all of memory. 60250c2277SThomas Gleixner * 618170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 62250c2277SThomas Gleixner * 63250c2277SThomas Gleixner * We come here either directly from a 64bit bootloader, or from 645b171e82SAlexander Kuleshov * arch/x86/boot/compressed/head_64.S. 65250c2277SThomas Gleixner * 66250c2277SThomas Gleixner * We only come here initially at boot nothing else comes here. 67250c2277SThomas Gleixner * 68250c2277SThomas Gleixner * Since we may be loaded at an address different from what we were 69250c2277SThomas Gleixner * compiled to run at we first fixup the physical addresses in our page 70250c2277SThomas Gleixner * tables and then reload them. 71250c2277SThomas Gleixner */ 72250c2277SThomas Gleixner 7322dc3918SJosh Poimboeuf /* Set up the stack for verify_cpu(), similar to initial_stack below */ 7422dc3918SJosh Poimboeuf leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp 7591ed140dSBorislav Petkov 7604633df0SBorislav Petkov /* Sanitize CPU configuration */ 7704633df0SBorislav Petkov call verify_cpu 7804633df0SBorislav Petkov 795868f365STom Lendacky /* 805868f365STom Lendacky * Perform pagetable fixups. Additionally, if SME is active, encrypt 815868f365STom Lendacky * the kernel and retrieve the modifier (SME encryption mask if SME 825868f365STom Lendacky * is active) to be added to the initial pgdir entry that will be 835868f365STom Lendacky * programmed into CR3. 845868f365STom Lendacky */ 85250c2277SThomas Gleixner leaq _text(%rip), %rdi 86c88d7150SKirill A. Shutemov pushq %rsi 87c88d7150SKirill A. Shutemov call __startup_64 88c88d7150SKirill A. Shutemov popq %rsi 89250c2277SThomas Gleixner 905868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 915868f365STom Lendacky addq $(early_top_pgt - __START_KERNEL_map), %rax 928170e6beSH. Peter Anvin jmp 1f 93250c2277SThomas GleixnerENTRY(secondary_startup_64) 942704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 95250c2277SThomas Gleixner /* 961256276cSKonrad Rzeszutek Wilk * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0, 97250c2277SThomas Gleixner * and someone has loaded a mapped page table. 98250c2277SThomas Gleixner * 998170e6beSH. Peter Anvin * %rsi holds a physical pointer to real_mode_data. 100250c2277SThomas Gleixner * 101250c2277SThomas Gleixner * We come here either from startup_64 (using physical addresses) 102250c2277SThomas Gleixner * or from trampoline.S (using virtual addresses). 103250c2277SThomas Gleixner * 104250c2277SThomas Gleixner * Using virtual addresses from trampoline.S removes the need 105250c2277SThomas Gleixner * to have any identity mapped pages in the kernel page table 106250c2277SThomas Gleixner * after the boot processor executes this code. 107250c2277SThomas Gleixner */ 108250c2277SThomas Gleixner 10904633df0SBorislav Petkov /* Sanitize CPU configuration */ 11004633df0SBorislav Petkov call verify_cpu 11104633df0SBorislav Petkov 1125868f365STom Lendacky /* 1135868f365STom Lendacky * Retrieve the modifier (SME encryption mask if SME is active) to be 1145868f365STom Lendacky * added to the initial pgdir entry that will be programmed into CR3. 1155868f365STom Lendacky */ 1165868f365STom Lendacky pushq %rsi 1175868f365STom Lendacky call __startup_secondary_64 1185868f365STom Lendacky popq %rsi 1195868f365STom Lendacky 1205868f365STom Lendacky /* Form the CR3 value being sure to include the CR3 modifier */ 1215868f365STom Lendacky addq $(init_top_pgt - __START_KERNEL_map), %rax 1228170e6beSH. Peter Anvin1: 1238170e6beSH. Peter Anvin 124032370b9SKirill A. Shutemov /* Enable PAE mode, PGE and LA57 */ 1258170e6beSH. Peter Anvin movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx 126032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 127032370b9SKirill A. Shutemov orl $X86_CR4_LA57, %ecx 128032370b9SKirill A. Shutemov#endif 1298170e6beSH. Peter Anvin movq %rcx, %cr4 130250c2277SThomas Gleixner 131032370b9SKirill A. Shutemov /* Setup early boot stage 4-/5-level pagetables. */ 132250c2277SThomas Gleixner addq phys_base(%rip), %rax 133250c2277SThomas Gleixner movq %rax, %cr3 134250c2277SThomas Gleixner 135250c2277SThomas Gleixner /* Ensure I am executing from virtual addresses */ 136250c2277SThomas Gleixner movq $1f, %rax 137250c2277SThomas Gleixner jmp *%rax 138250c2277SThomas Gleixner1: 1392704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 140250c2277SThomas Gleixner 141250c2277SThomas Gleixner /* Check if nx is implemented */ 142250c2277SThomas Gleixner movl $0x80000001, %eax 143250c2277SThomas Gleixner cpuid 144250c2277SThomas Gleixner movl %edx,%edi 145250c2277SThomas Gleixner 146250c2277SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 147250c2277SThomas Gleixner movl $MSR_EFER, %ecx 148250c2277SThomas Gleixner rdmsr 149250c2277SThomas Gleixner btsl $_EFER_SCE, %eax /* Enable System Call */ 150250c2277SThomas Gleixner btl $20,%edi /* No Execute supported? */ 151250c2277SThomas Gleixner jnc 1f 152250c2277SThomas Gleixner btsl $_EFER_NX, %eax 15378d77df7SH. Peter Anvin btsq $_PAGE_BIT_NX,early_pmd_flags(%rip) 154250c2277SThomas Gleixner1: wrmsr /* Make changes effective */ 155250c2277SThomas Gleixner 156250c2277SThomas Gleixner /* Setup cr0 */ 157369101daSCyrill Gorcunov movl $CR0_STATE, %eax 158250c2277SThomas Gleixner /* Make changes effective */ 159250c2277SThomas Gleixner movq %rax, %cr0 160250c2277SThomas Gleixner 161250c2277SThomas Gleixner /* Setup a boot time stack */ 162b32f96c7SJosh Poimboeuf movq initial_stack(%rip), %rsp 163250c2277SThomas Gleixner 164250c2277SThomas Gleixner /* zero EFLAGS after setting rsp */ 165250c2277SThomas Gleixner pushq $0 166250c2277SThomas Gleixner popfq 167250c2277SThomas Gleixner 168250c2277SThomas Gleixner /* 169250c2277SThomas Gleixner * We must switch to a new descriptor in kernel space for the GDT 170250c2277SThomas Gleixner * because soon the kernel won't have access anymore to the userspace 171250c2277SThomas Gleixner * addresses where we're currently running on. We have to do that here 172250c2277SThomas Gleixner * because in 32bit we couldn't load a 64bit linear address. 173250c2277SThomas Gleixner */ 174a939098aSGlauber Costa lgdt early_gdt_descr(%rip) 175250c2277SThomas Gleixner 1768ec6993dSBrian Gerst /* set up data segments */ 1778ec6993dSBrian Gerst xorl %eax,%eax 178250c2277SThomas Gleixner movl %eax,%ds 179250c2277SThomas Gleixner movl %eax,%ss 180250c2277SThomas Gleixner movl %eax,%es 181250c2277SThomas Gleixner 182250c2277SThomas Gleixner /* 183250c2277SThomas Gleixner * We don't really need to load %fs or %gs, but load them anyway 184250c2277SThomas Gleixner * to kill any stale realmode selectors. This allows execution 185250c2277SThomas Gleixner * under VT hardware. 186250c2277SThomas Gleixner */ 187250c2277SThomas Gleixner movl %eax,%fs 188250c2277SThomas Gleixner movl %eax,%gs 189250c2277SThomas Gleixner 190f32ff538STejun Heo /* Set up %gs. 191f32ff538STejun Heo * 192947e76cdSBrian Gerst * The base of %gs always points to the bottom of the irqstack 193947e76cdSBrian Gerst * union. If the stack protector canary is enabled, it is 194947e76cdSBrian Gerst * located at %gs:40. Note that, on SMP, the boot cpu uses 195947e76cdSBrian Gerst * init data section till per cpu areas are set up. 196250c2277SThomas Gleixner */ 197250c2277SThomas Gleixner movl $MSR_GS_BASE,%ecx 198650fb439SBrian Gerst movl initial_gs(%rip),%eax 199650fb439SBrian Gerst movl initial_gs+4(%rip),%edx 200250c2277SThomas Gleixner wrmsr 201250c2277SThomas Gleixner 2028170e6beSH. Peter Anvin /* rsi is pointer to real mode structure with interesting info. 203250c2277SThomas Gleixner pass it to C */ 2048170e6beSH. Peter Anvin movq %rsi, %rdi 205250c2277SThomas Gleixner 20679d243a0SBorislav Petkov.Ljump_to_C_code: 207a9468df5SJosh Poimboeuf /* 208a9468df5SJosh Poimboeuf * Jump to run C code and to be on a real kernel address. 209250c2277SThomas Gleixner * Since we are running on identity-mapped space we have to jump 210250c2277SThomas Gleixner * to the full 64bit address, this is only possible as indirect 211250c2277SThomas Gleixner * jump. In addition we need to ensure %cs is set so we make this 212250c2277SThomas Gleixner * a far return. 2138170e6beSH. Peter Anvin * 2148170e6beSH. Peter Anvin * Note: do not change to far jump indirect with 64bit offset. 2158170e6beSH. Peter Anvin * 2168170e6beSH. Peter Anvin * AMD does not support far jump indirect with 64bit offset. 2178170e6beSH. Peter Anvin * AMD64 Architecture Programmer's Manual, Volume 3: states only 2188170e6beSH. Peter Anvin * JMP FAR mem16:16 FF /5 Far jump indirect, 2198170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2208170e6beSH. Peter Anvin * JMP FAR mem16:32 FF /5 Far jump indirect, 2218170e6beSH. Peter Anvin * with the target specified by a far pointer in memory. 2228170e6beSH. Peter Anvin * 2238170e6beSH. Peter Anvin * Intel64 does support 64bit offset. 2248170e6beSH. Peter Anvin * Software Developer Manual Vol 2: states: 2258170e6beSH. Peter Anvin * FF /5 JMP m16:16 Jump far, absolute indirect, 2268170e6beSH. Peter Anvin * address given in m16:16 2278170e6beSH. Peter Anvin * FF /5 JMP m16:32 Jump far, absolute indirect, 2288170e6beSH. Peter Anvin * address given in m16:32. 2298170e6beSH. Peter Anvin * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect, 2308170e6beSH. Peter Anvin * address given in m16:64. 231250c2277SThomas Gleixner */ 23231dcfec1SJosh Poimboeuf pushq $.Lafter_lret # put return address on stack for unwinder 23331dcfec1SJosh Poimboeuf xorq %rbp, %rbp # clear frame pointer 234250c2277SThomas Gleixner movq initial_code(%rip), %rax 235250c2277SThomas Gleixner pushq $__KERNEL_CS # set correct cs 236250c2277SThomas Gleixner pushq %rax # target address in negative space 237250c2277SThomas Gleixner lretq 23831dcfec1SJosh Poimboeuf.Lafter_lret: 239015a2ea5SJosh PoimboeufEND(secondary_startup_64) 240250c2277SThomas Gleixner 24104633df0SBorislav Petkov#include "verify_cpu.S" 24204633df0SBorislav Petkov 24342e78e97SFenghua Yu#ifdef CONFIG_HOTPLUG_CPU 24442e78e97SFenghua Yu/* 24542e78e97SFenghua Yu * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 24642e78e97SFenghua Yu * up already except stack. We just set up stack here. Then call 24779d243a0SBorislav Petkov * start_secondary() via .Ljump_to_C_code. 24842e78e97SFenghua Yu */ 24942e78e97SFenghua YuENTRY(start_cpu0) 250b32f96c7SJosh Poimboeuf movq initial_stack(%rip), %rsp 2512704fbb6SJosh Poimboeuf UNWIND_HINT_EMPTY 25279d243a0SBorislav Petkov jmp .Ljump_to_C_code 25342e78e97SFenghua YuENDPROC(start_cpu0) 25442e78e97SFenghua Yu#endif 25542e78e97SFenghua Yu 256b32f96c7SJosh Poimboeuf /* Both SMP bootup and ACPI suspend change these variables */ 257da5968aeSSam Ravnborg __REFDATA 2588170e6beSH. Peter Anvin .balign 8 2598170e6beSH. Peter Anvin GLOBAL(initial_code) 260250c2277SThomas Gleixner .quad x86_64_start_kernel 2618170e6beSH. Peter Anvin GLOBAL(initial_gs) 2622add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(irq_stack_union) 263b32f96c7SJosh Poimboeuf GLOBAL(initial_stack) 26422dc3918SJosh Poimboeuf /* 26522dc3918SJosh Poimboeuf * The SIZEOF_PTREGS gap is a convention which helps the in-kernel 26622dc3918SJosh Poimboeuf * unwinder reliably detect the end of the stack. 26722dc3918SJosh Poimboeuf */ 26822dc3918SJosh Poimboeuf .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS 269b9af7c0dSSuresh Siddha __FINITDATA 270250c2277SThomas Gleixner 2718170e6beSH. Peter Anvin __INIT 272cdeb6048SAndy LutomirskiENTRY(early_idt_handler_array) 273749c970aSAndi Kleen i = 0 274749c970aSAndi Kleen .rept NUM_EXCEPTION_VECTORS 27582c62fa0SJosh Poimboeuf .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 2762704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 2779900aa2fSH. Peter Anvin pushq $0 # Dummy error code, to make stack frame uniform 2782704fbb6SJosh Poimboeuf .else 2792704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=8 2809900aa2fSH. Peter Anvin .endif 2819900aa2fSH. Peter Anvin pushq $i # 72(%rsp) Vector number 282cdeb6048SAndy Lutomirski jmp early_idt_handler_common 2832704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS 284749c970aSAndi Kleen i = i + 1 285cdeb6048SAndy Lutomirski .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 286749c970aSAndi Kleen .endr 2872704fbb6SJosh Poimboeuf UNWIND_HINT_IRET_REGS offset=16 288015a2ea5SJosh PoimboeufEND(early_idt_handler_array) 2898866cd9dSRoland McGrath 290cdeb6048SAndy Lutomirskiearly_idt_handler_common: 291cdeb6048SAndy Lutomirski /* 292cdeb6048SAndy Lutomirski * The stack is the hardware frame, an error code or zero, and the 293cdeb6048SAndy Lutomirski * vector number. 294cdeb6048SAndy Lutomirski */ 2959900aa2fSH. Peter Anvin cld 2969900aa2fSH. Peter Anvin 297250c2277SThomas Gleixner incl early_recursion_flag(%rip) 2989900aa2fSH. Peter Anvin 2997bbcdb1cSAndy Lutomirski /* The vector number is currently in the pt_regs->di slot. */ 3007bbcdb1cSAndy Lutomirski pushq %rsi /* pt_regs->si */ 3017bbcdb1cSAndy Lutomirski movq 8(%rsp), %rsi /* RSI = vector number */ 3027bbcdb1cSAndy Lutomirski movq %rdi, 8(%rsp) /* pt_regs->di = RDI */ 3037bbcdb1cSAndy Lutomirski pushq %rdx /* pt_regs->dx */ 3047bbcdb1cSAndy Lutomirski pushq %rcx /* pt_regs->cx */ 3057bbcdb1cSAndy Lutomirski pushq %rax /* pt_regs->ax */ 3067bbcdb1cSAndy Lutomirski pushq %r8 /* pt_regs->r8 */ 3077bbcdb1cSAndy Lutomirski pushq %r9 /* pt_regs->r9 */ 3087bbcdb1cSAndy Lutomirski pushq %r10 /* pt_regs->r10 */ 3097bbcdb1cSAndy Lutomirski pushq %r11 /* pt_regs->r11 */ 3107bbcdb1cSAndy Lutomirski pushq %rbx /* pt_regs->bx */ 3117bbcdb1cSAndy Lutomirski pushq %rbp /* pt_regs->bp */ 3127bbcdb1cSAndy Lutomirski pushq %r12 /* pt_regs->r12 */ 3137bbcdb1cSAndy Lutomirski pushq %r13 /* pt_regs->r13 */ 3147bbcdb1cSAndy Lutomirski pushq %r14 /* pt_regs->r14 */ 3157bbcdb1cSAndy Lutomirski pushq %r15 /* pt_regs->r15 */ 3162704fbb6SJosh Poimboeuf UNWIND_HINT_REGS 3179900aa2fSH. Peter Anvin 3187bbcdb1cSAndy Lutomirski cmpq $14,%rsi /* Page fault? */ 3198170e6beSH. Peter Anvin jnz 10f 3207bbcdb1cSAndy Lutomirski GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */ 3218170e6beSH. Peter Anvin call early_make_pgtable 3228170e6beSH. Peter Anvin andl %eax,%eax 3237bbcdb1cSAndy Lutomirski jz 20f /* All good */ 3248170e6beSH. Peter Anvin 3258170e6beSH. Peter Anvin10: 3267bbcdb1cSAndy Lutomirski movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */ 3279900aa2fSH. Peter Anvin call early_fixup_exception 3289900aa2fSH. Peter Anvin 3290e861fbbSAndy Lutomirski20: 3309900aa2fSH. Peter Anvin decl early_recursion_flag(%rip) 33126c4ef9cSAndy Lutomirski jmp restore_regs_and_return_to_kernel 332015a2ea5SJosh PoimboeufEND(early_idt_handler_common) 3339900aa2fSH. Peter Anvin 3348170e6beSH. Peter Anvin __INITDATA 3358170e6beSH. Peter Anvin 3369900aa2fSH. Peter Anvin .balign 4 3370e861fbbSAndy LutomirskiGLOBAL(early_recursion_flag) 338250c2277SThomas Gleixner .long 0 339250c2277SThomas Gleixner 340250c2277SThomas Gleixner#define NEXT_PAGE(name) \ 341250c2277SThomas Gleixner .balign PAGE_SIZE; \ 3428170e6beSH. Peter AnvinGLOBAL(name) 343250c2277SThomas Gleixner 344d9e9a641SDave Hansen#ifdef CONFIG_PAGE_TABLE_ISOLATION 345d9e9a641SDave Hansen/* 346d9e9a641SDave Hansen * Each PGD needs to be 8k long and 8k aligned. We do not 347d9e9a641SDave Hansen * ever go out to userspace with these, so we do not 348d9e9a641SDave Hansen * strictly *need* the second page, but this allows us to 349d9e9a641SDave Hansen * have a single set_pgd() implementation that does not 350d9e9a641SDave Hansen * need to worry about whether it has 4k or 8k to work 351d9e9a641SDave Hansen * with. 352d9e9a641SDave Hansen * 353d9e9a641SDave Hansen * This ensures PGDs are 8k long: 354d9e9a641SDave Hansen */ 355d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 512 356d9e9a641SDave Hansen/* This ensures they are 8k-aligned: */ 357d9e9a641SDave Hansen#define NEXT_PGD_PAGE(name) \ 358d9e9a641SDave Hansen .balign 2 * PAGE_SIZE; \ 359d9e9a641SDave HansenGLOBAL(name) 360d9e9a641SDave Hansen#else 361d9e9a641SDave Hansen#define NEXT_PGD_PAGE(name) NEXT_PAGE(name) 362d9e9a641SDave Hansen#define PTI_USER_PGD_FILL 0 363d9e9a641SDave Hansen#endif 364d9e9a641SDave Hansen 365250c2277SThomas Gleixner/* Automate the creation of 1 to 1 mapping pmd entries */ 366250c2277SThomas Gleixner#define PMDS(START, PERM, COUNT) \ 367250c2277SThomas Gleixner i = 0 ; \ 368250c2277SThomas Gleixner .rept (COUNT) ; \ 3690e192b99SCyrill Gorcunov .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ 370250c2277SThomas Gleixner i = i + 1 ; \ 371250c2277SThomas Gleixner .endr 372250c2277SThomas Gleixner 3738170e6beSH. Peter Anvin __INITDATA 374d9e9a641SDave HansenNEXT_PGD_PAGE(early_top_pgt) 3758170e6beSH. Peter Anvin .fill 511,8,0 376032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 37721729f81STom Lendacky .quad level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 378032370b9SKirill A. Shutemov#else 37921729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 380032370b9SKirill A. Shutemov#endif 381d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 3828170e6beSH. Peter Anvin 3838170e6beSH. Peter AnvinNEXT_PAGE(early_dynamic_pgts) 3848170e6beSH. Peter Anvin .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0 3858170e6beSH. Peter Anvin 386b9af7c0dSSuresh Siddha .data 3878170e6beSH. Peter Anvin 3884375c299SKirill A. Shutemov#if defined(CONFIG_XEN_PV) || defined(CONFIG_XEN_PVH) 389d9e9a641SDave HansenNEXT_PGD_PAGE(init_top_pgt) 39021729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 391032370b9SKirill A. Shutemov .org init_top_pgt + PGD_PAGE_OFFSET*8, 0 39221729f81STom Lendacky .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 393032370b9SKirill A. Shutemov .org init_top_pgt + PGD_START_KERNEL*8, 0 394250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ 39521729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 396d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 397250c2277SThomas Gleixner 398250c2277SThomas GleixnerNEXT_PAGE(level3_ident_pgt) 39921729f81STom Lendacky .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 400250c2277SThomas Gleixner .fill 511, 8, 0 4018170e6beSH. Peter AnvinNEXT_PAGE(level2_ident_pgt) 4028170e6beSH. Peter Anvin /* Since I easily can, map the first 1G. 4038170e6beSH. Peter Anvin * Don't set NX because code runs from these pages. 4048170e6beSH. Peter Anvin */ 4058170e6beSH. Peter Anvin PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD) 4064375c299SKirill A. Shutemov#else 407d9e9a641SDave HansenNEXT_PGD_PAGE(init_top_pgt) 4084375c299SKirill A. Shutemov .fill 512,8,0 409d9e9a641SDave Hansen .fill PTI_USER_PGD_FILL,8,0 4108170e6beSH. Peter Anvin#endif 411250c2277SThomas Gleixner 412032370b9SKirill A. Shutemov#ifdef CONFIG_X86_5LEVEL 413032370b9SKirill A. ShutemovNEXT_PAGE(level4_kernel_pgt) 414032370b9SKirill A. Shutemov .fill 511,8,0 41521729f81STom Lendacky .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 416032370b9SKirill A. Shutemov#endif 417032370b9SKirill A. Shutemov 418250c2277SThomas GleixnerNEXT_PAGE(level3_kernel_pgt) 419a6523748SEduardo Habkost .fill L3_START_KERNEL,8,0 420250c2277SThomas Gleixner /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ 42121729f81STom Lendacky .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC 42221729f81STom Lendacky .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 423250c2277SThomas Gleixner 424250c2277SThomas GleixnerNEXT_PAGE(level2_kernel_pgt) 42588f3aec7SIngo Molnar /* 42685eb69a1SIngo Molnar * 512 MB kernel mapping. We spend a full page on this pagetable 42788f3aec7SIngo Molnar * anyway. 42888f3aec7SIngo Molnar * 42988f3aec7SIngo Molnar * The kernel code+data+bss must not be bigger than that. 43088f3aec7SIngo Molnar * 43185eb69a1SIngo Molnar * (NOTE: at +512MB starts the module area, see MODULES_VADDR. 43288f3aec7SIngo Molnar * If you want to increase this then increase MODULES_VADDR 43388f3aec7SIngo Molnar * too.) 43488f3aec7SIngo Molnar */ 4358490638cSJeremy Fitzhardinge PMDS(0, __PAGE_KERNEL_LARGE_EXEC, 436d4afe414SIngo Molnar KERNEL_IMAGE_SIZE/PMD_SIZE) 437250c2277SThomas Gleixner 4388170e6beSH. Peter AnvinNEXT_PAGE(level2_fixmap_pgt) 4398170e6beSH. Peter Anvin .fill 506,8,0 44021729f81STom Lendacky .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC 4418170e6beSH. Peter Anvin /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */ 4428170e6beSH. Peter Anvin .fill 5,8,0 4438170e6beSH. Peter Anvin 4448170e6beSH. Peter AnvinNEXT_PAGE(level1_fixmap_pgt) 445250c2277SThomas Gleixner .fill 512,8,0 446250c2277SThomas Gleixner 447250c2277SThomas Gleixner#undef PMDS 448250c2277SThomas Gleixner 449250c2277SThomas Gleixner .data 450250c2277SThomas Gleixner .align 16 451a939098aSGlauber Costa .globl early_gdt_descr 452a939098aSGlauber Costaearly_gdt_descr: 453a939098aSGlauber Costa .word GDT_ENTRIES*8-1 4543e5d8f97STejun Heoearly_gdt_descr_base: 4552add8e23SBrian Gerst .quad INIT_PER_CPU_VAR(gdt_page) 456250c2277SThomas Gleixner 457250c2277SThomas GleixnerENTRY(phys_base) 458250c2277SThomas Gleixner /* This must match the first entry in level2_kernel_pgt */ 459250c2277SThomas Gleixner .quad 0x0000000000000000 460784d5699SAl ViroEXPORT_SYMBOL(phys_base) 461250c2277SThomas Gleixner 4628c5e5ac3SJeremy Fitzhardinge#include "../../x86/xen/xen-head.S" 463250c2277SThomas Gleixner 46402b7da37STim Abbott __PAGE_ALIGNED_BSS 4658170e6beSH. Peter AnvinNEXT_PAGE(empty_zero_page) 466250c2277SThomas Gleixner .skip PAGE_SIZE 467784d5699SAl ViroEXPORT_SYMBOL(empty_zero_page) 468ef7f0d6aSAndrey Ryabinin 469